origen_jtag 0.22.1 → 0.22.2

checksums.yaml

@@ -1,7 +1,7 @@
 ---
 SHA256:
-  metadata.gz: f2fc35840e8e533688ae4f9228d3136022e8ce7d117452d91d48a8b782bc2e5c
-  data.tar.gz: e55c4dfebaa955af749c9219f7585c34568fe28fa2c976e4f75f6050278a43b7
+  metadata.gz: cc6050891bc69e2a38991157a3423a8765284b257a56d68c2fb87a8b5844f98b
+  data.tar.gz: 4e491ddb526412da9761cd1d5a6886a7a17a009e60ea2736db46365035cf94e2
 SHA512:
-  metadata.gz: 3f7a129c33e581c1e8eeaf7d4ffd2c2a9722f91f15ed95139565a5d88a2bed9ff83c22a35a0ee34b12737f6348cd7c0455e067309f933eb9d3e0b74a269e9963
-  data.tar.gz: 0b97667c90159cddee69b72bb84819468ebf17767be8c47b3ce59301be6a15783b10c7f039c44950b3cc2217016baa4b488fe181a89f9d47b3a6a486fa12bfbd
+  metadata.gz: dbb5ac9d278793a4994d8a50079bb587f326186701ed760edc119824b899cb29bb0551693d4d8f7f72e7eaff2fefc2c7fd2e6fd4f4563ed2049b208f63b6b8a6
+  data.tar.gz: 93668e735cb0c23de2788bb6be7bb057a2e58a41bfff14a3a204de7c6a33f1ab6b2aaee427804869f62c9bf474fd888e6e82ab85ecf2b764a2f193c63db16f5d

data/config/version.rb

@@ -1,7 +1,7 @@
 module OrigenJTAG
   MAJOR = 0
   MINOR = 22
-  BUGFIX = 1
+  BUGFIX = 2
   DEV = nil
   VERSION = [MAJOR, MINOR, BUGFIX].join(".") + (DEV ? ".pre#{DEV}" : '')
 end

data/lib/origen_jtag/driver.rb

@@ -416,7 +416,7 @@ module OrigenJTAG
           cc "#{options[:msg]}\n"
         end
         val = reg_or_val.respond_to?(:data) ? reg_or_val.data : reg_or_val
-        shift_dr(write: val.to_hex) do
+        shift_dr(options.merge(write: val.to_hex)) do
           shift(reg_or_val, options)
         end
       end
@@ -449,7 +449,7 @@ module OrigenJTAG
         if options[:msg]
           cc "#{options[:msg]}\n"
         end
-        shift_dr(read: Origen::Utility.read_hex(reg_or_val)) do
+        shift_dr(options.merge(read: Origen::Utility.read_hex(reg_or_val))) do
           shift(reg_or_val, options)
         end
       end
@@ -484,7 +484,7 @@ module OrigenJTAG
         if Origen.tester.respond_to?(:write_ir)
           Origen.tester.write_ir(reg_or_val, options)
         else
-          shift_ir(write: val.to_hex) do
+          shift_ir(options.merge(write: val.to_hex)) do
             shift(reg_or_val, options)
           end
         end

data/lib/origen_jtag/tap_controller.rb

@@ -4,22 +4,22 @@ module OrigenJTAG
   module TAPController
     # Map of internal state symbols to human readable names
     STATES = {
-      reset:      'Test-Logic-Reset',
-      idle:       'Run-Test/Idle',
-      select_dr:  'Select-DR',
-      capture_dr: 'Capture-DR',
-      shift_dr:   'Shift-DR',
-      exit1_dr:   'Exit1-DR',
-      pause_dr:   'Pause-DR',
-      exit2_dr:   'Exit2-DR',
-      update_dr:  'Update-DR',
-      select_ir:  'Select-IR',
-      capture_ir: 'Capture-IR',
-      shift_ir:   'Shift-IR',
-      exit1_ir:   'Exit1-IR',
-      pause_ir:   'Pause-IR',
-      exit2_ir:   'Exit2-IR',
-      update_ir:  'Update-IR'
+      reset:          'Test-Logic-Reset',
+      idle:           'Run-Test/Idle',
+      select_dr_scan: 'Select-DR-Scan',
+      capture_dr:     'Capture-DR',
+      shift_dr:       'Shift-DR',
+      exit1_dr:       'Exit1-DR',
+      pause_dr:       'Pause-DR',
+      exit2_dr:       'Exit2-DR',
+      update_dr:      'Update-DR',
+      select_ir_scan: 'Select-IR-Scan',
+      capture_ir:     'Capture-IR',
+      shift_ir:       'Shift-IR',
+      exit1_ir:       'Exit1-IR',
+      pause_ir:       'Pause-IR',
+      exit2_ir:       'Exit2-IR',
+      update_ir:      'Update-IR'
     }
 
     # Returns the current state of the JTAG TAP Controller
@@ -50,11 +50,27 @@ module OrigenJTAG
     #   end
     #   # State is Run-Test/Idle
     def shift_dr(options = {})
-      validate_state(:idle, :pause_dr)
+      options = {
+        start_state: :idle,   # Allowed start states: :idle, :select_dr_scan, :update_ir, :update_dr
+        end_state:   :idle    # Allowed end states: :idle, :update_dr
+      }.merge(options)
+
+      if options[:start_state] == :idle  # allow for pause_dr state also if called from pause_dr block
+        validate_state(:idle, :pause_dr)
+      elsif options[:state_state] == :select_dr_scan
+        validate_state(:select_dr_scan, :pause_dr)
+      elsif options[:state_state] == :update_dr
+        validate_state(:update_dr, :pause_dr)
+      elsif options[:state_state] == :update_ir
+        validate_state(:update_ir, :pause_dr)
+      end
       log 'Transition to Shift-DR...'
-      if state == :idle
-        tms!(1)  # => Select-DR-Scan
-        update_state :select_dr_scan
+      if state == :idle || state == :select_dr_scan || state == :update_ir || state == :update_dr
+        # Non-pause states
+        unless state == :select_dr_scan
+          tms!(1)  # => Select-DR-Scan
+          update_state :select_dr_scan
+        end
         tms!(0)  # => Capture-DR
         update_state :capture_dr
         tms!(0)  # => Shift-DR
@@ -78,8 +94,10 @@ module OrigenJTAG
         end
         tms!(1)  # => Update-DR
         update_state :update_dr
-        tms!(0)  # => Run-Test/Idle
-        update_state :idle
+        if options[:end_state] == :idle
+          tms!(0)  # => Run-Test/Idle
+          update_state :idle
+        end
       else # :pause_dr
         tms!(1)  # => Exit2-DR
         update_state :exit2_dr
@@ -175,13 +193,23 @@ module OrigenJTAG
     #   end
     #   # State is Run-Test/Idle
     def shift_ir(options = {})
-      validate_state(:idle, :pause_ir)
+      options = {
+        start_state: :idle,   # Allowed start states: :idle, :select_ir_scan
+        end_state:   :idle    # Allowed end states: :idle, :update_ir, :select_dr_scan
+      }.merge(options)
+      if options[:start_state] == :idle
+        validate_state(:idle, :pause_ir)
+      else
+        validate_state(:select_ir_scan, :pause_ir)
+      end
       log 'Transition to Shift-IR...'
-      if state == :idle
-        tms!(1)  # => Select-DR-Scan
-        update_state :select_dr_scan
-        tms!(1)  # => Select-IR-Scan
-        update_state :select_ir_scan
+      if state == :idle || state == :select_ir_scan
+        unless state == :select_ir_scan
+          tms!(1)  # => Select-DR-Scan
+          update_state :select_dr_scan
+          tms!(1)  # => Select-IR-Scan
+          update_state :select_ir_scan
+        end
         tms!(0)  # => Capture-IR
         update_state :capture_ir
         tms!(0)  # => Shift-IR
@@ -195,7 +223,13 @@ module OrigenJTAG
         end
         log msg, always: true do
           yield
-          log 'Transition to Run-Test/Idle...'
+          if options[:end_state] == :idle
+            log 'Transition to Run-Test/Idle...'
+          elsif options[:end_state] == :update_ir
+            log 'Transition to Update-IR...'
+          elsif options[:end_state] == :select_dr_scan
+            log 'Transition to Select-DR-Scan...'
+          end
           if @last_data_vector_shifted
             @last_data_vector_shifted = false
           else
@@ -205,8 +239,13 @@ module OrigenJTAG
         end
         tms!(1)  # => Update-IR
         update_state :update_ir
-        tms!(0)  # => Run-Test/Idle
-        update_state :idle
+        if options[:end_state] == :idle
+          tms!(0)  # => Run-Test/Idle
+          update_state :idle
+        elsif options[:end_state] == :select_dr_scan
+          tms!(1)  # => Select-DR-Scan
+          update_state :select_dr_scan
+        end
       else # :pause_ir
         tms!(1)  # => Exit2-IR
         update_state :exit2_ir

data/pattern/full_reg_subr_overlay.rb

@@ -0,0 +1,26 @@
+Pattern.create do
+  def test(msg)
+    ss "Test - #{msg}"
+  end
+
+  jtag = $dut.jtag
+  reg16 = $dut.reg(:test16)
+  reg32 = $dut.reg(:test32)
+
+
+  test 'Shift register into TDI with overlay'
+
+
+  cc 'Full register (16 bits)'
+  reg16.overlay('write_overlay16')
+  reg16.write!
+#  tester.cycle  # Give a padding cycle as a place for the subroutine call to go
+#  jtag.shift reg, cycle_last: true
+
+  cc 'Full register with additional size (32 bits)'
+  reg32.overlay('write_overlay32')
+  reg32.write!
+#  tester.cycle  # Give a padding cycle as a place for the subroutine call to go
+#  jtag.shift reg, cycle_last: true, size: 32
+
+end

data/pattern/jtag_workout.rb

@@ -193,7 +193,13 @@ Pattern.create(options = { name: pat_name }) do
 
   test 'Unless forced'
   jtag.write_ir 0xF, size: 4, force: true
- 
+
+  test 'Write IR, starting with Idle, leave in Select-DR-Scan state'
+  jtag.write_ir(0x7, size: 8, end_state: :select_dr_scan, force: true)
+
+  test 'Write DR starting with Select-DR-Scan state, end with Idle'
+  jtag.write_dr(0x12345678, size: 32, start_state: :select_dr_scan)
+
   test 'Reset'
   jtag.reset
 

data/pattern/overlay_subr.rb

@@ -0,0 +1,56 @@
+Pattern.create do
+  def test(msg)
+    ss "Test - #{msg}"
+  end
+
+  def subroutine(name, options = {})
+    options = {
+      compress:  false,
+    }.merge(options)
+    
+    tester.start_subroutine(name)
+#    $tester.set_timeset('intram', 40)
+#    $dut.init_pins_for_first_vector
+#    $dut.pin(:RESET_B).drive(1)
+#    $dut.pin(:JTAG_TRST_B).drive(1)
+
+
+    if options[:compress]
+      yield options
+    else
+      tester.dont_compress do
+        yield options
+      end
+    end
+    tester.end_subroutine(options)
+  end
+  def write_partial(thing_to_shift, options = {})
+    options = {
+      read:             false,
+      length:           false,     # Set to the number of bits you want to shift when supplying a data value
+      includes_last_bit: false,
+      cycle_last:       true
+    }.merge(options)
+
+    dut.jtag.shift thing_to_shift, size: options[:length], cycle_last: options[:cycle_last], includes_last_bit: options[:includes_last_bit], read: options[:read]
+  end
+
+
+  jtag = $dut.jtag
+  reg16 = $dut.reg(:test16)
+  reg32 = $dut.reg(:test32)
+
+  test 'Shift register into TDI with overlay'
+
+  subroutine 'write_overlay16' do
+#    write_partial(0, length: 16, includes_last_bit: true)
+    dut.jtag.shift 0, size: 16, cycle_last: true, includes_last_bit: true, read: false
+  end
+
+  subroutine 'write_overlay32' do
+#    write_partial(5, length: 32, includes_last_bit: true)
+    dut.jtag.shift 0, size: 32, cycle_last: true, includes_last_bit: false
+  end
+
+
+end

metadata

@@ -1,14 +1,14 @@
 --- !ruby/object:Gem::Specification
 name: origen_jtag
 version: !ruby/object:Gem::Version
-  version: 0.22.1
+  version: 0.22.2
 platform: ruby
 authors:
 - Stephen McGinty
 autorequire: 
 bindir: bin
 cert_chain: []
-date: 2020-02-03 00:00:00.000000000 Z
+date: 2022-04-28 00:00:00.000000000 Z
 dependencies:
 - !ruby/object:Gem::Dependency
   name: origen
@@ -62,8 +62,10 @@ files:
 - lib/origen_jtag_dev/serial.rb
 - lib/origen_jtag_dev/top_level.rb
 - pattern/full_reg_ovly_cap.rb
+- pattern/full_reg_subr_overlay.rb
 - pattern/global_label_test.rb
 - pattern/jtag_workout.rb
+- pattern/overlay_subr.rb
 - pattern/rww_test.rb
 - pattern/two_port.rb
 - templates/web/index.md.erb
@@ -89,8 +91,7 @@ required_rubygems_version: !ruby/object:Gem::Requirement
     - !ruby/object:Gem::Version
       version: 1.8.11
 requirements: []
-rubyforge_project: 
-rubygems_version: 2.7.7
+rubygems_version: 3.1.4
 signing_key: 
 specification_version: 4
 summary: JTAG driver for the Origen SDK