origen_jtag 0.17.0 → 0.17.1

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data/lib/origen_jtag.rb CHANGED
@@ -1,13 +1,13 @@
1
- require 'origen'
2
- require_relative '../config/application.rb'
3
-
4
- # Include this module to add a JTAG driver to your class
5
- module OrigenJTAG
6
- autoload :TAPController, 'origen_jtag/tap_controller'
7
- autoload :Driver, 'origen_jtag/driver'
8
-
9
- # Returns an instance of the OrigenJTAG::Driver
10
- def jtag
11
- @jtag ||= Driver.new(self)
12
- end
13
- end
1
+ require 'origen'
2
+ require_relative '../config/application.rb'
3
+
4
+ # Include this module to add a JTAG driver to your class
5
+ module OrigenJTAG
6
+ autoload :TAPController, 'origen_jtag/tap_controller'
7
+ autoload :Driver, 'origen_jtag/driver'
8
+
9
+ # Returns an instance of the OrigenJTAG::Driver
10
+ def jtag
11
+ @jtag ||= Driver.new(self)
12
+ end
13
+ end
@@ -1,94 +1,94 @@
1
- module OrigenJTAGDev
2
- # This is a dummy DUT model which is used
3
- # to instantiate and test the JTAG locally
4
- # during development.
5
- #
6
- # It is not included when this library is imported.
7
- class DUT
8
- include Origen::TopLevel
9
- include OrigenJTAG
10
-
11
- attr_reader :jtag_config
12
-
13
- JTAG_CONFIG = {
14
- verbose: true,
15
- tclk_format: :rh,
16
- tclk_multiple: 1,
17
- tdo_strobe: :tclk_high,
18
- tdo_store_cycle: 0,
19
- init_state: :unknown
20
- }
21
-
22
- def initialize(options = {})
23
- JTAG_CONFIG[:tclk_format] = options[:tclk_format] if options[:tclk_format]
24
- JTAG_CONFIG[:tclk_multiple] = options[:tclk_multiple] if options[:tclk_multiple]
25
- JTAG_CONFIG[:tdo_strobe] = options[:tdo_strobe] if options[:tdo_strobe]
26
- JTAG_CONFIG[:tdo_store_cycle] = options[:tdo_store_cycle] if options[:tdo_store_cycle]
27
- JTAG_CONFIG[:init_state] = options[:init_state] if options[:init_state]
28
-
29
- instantiate_registers(options)
30
- instantiate_pins(options)
31
- end
32
-
33
- def instantiate_registers(options = {})
34
- reg :test16, 0x0012, size: 16 do |reg|
35
- reg.bit 15..8, :bus
36
- reg.bit 0, :bit
37
- end
38
-
39
- reg :test32, 0x0014, size: 32 do |reg|
40
- reg.bit 31..16, :bus
41
- reg.bit 0, :bit
42
- end
43
-
44
- reg :full16, 0x0012, size: 16 do |reg|
45
- reg.bit 15..0, :data
46
- end
47
- end
48
-
49
- def instantiate_pins(options = {})
50
- add_pin :tclk
51
- add_pin :tdi
52
- add_pin :tdo
53
- add_pin :tms
54
- end
55
-
56
- def startup(options = {})
57
- tester.set_timeset('nvmbist', 40)
58
- end
59
-
60
- # Getter for top-level tclk_format setting
61
- def tclk_format
62
- JTAG_CONFIG[:tclk_format]
63
- end
64
-
65
- # Getter for top-level tclk_multiple setting
66
- def tclk_multiple
67
- JTAG_CONFIG[:tclk_multiple]
68
- end
69
-
70
- # Getter for top-level tdo_strobe setting
71
- def tdo_strobe
72
- JTAG_CONFIG[:tdo_strobe]
73
- end
74
-
75
- # Getter for top-level tdo_store_cycle setting
76
- def tdo_store_cycle
77
- JTAG_CONFIG[:tdo_store_cycle]
78
- end
79
-
80
- # Getter for top-level init_state setting
81
- def init_state
82
- JTAG_CONFIG[:init_state]
83
- end
84
-
85
- # Wouldn't want to do this in reality, but allows some flexibility duing gem testing
86
- def update_jtag_config(cfg, val)
87
- if JTAG_CONFIG.key?(cfg)
88
- JTAG_CONFIG[cfg] = val
89
- else
90
- fail "#{cfg} not a part of JTAG_CONFIG"
91
- end
92
- end
93
- end
94
- end
1
+ module OrigenJTAGDev
2
+ # This is a dummy DUT model which is used
3
+ # to instantiate and test the JTAG locally
4
+ # during development.
5
+ #
6
+ # It is not included when this library is imported.
7
+ class DUT
8
+ include Origen::TopLevel
9
+ include OrigenJTAG
10
+
11
+ attr_reader :jtag_config
12
+
13
+ JTAG_CONFIG = {
14
+ verbose: true,
15
+ tclk_format: :rh,
16
+ tclk_multiple: 1,
17
+ tdo_strobe: :tclk_high,
18
+ tdo_store_cycle: 0,
19
+ init_state: :unknown
20
+ }
21
+
22
+ def initialize(options = {})
23
+ JTAG_CONFIG[:tclk_format] = options[:tclk_format] if options[:tclk_format]
24
+ JTAG_CONFIG[:tclk_multiple] = options[:tclk_multiple] if options[:tclk_multiple]
25
+ JTAG_CONFIG[:tdo_strobe] = options[:tdo_strobe] if options[:tdo_strobe]
26
+ JTAG_CONFIG[:tdo_store_cycle] = options[:tdo_store_cycle] if options[:tdo_store_cycle]
27
+ JTAG_CONFIG[:init_state] = options[:init_state] if options[:init_state]
28
+
29
+ instantiate_registers(options)
30
+ instantiate_pins(options)
31
+ end
32
+
33
+ def instantiate_registers(options = {})
34
+ reg :test16, 0x0012, size: 16 do |reg|
35
+ reg.bit 15..8, :bus
36
+ reg.bit 0, :bit
37
+ end
38
+
39
+ reg :test32, 0x0014, size: 32 do |reg|
40
+ reg.bit 31..16, :bus
41
+ reg.bit 0, :bit
42
+ end
43
+
44
+ reg :full16, 0x0012, size: 16 do |reg|
45
+ reg.bit 15..0, :data
46
+ end
47
+ end
48
+
49
+ def instantiate_pins(options = {})
50
+ add_pin :tclk
51
+ add_pin :tdi
52
+ add_pin :tdo
53
+ add_pin :tms
54
+ end
55
+
56
+ def startup(options = {})
57
+ tester.set_timeset('nvmbist', 40)
58
+ end
59
+
60
+ # Getter for top-level tclk_format setting
61
+ def tclk_format
62
+ JTAG_CONFIG[:tclk_format]
63
+ end
64
+
65
+ # Getter for top-level tclk_multiple setting
66
+ def tclk_multiple
67
+ JTAG_CONFIG[:tclk_multiple]
68
+ end
69
+
70
+ # Getter for top-level tdo_strobe setting
71
+ def tdo_strobe
72
+ JTAG_CONFIG[:tdo_strobe]
73
+ end
74
+
75
+ # Getter for top-level tdo_store_cycle setting
76
+ def tdo_store_cycle
77
+ JTAG_CONFIG[:tdo_store_cycle]
78
+ end
79
+
80
+ # Getter for top-level init_state setting
81
+ def init_state
82
+ JTAG_CONFIG[:init_state]
83
+ end
84
+
85
+ # Wouldn't want to do this in reality, but allows some flexibility duing gem testing
86
+ def update_jtag_config(cfg, val)
87
+ if JTAG_CONFIG.key?(cfg)
88
+ JTAG_CONFIG[cfg] = val
89
+ else
90
+ fail "#{cfg} not a part of JTAG_CONFIG"
91
+ end
92
+ end
93
+ end
94
+ end
@@ -0,0 +1,13 @@
1
+ if tester.j750? || tester.uflex?
2
+ Pattern.create(options = { name: 'global_label_test' }) do
3
+
4
+ jtag = $dut.jtag
5
+ reg = $dut.reg(:full16)
6
+
7
+ cc 'TDO should be HLHL_LHLH_HLHL_LHLH'
8
+ reg.write(0xFFFF)
9
+ reg.overlay('globaltest')
10
+ jtag.write_dr reg, overlay: true, overlay_label: 'thisisthegloballabel'
11
+
12
+ end
13
+ end
@@ -1,220 +1,220 @@
1
- pat_name = "jtag_workout_#{$dut.tclk_format.upcase}#{$dut.tclk_multiple}"
2
- pat_name = pat_name + "_#{dut.tdo_store_cycle}" if dut.tdo_store_cycle != 0
3
-
4
- Pattern.create(options = { name: pat_name }) do
5
- def test(msg)
6
- ss "Test - #{msg}"
7
- end
8
-
9
- jtag = $dut.jtag
10
- reg = $dut.reg(:test16)
11
-
12
- # First tests of the TAP Controller
13
-
14
- test 'Transition TAP controller in and out of Shift-DR'
15
- jtag.shift_dr {}
16
-
17
- test 'Transition TAP controller in and out of Pause-DR'
18
- jtag.pause_dr {}
19
-
20
- test 'Transition TAP controller in and out of Shift-IR'
21
- jtag.shift_ir {}
22
-
23
- test 'Transition TAP controller in and out of Pause-IR'
24
- jtag.pause_ir {}
25
-
26
- test 'Transition into Shift-DR, then back and forth into Pause-DR'
27
- jtag.shift_dr do
28
- jtag.pause_dr {}
29
- jtag.pause_dr {}
30
- end
31
-
32
- test 'Transition into Pause-DR, then back and forth into Shift-DR'
33
- jtag.pause_dr do
34
- jtag.shift_dr {}
35
- jtag.shift_dr {}
36
- end
37
-
38
- test 'Transition into Shift-IR, then back and forth into Pause-IR'
39
- jtag.shift_ir do
40
- jtag.pause_ir {}
41
- jtag.pause_ir {}
42
- end
43
-
44
- test 'Transition into Pause-IR, then back and forth into Shift-IR'
45
- jtag.pause_ir do
46
- jtag.shift_ir {}
47
- jtag.shift_ir {}
48
- end
49
-
50
- # Tests of the shift method, make sure it handles registers with
51
- # bit-level flags set in additional to dumb values
52
-
53
- test 'Shifting an explicit value into TDI'
54
- jtag.shift 0x1234, size: 16, cycle_last: true
55
-
56
- test 'Shifting an explicit value out of TDO'
57
- jtag.shift 0x1234, size: 16, cycle_last: true, read: true
58
-
59
- test 'Shift register into TDI'
60
- reg.write(0xFF01)
61
- cc 'Full register (16 bits)'
62
- jtag.shift reg, cycle_last: true
63
- cc 'Full register with additional size (32 bits)'
64
- jtag.shift reg, cycle_last: true, size: 32
65
- cc 'Full register with reduced size (8 bits)'
66
- jtag.shift reg, cycle_last: true, size: 8, includes_last_bit: false
67
-
68
- test 'Shift register into TDI with overlay'
69
- reg.overlay('write_overlay')
70
- cc 'Full register (16 bits)'
71
- tester.cycle # Give a padding cycle as a place for the subroutine call to go
72
- jtag.shift reg, cycle_last: true
73
- cc 'Full register with additional size (32 bits)'
74
- tester.cycle # Give a padding cycle as a place for the subroutine call to go
75
- jtag.shift reg, cycle_last: true, size: 32
76
- cc 'Full register with reduced size (8 bits)'
77
- tester.cycle # Give a padding cycle as a place for the subroutine call to go
78
- jtag.shift reg, cycle_last: true, size: 8, includes_last_bit: false
79
- cc 'It should in-line overlays when running in simulation mode'
80
- Origen.mode = :simulation
81
- tester.cycle # Give a padding cycle as a place for the subroutine call to go
82
- jtag.shift reg, cycle_last: true
83
- Origen.mode = :debug
84
- if tester.respond_to?('label')
85
- cc 'Full register overlay without using subroutine'
86
- jtag.shift reg, cycle_last: true, no_subr: true
87
- end
88
-
89
- test 'Shift register into TDI with single bit overlay'
90
- reg.overlay(nil)
91
- reg.bit(:bit).overlay('write_overlay2')
92
- tester.cycle # Give a padding cycle as a place for the subroutine call to go
93
- jtag.shift reg, cycle_last: true
94
- reg.overlay(nil)
95
-
96
- test 'Read register out of TDO'
97
- cc 'Full register (16 bits)'
98
- reg.read
99
- jtag.shift reg, cycle_last: true, read: true
100
- cc 'Full register with additional size (32 bits)'
101
- reg.read
102
- jtag.shift reg, cycle_last: true, size: 32, read: true
103
- cc 'Full register with reduced size (8 bits)'
104
- reg.read
105
- jtag.shift reg, cycle_last: true, size: 8, read: true, includes_last_bit: false
106
-
107
- test 'Read single bit out of TDO'
108
- reg.bit(:bit).read
109
- jtag.shift reg, cycle_last: true, read: true
110
-
111
- test 'Store register out of TDO'
112
- cc 'Full register (16 bits)'
113
- reg.store
114
- jtag.shift reg, cycle_last: true, read: true
115
- cc 'Full register with additional size (32 bits)'
116
- reg.store
117
- jtag.shift reg, cycle_last: true, size: 32, read: true
118
- cc 'Full register with reduced size (8 bits)'
119
- reg.store
120
- jtag.shift reg, cycle_last: true, size: 8, read: true, includes_last_bit: false
121
-
122
- test 'Store single bit out of TDO'
123
- reg.bit(:bit).store
124
- jtag.shift reg, cycle_last: true, read: true
125
-
126
- test 'Test flag clear, bit 0 should be read, but not stored'
127
- reg.bit(:bit).read
128
- jtag.shift reg, cycle_last: true, read: true
129
-
130
- test 'Shift register out of TDO with overlay'
131
- reg.overlay('read_overlay')
132
- cc 'Full register (16 bits)'
133
- tester.cycle # Give a padding cycle as a place for the subroutine call to go
134
- jtag.shift reg, cycle_last: true, read: true
135
- cc 'Full register with additional size (32 bits)'
136
- tester.cycle # Give a padding cycle as a place for the subroutine call to go
137
- jtag.shift reg, cycle_last: true, size: 32, read: true
138
- cc 'Full register with reduced size (8 bits)'
139
- tester.cycle # Give a padding cycle as a place for the subroutine call to go
140
- jtag.shift reg, cycle_last: true, size: 8, read: true, includes_last_bit: false
141
- cc 'It should in-line overlays when running in simulation mode'
142
- Origen.mode = :simulation
143
- tester.cycle # Give a padding cycle as a place for the subroutine call to go
144
- jtag.shift reg, cycle_last: true, read: true
145
- Origen.mode = :debug
146
- if tester.respond_to?('label')
147
- cc 'Full register overlay without using subroutine'
148
- jtag.shift reg, cycle_last: true, read: true, no_subr: true
149
- end
150
-
151
- test 'Shift register out of TDO with single bit overlay'
152
- reg.overlay(nil)
153
- reg.bit(:bit).overlay('read_overlay2')
154
- tester.cycle # Give a padding cycle as a place for the subroutine call to go
155
- jtag.shift reg, cycle_last: true
156
- reg.overlay(nil)
157
-
158
- # Finally integration tests of the TAPController + shift
159
-
160
- test 'Write value into DR'
161
- jtag.write_dr 0xFFFF, size: 16, msg: 'Write value into DR'
162
-
163
- test 'Write value into DR, with compare on TDO'
164
- jtag.write_dr 0xFFFF, size: 16, shift_out_data: 0xAAAA, msg: 'Write value into DR'
165
-
166
- test 'Write register into DR with full-width overlay'
167
- r = $dut.reg(:test32)
168
- r.overlay('write_overlay')
169
- jtag.write_dr r
170
- r.overlay(nil)
171
-
172
- test 'Read value out of DR'
173
- jtag.read_dr 0xFFFF, size: 16, msg: 'Read value out of DR'
174
-
175
- test 'Store value out of DR'
176
- r.store
177
- jtag.read_dr r
178
-
179
-
180
- test 'Read value out of DR, with specified shift in data into TDI'
181
- jtag.read_dr 0xFFFF, size: 16, shift_in_data: 0x5555, msg: 'Read value out of DR'
182
-
183
- test 'Write value into IR'
184
- jtag.write_ir 0xF, size: 4, msg: 'Write value into IR'
185
-
186
- test 'Read value out of IR'
187
- jtag.read_ir 0xF, size: 4, msg: 'Read value out of IR'
188
-
189
- test 'The IR value is tracked and duplicate writes are inhibited'
190
- jtag.write_ir 0xF, size: 4
191
-
192
- test 'Unless forced'
193
- jtag.write_ir 0xF, size: 4, force: true
194
-
195
- test 'Reset'
196
- jtag.reset
197
-
198
- test 'Suspend of compare on TDO works'
199
- cc 'TDO should be H'
200
- jtag.read_dr 0xFFFF, size: 16, msg: 'Read value out of DR'
201
- tester.ignore_fails($dut.pin(:tdo)) do
202
- cc 'TDO should be X'
203
- jtag.read_dr 0xFFFF, size: 16, msg: 'Read value out of DR'
204
- end
205
- cc 'TDO should be H'
206
- jtag.read_dr 0xFFFF, size: 16, msg: 'Read value out of DR'
207
-
208
- test 'Mask option for read_dr works'
209
- cc 'TDO should be H'
210
- jtag.read_dr 0xFFFF, size: 16, mask: 0x5555, msg: 'Read value out of DR'
211
-
212
- test 'Write value into DR, with compare on TDO'
213
- jtag.write_dr 0x5555, size: 16, shift_out_data: 0xAAAA, mask: 0x00FF, msg: 'Write value into DR'
214
-
215
- test 'Shifting an explicit value out of TDO with mask'
216
- jtag.shift 0x1234, size: 16, read: true, mask: 0xFF00
217
-
218
- test 'Shifting an explicit value into TDI (and out of TDO)'
219
- jtag.shift 0x1234, size: 16, cycle_last: true, shift_out_data: 0xAAAA, mask: 0x0F0F
220
- end
1
+ pat_name = "jtag_workout_#{$dut.tclk_format.upcase}#{$dut.tclk_multiple}"
2
+ pat_name = pat_name + "_#{dut.tdo_store_cycle}" if dut.tdo_store_cycle != 0
3
+
4
+ Pattern.create(options = { name: pat_name }) do
5
+ def test(msg)
6
+ ss "Test - #{msg}"
7
+ end
8
+
9
+ jtag = $dut.jtag
10
+ reg = $dut.reg(:test16)
11
+
12
+ # First tests of the TAP Controller
13
+
14
+ test 'Transition TAP controller in and out of Shift-DR'
15
+ jtag.shift_dr {}
16
+
17
+ test 'Transition TAP controller in and out of Pause-DR'
18
+ jtag.pause_dr {}
19
+
20
+ test 'Transition TAP controller in and out of Shift-IR'
21
+ jtag.shift_ir {}
22
+
23
+ test 'Transition TAP controller in and out of Pause-IR'
24
+ jtag.pause_ir {}
25
+
26
+ test 'Transition into Shift-DR, then back and forth into Pause-DR'
27
+ jtag.shift_dr do
28
+ jtag.pause_dr {}
29
+ jtag.pause_dr {}
30
+ end
31
+
32
+ test 'Transition into Pause-DR, then back and forth into Shift-DR'
33
+ jtag.pause_dr do
34
+ jtag.shift_dr {}
35
+ jtag.shift_dr {}
36
+ end
37
+
38
+ test 'Transition into Shift-IR, then back and forth into Pause-IR'
39
+ jtag.shift_ir do
40
+ jtag.pause_ir {}
41
+ jtag.pause_ir {}
42
+ end
43
+
44
+ test 'Transition into Pause-IR, then back and forth into Shift-IR'
45
+ jtag.pause_ir do
46
+ jtag.shift_ir {}
47
+ jtag.shift_ir {}
48
+ end
49
+
50
+ # Tests of the shift method, make sure it handles registers with
51
+ # bit-level flags set in additional to dumb values
52
+
53
+ test 'Shifting an explicit value into TDI'
54
+ jtag.shift 0x1234, size: 16, cycle_last: true
55
+
56
+ test 'Shifting an explicit value out of TDO'
57
+ jtag.shift 0x1234, size: 16, cycle_last: true, read: true
58
+
59
+ test 'Shift register into TDI'
60
+ reg.write(0xFF01)
61
+ cc 'Full register (16 bits)'
62
+ jtag.shift reg, cycle_last: true
63
+ cc 'Full register with additional size (32 bits)'
64
+ jtag.shift reg, cycle_last: true, size: 32
65
+ cc 'Full register with reduced size (8 bits)'
66
+ jtag.shift reg, cycle_last: true, size: 8, includes_last_bit: false
67
+
68
+ test 'Shift register into TDI with overlay'
69
+ reg.overlay('write_overlay')
70
+ cc 'Full register (16 bits)'
71
+ tester.cycle # Give a padding cycle as a place for the subroutine call to go
72
+ jtag.shift reg, cycle_last: true
73
+ cc 'Full register with additional size (32 bits)'
74
+ tester.cycle # Give a padding cycle as a place for the subroutine call to go
75
+ jtag.shift reg, cycle_last: true, size: 32
76
+ cc 'Full register with reduced size (8 bits)'
77
+ tester.cycle # Give a padding cycle as a place for the subroutine call to go
78
+ jtag.shift reg, cycle_last: true, size: 8, includes_last_bit: false
79
+ cc 'It should in-line overlays when running in simulation mode'
80
+ Origen.mode = :simulation
81
+ tester.cycle # Give a padding cycle as a place for the subroutine call to go
82
+ jtag.shift reg, cycle_last: true
83
+ Origen.mode = :debug
84
+ if tester.respond_to?('label')
85
+ cc 'Full register overlay without using subroutine'
86
+ jtag.shift reg, cycle_last: true, no_subr: true
87
+ end
88
+
89
+ test 'Shift register into TDI with single bit overlay'
90
+ reg.overlay(nil)
91
+ reg.bit(:bit).overlay('write_overlay2')
92
+ tester.cycle # Give a padding cycle as a place for the subroutine call to go
93
+ jtag.shift reg, cycle_last: true
94
+ reg.overlay(nil)
95
+
96
+ test 'Read register out of TDO'
97
+ cc 'Full register (16 bits)'
98
+ reg.read
99
+ jtag.shift reg, cycle_last: true, read: true
100
+ cc 'Full register with additional size (32 bits)'
101
+ reg.read
102
+ jtag.shift reg, cycle_last: true, size: 32, read: true
103
+ cc 'Full register with reduced size (8 bits)'
104
+ reg.read
105
+ jtag.shift reg, cycle_last: true, size: 8, read: true, includes_last_bit: false
106
+
107
+ test 'Read single bit out of TDO'
108
+ reg.bit(:bit).read
109
+ jtag.shift reg, cycle_last: true, read: true
110
+
111
+ test 'Store register out of TDO'
112
+ cc 'Full register (16 bits)'
113
+ reg.store
114
+ jtag.shift reg, cycle_last: true, read: true
115
+ cc 'Full register with additional size (32 bits)'
116
+ reg.store
117
+ jtag.shift reg, cycle_last: true, size: 32, read: true
118
+ cc 'Full register with reduced size (8 bits)'
119
+ reg.store
120
+ jtag.shift reg, cycle_last: true, size: 8, read: true, includes_last_bit: false
121
+
122
+ test 'Store single bit out of TDO'
123
+ reg.bit(:bit).store
124
+ jtag.shift reg, cycle_last: true, read: true
125
+
126
+ test 'Test flag clear, bit 0 should be read, but not stored'
127
+ reg.bit(:bit).read
128
+ jtag.shift reg, cycle_last: true, read: true
129
+
130
+ test 'Shift register out of TDO with overlay'
131
+ reg.overlay('read_overlay')
132
+ cc 'Full register (16 bits)'
133
+ tester.cycle # Give a padding cycle as a place for the subroutine call to go
134
+ jtag.shift reg, cycle_last: true, read: true
135
+ cc 'Full register with additional size (32 bits)'
136
+ tester.cycle # Give a padding cycle as a place for the subroutine call to go
137
+ jtag.shift reg, cycle_last: true, size: 32, read: true
138
+ cc 'Full register with reduced size (8 bits)'
139
+ tester.cycle # Give a padding cycle as a place for the subroutine call to go
140
+ jtag.shift reg, cycle_last: true, size: 8, read: true, includes_last_bit: false
141
+ cc 'It should in-line overlays when running in simulation mode'
142
+ Origen.mode = :simulation
143
+ tester.cycle # Give a padding cycle as a place for the subroutine call to go
144
+ jtag.shift reg, cycle_last: true, read: true
145
+ Origen.mode = :debug
146
+ if tester.respond_to?('label')
147
+ cc 'Full register overlay without using subroutine'
148
+ jtag.shift reg, cycle_last: true, read: true, no_subr: true
149
+ end
150
+
151
+ test 'Shift register out of TDO with single bit overlay'
152
+ reg.overlay(nil)
153
+ reg.bit(:bit).overlay('read_overlay2')
154
+ tester.cycle # Give a padding cycle as a place for the subroutine call to go
155
+ jtag.shift reg, cycle_last: true
156
+ reg.overlay(nil)
157
+
158
+ # Finally integration tests of the TAPController + shift
159
+
160
+ test 'Write value into DR'
161
+ jtag.write_dr 0xFFFF, size: 16, msg: 'Write value into DR'
162
+
163
+ test 'Write value into DR, with compare on TDO'
164
+ jtag.write_dr 0xFFFF, size: 16, shift_out_data: 0xAAAA, msg: 'Write value into DR'
165
+
166
+ test 'Write register into DR with full-width overlay'
167
+ r = $dut.reg(:test32)
168
+ r.overlay('write_overlay')
169
+ jtag.write_dr r
170
+ r.overlay(nil)
171
+
172
+ test 'Read value out of DR'
173
+ jtag.read_dr 0xFFFF, size: 16, msg: 'Read value out of DR'
174
+
175
+ test 'Store value out of DR'
176
+ r.store
177
+ jtag.read_dr r
178
+
179
+
180
+ test 'Read value out of DR, with specified shift in data into TDI'
181
+ jtag.read_dr 0xFFFF, size: 16, shift_in_data: 0x5555, msg: 'Read value out of DR'
182
+
183
+ test 'Write value into IR'
184
+ jtag.write_ir 0xF, size: 4, msg: 'Write value into IR'
185
+
186
+ test 'Read value out of IR'
187
+ jtag.read_ir 0xF, size: 4, msg: 'Read value out of IR'
188
+
189
+ test 'The IR value is tracked and duplicate writes are inhibited'
190
+ jtag.write_ir 0xF, size: 4
191
+
192
+ test 'Unless forced'
193
+ jtag.write_ir 0xF, size: 4, force: true
194
+
195
+ test 'Reset'
196
+ jtag.reset
197
+
198
+ test 'Suspend of compare on TDO works'
199
+ cc 'TDO should be H'
200
+ jtag.read_dr 0xFFFF, size: 16, msg: 'Read value out of DR'
201
+ tester.ignore_fails($dut.pin(:tdo)) do
202
+ cc 'TDO should be X'
203
+ jtag.read_dr 0xFFFF, size: 16, msg: 'Read value out of DR'
204
+ end
205
+ cc 'TDO should be H'
206
+ jtag.read_dr 0xFFFF, size: 16, msg: 'Read value out of DR'
207
+
208
+ test 'Mask option for read_dr works'
209
+ cc 'TDO should be H'
210
+ jtag.read_dr 0xFFFF, size: 16, mask: 0x5555, msg: 'Read value out of DR'
211
+
212
+ test 'Write value into DR, with compare on TDO'
213
+ jtag.write_dr 0x5555, size: 16, shift_out_data: 0xAAAA, mask: 0x00FF, msg: 'Write value into DR'
214
+
215
+ test 'Shifting an explicit value out of TDO with mask'
216
+ jtag.shift 0x1234, size: 16, read: true, mask: 0xFF00
217
+
218
+ test 'Shifting an explicit value into TDI (and out of TDO)'
219
+ jtag.shift 0x1234, size: 16, cycle_last: true, shift_out_data: 0xAAAA, mask: 0x0F0F
220
+ end