origen_jtag 0.13.0 → 0.14.0

checksums.yaml

@@ -1,7 +1,7 @@
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-  data.tar.gz: bc0fc81b5fcbcb71ccd669ea535f4ea80a6dc1c3
+  metadata.gz: 02b837da449c42cd29928bf58d3f793a1e9f7e45
+  data.tar.gz: 671bab411d61f7b7b14e1a9bc52c88b4f27345f6
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+  data.tar.gz: eceb297fc81700389c1edef3f99b5574a4019240c934366bf5b25eb918824b9daf0ce3dc909cff4da95e51c3d8bb0a59b1fe7ac9a0b246834b0457247cc0a89f

data/config/boot.rb

@@ -0,0 +1,24 @@
+# This file is used to boot your plugin when it is running in standalone mode
+# from its own workspace - i.e. when the plugin is being developed.
+#
+# It will not be loaded when the plugin is imported by a 3rd party app - in that
+# case only lib/origen_jtag.rb is loaded.
+#
+# Therefore this file can be used to load anything extra that you need to boot
+# the development environment for this app. For example this is typically used
+# to load some additional test classes to use your plugin APIs so that they can
+# be tested and/or interacted with in the console.
+require 'origen_jtag'
+
+module OrigenJTAGDev
+  # Example of how to explicitly require a file
+  # require "origen_jtag_dev/my_file"
+    
+  # Load all files in the lib/origen_jtag_dev directory.
+  # Note that there is no problem from requiring a file twice (Ruby will ignore
+  # the second require), so if you have a file that must be required first, then
+  # explicitly require it up above and then let this take care of the rest.
+  Dir.glob("#{File.dirname(__FILE__)}/../lib/origen_jtag_dev/**/*.rb").sort.each do |file|
+    require file
+  end
+end

data/config/commands.rb

@@ -18,27 +18,32 @@ aliases ={
 case @command
 
 ## Run the unit tests  
-#when "specs"
-#  require "rspec"
-#  exit RSpec::Core::Runner.run(['spec'])
+when "specs"
+  require "rspec"
+  exit RSpec::Core::Runner.run(['spec'])
 
-when "examples"  
+when "examples", "test"  
   Origen.load_application
   status = 0
 
   # Pattern generator tests
-  ARGV = %w(jtag_workout -t v93k.rb -r approved)
+  ARGV = %w(jtag_workout -t debug_RH1 -e v93k -r approved)
   load "#{Origen.top}/lib/origen/commands/generate.rb"
-  ARGV = %w(jtag_workout -t debug_RH1 -r approved)
+  ARGV = %w(jtag_workout -t debug_RH1 -e j750.rb -r approved)
   load "#{Origen.top}/lib/origen/commands/generate.rb"
-  ARGV = %w(jtag_workout -t debug_RL1 -r approved)
+  ARGV = %w(jtag_workout -t debug_RL1 -e j750.rb -r approved)
   load "#{Origen.top}/lib/origen/commands/generate.rb"
 
-  ARGV = %w(jtag_workout -t v93k_RH4.rb -r approved)
+  ARGV = %w(jtag_workout -t debug_RH2.rb -e j750.rb -r approved)
   load "#{Origen.top}/lib/origen/commands/generate.rb"
-  ARGV = %w(jtag_workout -t debug_RH4 -r approved)
+  ARGV = %w(jtag_workout -t debug_RH2_1.rb -e j750.rb -r approved)
   load "#{Origen.top}/lib/origen/commands/generate.rb"
-  ARGV = %w(jtag_workout -t debug_RL4 -r approved)
+
+  ARGV = %w(jtag_workout -t debug_RH4 -e v93k -r approved)
+  load "#{Origen.top}/lib/origen/commands/generate.rb"
+  ARGV = %w(jtag_workout -t debug_RH4 -e j750.rb -r approved)
+  load "#{Origen.top}/lib/origen/commands/generate.rb"
+  ARGV = %w(jtag_workout -t debug_RL4 -e j750.rb -r approved)
   load "#{Origen.top}/lib/origen/commands/generate.rb"
   
   if Origen.app.stats.changed_files == 0 &&
@@ -52,6 +57,12 @@ when "examples"
     status = 1
   end
   puts
+  if @command == "test"
+    Origen.app.unload_target!
+    require "rspec"
+    result = RSpec::Core::Runner.run(['spec'])
+    status = status == 1 ? 1 : result
+  end
   exit status
 
 # Always leave an else clause to allow control to fall back through to the
@@ -61,7 +72,9 @@ when "examples"
 # before handing control back to Origen. Un-comment the example below to get started.
 else
   @application_commands = <<-EOT
+ specs        Run the specs (tests), -c will enable coverage
  examples     Run the examples (tests), -c will enable coverage
+ test         Run both specs and examples, -c will enable coverage
   EOT
 
 end 

data/config/version.rb

@@ -1,6 +1,6 @@
 module OrigenJTAG
   MAJOR = 0
-  MINOR = 13
+  MINOR = 14
   BUGFIX = 0
   DEV = nil
 

data/lib/origen_jtag/driver.rb

@@ -42,7 +42,7 @@ module OrigenJTAG
       # Fallback defaults
       options = {
         verbose:         false,
-        tclk_format:     :rh,                  # format of JTAG clock used:  ReturnHigh (:rh), ReturnLo (:rl)
+        tclk_format:     :rh,                # format of JTAG clock used:  ReturnHigh (:rh), ReturnLo (:rl)
         tclk_multiple:   1,                  # number of cycles for one clock pulse, assumes 50% duty cycle. Uses tester non-return format to spread TCK across multiple cycles.
         #    e.g. @tclk_multiple = 2, @tclk_format = :rh, means one cycle with Tck low (non-return), one with Tck high (NR)
         #         @tclk_multiple = 4, @tclk_format = :rl, means 2 cycles with Tck high (NR), 2 with Tck low (NR)
@@ -108,111 +108,91 @@ module OrigenJTAG
         includes_last_bit: true,
         no_subr:           false      # do not use subroutine for any overlay
       }.merge(options)
+
+      # save compression state for restoring afterwards
+      compression_on = !Origen.tester.dont_compress
+
+      # clean incoming data
       size = extract_size(reg_or_val, options)
+      tdi_reg = extract_shift_in_data(reg_or_val, size, options)
+      tdo_reg = extract_shift_out_data(reg_or_val, size, options)
+      global_ovl, ovl_reg = extract_overlay_data(reg_or_val, size, options)
+
+      # tester does not support direct labels, so can't do
       if options[:no_subr] && !$tester.respond_to?('label')
-        # tester does not support direct labels, so can't do
         cc 'This tester does not support use of labels, cannot do no_subr option as requested'
         cc '  going with subroutine overlay instead'
         options[:no_subr] = false
       end
-      if options.key?(:arm_debug_comment)
-        cc options[:arm_debug_comment]
-      end
-      if options.key?(:arm_debug_overlay)
-        $tester.label(options[:arm_debug_overlay])
+
+      # insert global label if specified
+      if global_ovl
+        if $tester.respond_to?('label')
+          $tester.label(global_ovl, true)
+        else
+          cc "Unsupported global label: #{global_ovl}"
+        end
       end
-      size = extract_size(reg_or_val, options)
-      contains_bits = (contains_bits?(reg_or_val) || is_a_bit?(reg_or_val))
-      owner.pin(:tdi).drive(0) # Drive state when reading out
-      owner.pin(:tms).drive(0)
+
+      # loop through each data bit
       last_overlay_label = ''
       size.times do |i|
-        call_subroutine = false
-        direct_overlay = false
-        if options[:read]
-          # If it's a register support bit-wise reads
-          if contains_bits
-            if reg_or_val[i]
-              if reg_or_val[i].is_to_be_stored?
-                Origen.tester.store_next_cycle(owner.pin(:tdo))
-                owner.pin(:tdo).dont_care if Origen.tester.j750?
-              elsif reg_or_val[i].has_overlay?
-                if Origen.mode.simulation?
-                  owner.pin(:tdo).dont_care
-                else
-                  if options[:no_subr]
-                    Origen.tester.dont_compress = true
-                    if reg_or_val[i].overlay_str != last_overlay_label
-                      $tester.label(reg_or_val[i].overlay_str)
-                      last_overlay_label = reg_or_val[i].overlay_str
-                    end
-                    owner.pin(:tdo).assert(reg_or_val[i] ? reg_or_val[i] : 0)
-                  else
-                    call_subroutine = reg_or_val[i].overlay_str
-                  end
-                end
-              elsif reg_or_val[i].is_to_be_read?
-                owner.pin(:tdo).assert(reg_or_val[i] ? reg_or_val[i] : 0)
-              elsif options.key?(:compare_data)
-                if i.eql?(0) || i.eql?(1) || i.eql?(2)
-                  # Skip comparing first three status bits
-                  owner.pin(:tdo).dont_care
-                else
-                  owner.pin(:tdo).assert(reg_or_val[i] ? reg_or_val[i] : 0)
-                end
-              else
-                owner.pin(:tdo).dont_care
-              end
-            # If the read width extends beyond the register boundary, don't care
-            # the extra bits
-            else
-              owner.pin(:tdo).dont_care
-            end
-          # Otherwise read the whole thing
-          else
-            Origen.tester.dont_compress = false
-            owner.pin(:tdo).assert(reg_or_val[i] ? reg_or_val[i] : 0)
+        store_tdo_this_tclk = false
+
+        # Set up pin actions for bit transaction (tclk cycle)
+
+        # TDI
+        owner.pin(:tdi).drive(tdi_reg[i])
+
+        # TDO
+        owner.pin(:tdo).dont_care                               # default setting
+        if tdo_reg[i]
+          if tdo_reg[i].is_to_be_stored?                        # store
+            store_tdo_this_tclk = true
+            owner.pin(:tdo).dont_care if Origen.tester.j750?
+          elsif tdo_reg[i].is_to_be_read?                       # compare/assert
+            owner.pin(:tdo).assert(tdo_reg[i])
           end
-        else
-          if contains_bits && reg_or_val[i] && reg_or_val[i].has_overlay?
-            if Origen.mode.simulation?
-              owner.pin(:tdi).drive(reg_or_val[i] ? reg_or_val[i] : 0)
-            else
-              if options[:no_subr]
-                Origen.tester.dont_compress = true
-                if reg_or_val[i].overlay_str != last_overlay_label
-                  $tester.label(reg_or_val[i].overlay_str)
-                  last_overlay_label = reg_or_val[i].overlay_str
-                end
-                owner.pin(:tdi).drive(reg_or_val[i] ? reg_or_val[i] : 0)
-              else
-                call_subroutine = reg_or_val[i].overlay_str
-              end
-            end
-          elsif options.key?(:arm_debug_overlay)
-            if Origen.mode.simulation?
-              owner.pin(:tdi).drive(reg_or_val[i] ? reg_or_val[i] : 0)
-            else
-              $tester.label('// JTAG DATA Pin: ' + i.to_s)
-              owner.pin(:tdi).drive(reg_or_val[i] ? reg_or_val[i] : 0)
+        end
+
+        # TMS
+        owner.pin(:tms).drive(0)
+
+        # Overlay - reconfigure pin action for overlay if necessary
+        if ovl_reg[i] && ovl_reg[i].has_overlay? && !Origen.mode.simulation?
+          if options[:no_subr]
+            Origen.tester.dont_compress = true
+            if ovl_reg[i].overlay_str != last_overlay_label
+              $tester.label(ovl_reg[i].overlay_str)
+              last_overlay_label = ovl_reg[i].overlay_str
             end
+            owner.pin(:tdo).assert(tdo_reg[i]) if options[:read]
           else
-            Origen.tester.dont_compress = false
-            owner.pin(:tdi).drive(reg_or_val[i] ? reg_or_val[i] : 0)
+            owner.pin(:tdi).drive(0)
+            call_subroutine = ovl_reg[i].overlay_str
           end
         end
+
+        # With JTAG pin actions queued up, use block call to tclk_cycle to
+        #   execute a single TCLK period.  Special handling of subroutines,
+        #   case of last bit in shift, and store vector (within a multi-cycle
+        #   tclk config).
         if call_subroutine
           Origen.tester.call_subroutine(call_subroutine)
           @last_data_vector_shifted = true
         else
           @last_data_vector_shifted = false
-          # Don't latch the last bit, that will be done when
-          # leaving the state.
+          @next_data_vector_to_be_stored = false
+
+          # Don't latch the last bit, that will be done when leaving the state.
           if i != size - 1 || options[:cycle_last]
             if i == size - 1 && options[:includes_last_bit]
               owner.pin(:tms).drive(1)
             end
             tclk_cycle do
+              if store_tdo_this_tclk && @next_data_vector_to_be_stored
+                Origen.tester.store_next_cycle(owner.pin(:tdo))
+              end
               Origen.tester.cycle
             end
             owner.pin(:tdo).dont_care
@@ -221,11 +201,12 @@ module OrigenJTAG
           end
         end
       end
-      # Clear read and similar flags to reflect that the request has just
-      # been fulfilled
+
+      # Clear read and similar flags to reflect that the request has just been fulfilled
       reg_or_val.clear_flags if reg_or_val.respond_to?(:clear_flags)
+
       # put back compression if turned on above
-      Origen.tester.dont_compress = false
+      Origen.tester.dont_compress = false if compression_on
     end
 
     # Cycles the tester through one TCLK cycle
@@ -250,7 +231,7 @@ module OrigenJTAG
       mask_tdo_half1 =  ((@tclk_format == :rl) && (@tdo_strobe == :tclk_high) && (@tclk_multiple > 1)) ||
                         ((@tclk_format == :rh) && (@tdo_strobe == :tclk_low) && (@tclk_multiple > 1))
 
-      # determine whether TDO is set to capture for this TCK cycle
+      # determine whether TDO is set to capture for this TCLK cycle
       tdo_to_be_captured = owner.pin(:tdo).to_be_captured?
 
       # If TDO is already suspended (by an application) then don't do the
@@ -260,9 +241,7 @@ module OrigenJTAG
       @tclk_multiple.times do |i|
         # 50% duty cycle if @tclk_multiple is even, otherwise slightly off
 
-        if tdo_to_be_captured
-          owner.pin(:tdo).state = @tdo_store_cycle == i ? :capture : :dont_care
-        end
+        @next_data_vector_to_be_stored = @tdo_store_cycle == i ? true : false
 
         if i < (@tclk_multiple + 1) / 2
           # first half of cycle
@@ -340,9 +319,6 @@ module OrigenJTAG
         end
         val = reg_or_val.respond_to?(:data) ? reg_or_val.data : reg_or_val
         shift_dr(write: val.to_hex) do
-          if options[:overlay] == true
-            $tester.label(options[:overlay_label], true) # apply global label
-          end
           shift(reg_or_val, options)
         end
       end
@@ -376,9 +352,6 @@ module OrigenJTAG
           cc "#{options[:msg]}\n"
         end
         shift_dr(read: Origen::Utility.read_hex(reg_or_val)) do
-          if options[:overlay] == true
-            $tester.label(options[:overlay_label], true) # apply global label
-          end
           shift(reg_or_val, options)
         end
       end
@@ -456,6 +429,8 @@ module OrigenJTAG
 
     private
 
+    # Return size of transaction.  Options[:size] has priority and need not match the
+    #   register size.  Any mismatch will be handled by the api.
     def extract_size(reg_or_val, options = {})
       size = options[:size]
       unless size
@@ -468,6 +443,84 @@ module OrigenJTAG
       size
     end
 
+    # Combine any legacy options into a single global overlay and create
+    #   new bit collection to track any bit-wise overlays.
+    def extract_overlay_data(reg_or_val, size, options = {})
+      if reg_or_val.respond_to?(:data)
+        ovl = reg_or_val.dup
+      else
+        ovl = Reg.dummy(size)
+      end
+
+      if options[:overlay]
+        global = options[:overlay_label]
+      elsif options.key?(:arm_debug_overlay)   # prob don't need this anymore
+        global = options[:arm_debug_overlay]   # prob don't need this anymore
+      else
+        global = nil
+      end
+
+      [global, ovl]
+    end
+
+    # Create data that will be shifted in on TDI, create new bit collection
+    #   on the fly if reg_or_val arg is data only.  Consider read operation
+    #   where caller has requested (specific) shift in data to be used.
+    def extract_shift_in_data(reg_or_val, size, options = {})
+      if reg_or_val.respond_to?(:data)
+        if options[:read]
+          data = options[:shift_in_data] || 0
+          tdi = Reg.dummy(size)
+          tdi.write(data)
+        else
+          tdi = reg_or_val.dup
+        end
+      else
+        # Not a register model, so can't support bit-wise overlay
+        tdi = Reg.dummy(size)
+        if options[:read]
+          data = options[:shift_in_data] || 0
+          tdi.write(data)
+        else
+          tdi.write(reg_or_val)
+        end
+      end
+      tdi
+    end
+
+    # Create data that will be shifted out on TDO, create new bit collection
+    #   on the fly if reg_or_val arg is data only.  Consider write operation
+    #   where caller has requested (specific) shift out data to be compared.
+    def extract_shift_out_data(reg_or_val, size, options = {})
+      if reg_or_val.respond_to?(:data)
+        if options[:read]
+          tdo = reg_or_val.dup
+        else
+          tdo = Reg.dummy(size)
+          if options[:shift_out_data]
+            tdo.write(options[:shift_out_data])
+            tdo.read
+          else
+            tdo.write(0)
+          end
+        end
+      else
+        tdo = Reg.dummy(size)
+        if options[:read]
+          tdo.write(reg_or_val)
+          tdo.read
+        else
+          if options[:shift_out_data]
+            tdo.write(options[:shift_out_data])
+            tdo.read
+          else
+            tdo.write(0)
+          end
+        end
+      end
+      tdo
+    end
+
     # Validates that the parent object (the owner) has defined the necessary
     # pins to implement the JTAG
     def validate_pins

data/lib/{origen_jtag/dut.rb → origen_jtag_dev/top_level.rb}

@@ -1,14 +1,14 @@
-module OrigenJTAG
+module OrigenJTAGDev
   # This is a dummy DUT model which is used
   # to instantiate and test the JTAG locally
   # during development.
   #
   # It is not included when this library is imported.
   class DUT
+    include Origen::TopLevel
     include OrigenJTAG
-    include Origen::Callbacks
-    include Origen::Registers
-    include Origen::Pins
+
+    attr_reader :jtag_config
 
     JTAG_CONFIG = {
       verbose:         true,
@@ -25,40 +25,66 @@ module OrigenJTAG
       JTAG_CONFIG[:tdo_strobe] = options[:tdo_strobe] if options[:tdo_strobe]
       JTAG_CONFIG[:tdo_store_cycle] = options[:tdo_store_cycle] if options[:tdo_store_cycle]
       JTAG_CONFIG[:init_state] = options[:init_state] if options[:init_state]
+
+      instantiate_registers(options)
+      instantiate_pins(options)
+    end
+
+    def instantiate_registers(options = {})
+      reg :test16, 0x0012, size: 16 do |reg|
+        reg.bit 15..8, :bus
+        reg.bit 0, :bit
+      end
+
+      reg :test32, 0x0014, size: 32 do |reg|
+        reg.bit 31..16, :bus
+        reg.bit 0, :bit
+      end
     end
 
+    def instantiate_pins(options = {})
+      add_pin :tclk
+      add_pin :tdi
+      add_pin :tdo
+      add_pin :tms
+    end
+
+    def startup(options = {})
+      tester.set_timeset('nvmbist', 40)
+    end
+
+    # Getter for top-level tclk_format setting
     def tclk_format
       JTAG_CONFIG[:tclk_format]
     end
 
+    # Getter for top-level tclk_multiple setting
     def tclk_multiple
       JTAG_CONFIG[:tclk_multiple]
     end
 
+    # Getter for top-level tdo_strobe setting
     def tdo_strobe
       JTAG_CONFIG[:tdo_strobe]
     end
 
+    # Getter for top-level tdo_store_cycle setting
     def tdo_store_cycle
       JTAG_CONFIG[:tdo_store_cycle]
     end
 
+    # Getter for top-level init_state setting
     def init_state
       JTAG_CONFIG[:init_state]
     end
 
-    def on_create
-      add_reg :test16, 0x0012, 16, bus: { pos: 8, bits: 8 },
-                                   bit: { pos: 0 }
-
-      add_reg :test32, 0x0014, 32, bus: { pos: 16, bits: 16 },
-                                   bit: { pos: 0 }
-
-      $tester.set_timeset('nvmbist', 40)
-      add_pin :tclk
-      add_pin :tdi
-      add_pin :tdo
-      add_pin :tms
+    # Wouldn't want to do this in reality, but allows some flexibility duing gem testing
+    def update_jtag_config(cfg, val)
+      if JTAG_CONFIG.key?(cfg)
+        JTAG_CONFIG[cfg] = val
+      else
+        fail "#{cfg} not a part of JTAG_CONFIG"
+      end
     end
   end
 end

data/pattern/jtag_workout.rb

@@ -1,4 +1,7 @@
-Pattern.create(options={:name => "jtag_workout_#{$dut.tclk_format.upcase}#{$dut.tclk_multiple}"}) do
+pat_name = "jtag_workout_#{$dut.tclk_format.upcase}#{$dut.tclk_multiple}"
+pat_name = pat_name + "_#{dut.tdo_store_cycle}" if dut.tdo_store_cycle != 0
+
+Pattern.create(options = { name: pat_name }) do
   def test(msg)
     ss "Test - #{msg}"
   end
@@ -8,185 +11,190 @@ Pattern.create(options={:name => "jtag_workout_#{$dut.tclk_format.upcase}#{$dut.
 
   # First tests of the TAP Controller
 
-  test "Transition TAP controller in and out of Shift-DR"
-  jtag.shift_dr { }
+  test 'Transition TAP controller in and out of Shift-DR'
+  jtag.shift_dr {}
 
-  test "Transition TAP controller in and out of Pause-DR"
-  jtag.pause_dr { }
+  test 'Transition TAP controller in and out of Pause-DR'
+  jtag.pause_dr {}
 
-  test "Transition TAP controller in and out of Shift-IR"
-  jtag.shift_ir { }
+  test 'Transition TAP controller in and out of Shift-IR'
+  jtag.shift_ir {}
 
-  test "Transition TAP controller in and out of Pause-IR"
-  jtag.pause_ir { }
+  test 'Transition TAP controller in and out of Pause-IR'
+  jtag.pause_ir {}
 
-  test "Transition into Shift-DR, then back and forth into Pause-DR"
+  test 'Transition into Shift-DR, then back and forth into Pause-DR'
   jtag.shift_dr do
-    jtag.pause_dr { }
-    jtag.pause_dr { }
+    jtag.pause_dr {}
+    jtag.pause_dr {}
   end
 
-  test "Transition into Pause-DR, then back and forth into Shift-DR"
+  test 'Transition into Pause-DR, then back and forth into Shift-DR'
   jtag.pause_dr do
-    jtag.shift_dr { }
-    jtag.shift_dr { }
+    jtag.shift_dr {}
+    jtag.shift_dr {}
   end
-  
-  test "Transition into Shift-IR, then back and forth into Pause-IR"
+
+  test 'Transition into Shift-IR, then back and forth into Pause-IR'
   jtag.shift_ir do
-    jtag.pause_ir { }
-    jtag.pause_ir { }
+    jtag.pause_ir {}
+    jtag.pause_ir {}
   end
 
-  test "Transition into Pause-IR, then back and forth into Shift-IR"
+  test 'Transition into Pause-IR, then back and forth into Shift-IR'
   jtag.pause_ir do
-    jtag.shift_ir { }
-    jtag.shift_ir { }
+    jtag.shift_ir {}
+    jtag.shift_ir {}
   end
 
   # Tests of the shift method, make sure it handles registers with
   # bit-level flags set in additional to dumb values
 
-  test "Shifting an explicit value into TDI"
-  jtag.shift 0x1234, :size => 16, :cycle_last => true
-
-  test "Shifting an explicit value out of TDO"
-  jtag.shift 0x1234, :size => 16, :cycle_last => true, :read => true
-
-  test "Shift register into TDI"
-    reg.write(0xFF01)
-    cc "Full register (16 bits)"
-    jtag.shift reg, :cycle_last => true
-    cc "Full register with additional size (32 bits)"
-    jtag.shift reg, :cycle_last => true, :size => 32
-    cc "Full register with reduced size (8 bits)"
-    jtag.shift reg, :cycle_last => true, :size => 8, :includes_last_bit => false
-
-  test "Shift register into TDI with overlay"
-    reg.overlay("write_overlay")
-    cc "Full register (16 bits)"
-    Origen.tester.cycle  # Give a padding cycle as a place for the subroutine call to go
-    jtag.shift reg, :cycle_last => true
-    cc "Full register with additional size (32 bits)"
-    Origen.tester.cycle  # Give a padding cycle as a place for the subroutine call to go
-    jtag.shift reg, :cycle_last => true, :size => 32
-    cc "Full register with reduced size (8 bits)"
-    Origen.tester.cycle  # Give a padding cycle as a place for the subroutine call to go
-    jtag.shift reg, :cycle_last => true, :size => 8, :includes_last_bit => false
-    cc "It should in-line overlays when running in simulation mode"
-    Origen.mode = :simulation
-    Origen.tester.cycle  # Give a padding cycle as a place for the subroutine call to go
-    jtag.shift reg, :cycle_last => true
-    Origen.mode = :debug
-    if $tester.respond_to?('label')
-      cc "Full register overlay without using subroutine"
-      jtag.shift reg, :cycle_last => true, :no_subr => true
-    end
-
-  test "Shift register into TDI with single bit overlay"
-    reg.overlay(nil)
-    reg.bit(:bit).overlay("write_overlay2")
-    Origen.tester.cycle  # Give a padding cycle as a place for the subroutine call to go
-    jtag.shift reg, :cycle_last => true
-    reg.overlay(nil)
-
-  test "Read register out of TDO"
-    cc "Full register (16 bits)"
-    reg.read
-    jtag.shift reg, :cycle_last => true, :read => true
-    cc "Full register with additional size (32 bits)"
-    reg.read
-    jtag.shift reg, :cycle_last => true, :size => 32, :read => true
-    cc "Full register with reduced size (8 bits)"
-    reg.read
-    jtag.shift reg, :cycle_last => true, :size => 8, :read => true, :includes_last_bit => false
-
-  test "Read single bit out of TDO"
-    reg.bit(:bit).read
-    jtag.shift reg, :cycle_last => true, :read => true
-
-  test "Store register out of TDO"
-    cc "Full register (16 bits)"
-    reg.store
-    jtag.shift reg, :cycle_last => true, :read => true
-    cc "Full register with additional size (32 bits)"
-    reg.store
-    jtag.shift reg, :cycle_last => true, :size => 32, :read => true
-    cc "Full register with reduced size (8 bits)"
-    reg.store
-    jtag.shift reg, :cycle_last => true, :size => 8, :read => true, :includes_last_bit => false
-
-  test "Store single bit out of TDO"
-    reg.bit(:bit).store
-    jtag.shift reg, :cycle_last => true, :read => true
-
-  test "Test flag clear, bit 0 should be read, but not stored"
-    reg.bit(:bit).read
-    jtag.shift reg, :cycle_last => true, :read => true
-
-  test "Shift register out of TDO with overlay"
-    reg.overlay("read_overlay")
-    cc "Full register (16 bits)"
-    Origen.tester.cycle  # Give a padding cycle as a place for the subroutine call to go
-    jtag.shift reg, :cycle_last => true, :read => true
-    cc "Full register with additional size (32 bits)"
-    Origen.tester.cycle  # Give a padding cycle as a place for the subroutine call to go
-    jtag.shift reg, :cycle_last => true, :size => 32, :read => true
-    cc "Full register with reduced size (8 bits)"
-    Origen.tester.cycle  # Give a padding cycle as a place for the subroutine call to go
-    jtag.shift reg, :cycle_last => true, :size => 8, :read => true, :includes_last_bit => false
-    cc "It should in-line overlays when running in simulation mode"
-    Origen.mode = :simulation
-    Origen.tester.cycle  # Give a padding cycle as a place for the subroutine call to go
-    jtag.shift reg, :cycle_last => true, :read => true
-    Origen.mode = :debug
-    if $tester.respond_to?('label')
-      cc "Full register overlay without using subroutine"
-      jtag.shift reg, :cycle_last => true, :read => true, :no_subr => true
-    end
-
-  test "Shift register out of TDO with single bit overlay"
-    reg.overlay(nil)
-    reg.bit(:bit).overlay("read_overlay2")
-    Origen.tester.cycle  # Give a padding cycle as a place for the subroutine call to go
-    jtag.shift reg, :cycle_last => true
-    reg.overlay(nil)
+  test 'Shifting an explicit value into TDI'
+  jtag.shift 0x1234, size: 16, cycle_last: true
+
+  test 'Shifting an explicit value out of TDO'
+  jtag.shift 0x1234, size: 16, cycle_last: true, read: true
+
+  test 'Shift register into TDI'
+  reg.write(0xFF01)
+  cc 'Full register (16 bits)'
+  jtag.shift reg, cycle_last: true
+  cc 'Full register with additional size (32 bits)'
+  jtag.shift reg, cycle_last: true, size: 32
+  cc 'Full register with reduced size (8 bits)'
+  jtag.shift reg, cycle_last: true, size: 8, includes_last_bit: false
+
+  test 'Shift register into TDI with overlay'
+  reg.overlay('write_overlay')
+  cc 'Full register (16 bits)'
+  tester.cycle  # Give a padding cycle as a place for the subroutine call to go
+  jtag.shift reg, cycle_last: true
+  cc 'Full register with additional size (32 bits)'
+  tester.cycle  # Give a padding cycle as a place for the subroutine call to go
+  jtag.shift reg, cycle_last: true, size: 32
+  cc 'Full register with reduced size (8 bits)'
+  tester.cycle  # Give a padding cycle as a place for the subroutine call to go
+  jtag.shift reg, cycle_last: true, size: 8, includes_last_bit: false
+  cc 'It should in-line overlays when running in simulation mode'
+  Origen.mode = :simulation
+  tester.cycle  # Give a padding cycle as a place for the subroutine call to go
+  jtag.shift reg, cycle_last: true
+  Origen.mode = :debug
+  if tester.respond_to?('label')
+    cc 'Full register overlay without using subroutine'
+    jtag.shift reg, cycle_last: true, no_subr: true
+  end
+
+  test 'Shift register into TDI with single bit overlay'
+  reg.overlay(nil)
+  reg.bit(:bit).overlay('write_overlay2')
+  tester.cycle  # Give a padding cycle as a place for the subroutine call to go
+  jtag.shift reg, cycle_last: true
+  reg.overlay(nil)
+
+  test 'Read register out of TDO'
+  cc 'Full register (16 bits)'
+  reg.read
+  jtag.shift reg, cycle_last: true, read: true
+  cc 'Full register with additional size (32 bits)'
+  reg.read
+  jtag.shift reg, cycle_last: true, size: 32, read: true
+  cc 'Full register with reduced size (8 bits)'
+  reg.read
+  jtag.shift reg, cycle_last: true, size: 8, read: true, includes_last_bit: false
+
+  test 'Read single bit out of TDO'
+  reg.bit(:bit).read
+  jtag.shift reg, cycle_last: true, read: true
+
+  test 'Store register out of TDO'
+  cc 'Full register (16 bits)'
+  reg.store
+  jtag.shift reg, cycle_last: true, read: true
+  cc 'Full register with additional size (32 bits)'
+  reg.store
+  jtag.shift reg, cycle_last: true, size: 32, read: true
+  cc 'Full register with reduced size (8 bits)'
+  reg.store
+  jtag.shift reg, cycle_last: true, size: 8, read: true, includes_last_bit: false
+
+  test 'Store single bit out of TDO'
+  reg.bit(:bit).store
+  jtag.shift reg, cycle_last: true, read: true
+
+  test 'Test flag clear, bit 0 should be read, but not stored'
+  reg.bit(:bit).read
+  jtag.shift reg, cycle_last: true, read: true
+
+  test 'Shift register out of TDO with overlay'
+  reg.overlay('read_overlay')
+  cc 'Full register (16 bits)'
+  tester.cycle  # Give a padding cycle as a place for the subroutine call to go
+  jtag.shift reg, cycle_last: true, read: true
+  cc 'Full register with additional size (32 bits)'
+  tester.cycle  # Give a padding cycle as a place for the subroutine call to go
+  jtag.shift reg, cycle_last: true, size: 32, read: true
+  cc 'Full register with reduced size (8 bits)'
+  tester.cycle  # Give a padding cycle as a place for the subroutine call to go
+  jtag.shift reg, cycle_last: true, size: 8, read: true, includes_last_bit: false
+  cc 'It should in-line overlays when running in simulation mode'
+  Origen.mode = :simulation
+  tester.cycle  # Give a padding cycle as a place for the subroutine call to go
+  jtag.shift reg, cycle_last: true, read: true
+  Origen.mode = :debug
+  if tester.respond_to?('label')
+    cc 'Full register overlay without using subroutine'
+    jtag.shift reg, cycle_last: true, read: true, no_subr: true
+  end
+
+  test 'Shift register out of TDO with single bit overlay'
+  reg.overlay(nil)
+  reg.bit(:bit).overlay('read_overlay2')
+  tester.cycle  # Give a padding cycle as a place for the subroutine call to go
+  jtag.shift reg, cycle_last: true
+  reg.overlay(nil)
 
   # Finally integration tests of the TAPController + shift
 
-  test "Write value into DR"
-    jtag.write_dr 0xFFFF, :size => 16, :msg => "Write value into DR" 
+  test 'Write value into DR'
+  jtag.write_dr 0xFFFF, size: 16, msg: 'Write value into DR'
 
-  test "Write register into DR with full-width overlay"
-    r = $dut.reg(:test32).overlay("write_overlay")
-    jtag.write_dr r
+  test 'Write value into DR, with compare on TDO'
+  jtag.write_dr 0xFFFF, size: 16, shift_out_data: 0xAAAA, msg: 'Write value into DR'
 
-  test "Read value out of DR"
-    jtag.read_dr 0xFFFF, :size => 16, :msg => "Read value out of DR" 
+   test 'Write register into DR with full-width overlay'
+  r = $dut.reg(:test32).overlay('write_overlay')
+  jtag.write_dr r
 
-  test "Write value into IR"
-    jtag.write_ir 0xF, :size => 4, :msg => "Write value into IR"
+  test 'Read value out of DR'
+  jtag.read_dr 0xFFFF, size: 16, msg: 'Read value out of DR'
 
-  test "Read value out of IR"
-    jtag.read_ir 0xF, :size => 4, :msg => "Read value out of IR"
+  test 'Read value out of DR, with specified shift in data into TDI'
+  jtag.read_dr 0xFFFF, size: 16, shift_in_data: 0x5555, msg: 'Read value out of DR'
 
-  test "The IR value is tracked and duplicate writes are inhibited"
-    jtag.write_ir 0xF, :size => 4
+   test 'Write value into IR'
+  jtag.write_ir 0xF, size: 4, msg: 'Write value into IR'
 
-  test "Unless forced"
-    jtag.write_ir 0xF, :size => 4, :force => true
+  test 'Read value out of IR'
+  jtag.read_ir 0xF, size: 4, msg: 'Read value out of IR'
 
-  test "Reset"
-    jtag.reset
+  test 'The IR value is tracked and duplicate writes are inhibited'
+  jtag.write_ir 0xF, size: 4
 
-  test "Suspend of compare on TDO works"
-    cc "TDO should be H"
-    jtag.read_dr 0xFFFF, :size => 16, :msg => "Read value out of DR" 
-    $tester.ignore_fails($dut.pin(:tdo)) do
-      cc "TDO should be X"
-      jtag.read_dr 0xFFFF, :size => 16, :msg => "Read value out of DR" 
-    end
-    cc "TDO should be H"
-    jtag.read_dr 0xFFFF, :size => 16, :msg => "Read value out of DR" 
-    
+  test 'Unless forced'
+  jtag.write_ir 0xF, size: 4, force: true
+ 
+  test 'Reset'
+  jtag.reset
+
+  test 'Suspend of compare on TDO works'
+  cc 'TDO should be H'
+  jtag.read_dr 0xFFFF, size: 16, msg: 'Read value out of DR'
+  tester.ignore_fails($dut.pin(:tdo)) do
+    cc 'TDO should be X'
+    jtag.read_dr 0xFFFF, size: 16, msg: 'Read value out of DR'
+  end
+  cc 'TDO should be H'
+  jtag.read_dr 0xFFFF, size: 16, msg: 'Read value out of DR'
 end

data/templates/web/index.md.erb

@@ -82,14 +82,24 @@ These accept either an absolute data value or an Origen register/bit collection.
 
 ~~~ruby
 jtag.write_dr 0x1234, :size => 16
+
 # The size option is not required when a register is supplied
 jtag.write_dr $dut.reg(:clkdiv)
+
 # Although it can still be added if the register is not the full data width
 jtag.write_dr $dut.reg(:clkdiv), :size => 32
-# A rich read method is available which supports bit-level read, store and
-# overlay operations
+
+# A rich read method is available which supports bit-level read, store and overlay operations
 $dut.reg(:clkdiv).bits(:div).read(0x55)
 jtag.read $dut.reg(:clkdiv)
+
+# In cases where both shift in (TDI) and shift out data (TDO) are critical, (e.g. compare shift
+#  out data on a write, or shfit in specific data on a read) the shift_in_data and 
+#  shift_out_data options can be specified.  By default, TDO will be dont care on writes
+#  and TDI will be 0 on reads.
+jtag.write_dr $dut.reg(:clkdiv), :shift_out_data => 0x4321
+jtag.read_dr $udt.reg(:clkdiv), :shift_in_data => 0x5678
+
 # Similar methods exist for the instruction register
 jtag.write_ir 0x1F, :size => 5
 jtag.read_ir 0x1F, :size => 5

metadata

@@ -1,19 +1,22 @@
 --- !ruby/object:Gem::Specification
 name: origen_jtag
 version: !ruby/object:Gem::Version
-  version: 0.13.0
+  version: 0.14.0
 platform: ruby
 authors:
 - Stephen McGinty
 autorequire: 
 bindir: bin
 cert_chain: []
-date: 2017-02-10 00:00:00.000000000 Z
+date: 2017-03-28 00:00:00.000000000 Z
 dependencies:
 - !ruby/object:Gem::Dependency
   name: origen
   requirement: !ruby/object:Gem::Requirement
     requirements:
+    - - "~>"
+      - !ruby/object:Gem::Version
+        version: '0.7'
     - - ">="
       - !ruby/object:Gem::Version
         version: 0.7.35
@@ -21,6 +24,9 @@ dependencies:
   prerelease: false
   version_requirements: !ruby/object:Gem::Requirement
     requirements:
+    - - "~>"
+      - !ruby/object:Gem::Version
+        version: '0.7'
     - - ">="
       - !ruby/object:Gem::Version
         version: 0.7.35
@@ -32,15 +38,14 @@ extensions: []
 extra_rdoc_files: []
 files:
 - config/application.rb
+- config/boot.rb
 - config/commands.rb
 - config/development.rb
-- config/environment.rb
-- config/users.rb
 - config/version.rb
 - lib/origen_jtag.rb
 - lib/origen_jtag/driver.rb
-- lib/origen_jtag/dut.rb
 - lib/origen_jtag/tap_controller.rb
+- lib/origen_jtag_dev/top_level.rb
 - pattern/jtag_workout.rb
 - templates/web/index.md.erb
 - templates/web/layouts/_basic.html.erb

data/config/environment.rb

@@ -1 +0,0 @@
-require "origen_jtag"

data/config/users.rb

@@ -1,19 +0,0 @@
-# This file defines the users associated with your project, it is basically the 
-# mailing list for release notes.
-#
-# You can split your users into "admin" and "user" groups, the main difference 
-# between the two is that admin users will get all tag emails, users will get
-# emails on external/official releases only.
-#
-# Users are also prohibited from running the "origen tag" task, but this is 
-# really just to prevent a casual user from executing it inadvertently and is
-# not intended to be a serious security gate.
-module Origen
-  module Users
-    def users
-      @users ||= [
-
-      ]
-    end
-  end
-end