origen_jtag 0.12.0

data/lib/origen_jtag/dut.rb

@@ -0,0 +1,64 @@
+module OrigenJTAG
+  # This is a dummy DUT model which is used
+  # to instantiate and test the JTAG locally
+  # during development.
+  #
+  # It is not included when this library is imported.
+  class DUT
+    include OrigenJTAG
+    include Origen::Callbacks
+    include Origen::Registers
+    include Origen::Pins
+
+    JTAG_CONFIG = {
+      verbose:         true,
+      tclk_format:     :rh,
+      tclk_multiple:   1,
+      tdo_strobe:      :tclk_high,
+      tdo_store_cycle: 0,
+      init_state:      :unknown
+    }
+
+    def initialize(options = {})
+      JTAG_CONFIG[:tclk_format] = options[:tclk_format] if options[:tclk_format]
+      JTAG_CONFIG[:tclk_multiple] = options[:tclk_multiple] if options[:tclk_multiple]
+      JTAG_CONFIG[:tdo_strobe] = options[:tdo_strobe] if options[:tdo_strobe]
+      JTAG_CONFIG[:tdo_store_cycle] = options[:tdo_store_cycle] if options[:tdo_store_cycle]
+      JTAG_CONFIG[:init_state] = options[:init_state] if options[:init_state]
+    end
+
+    def tclk_format
+      JTAG_CONFIG[:tclk_format]
+    end
+
+    def tclk_multiple
+      JTAG_CONFIG[:tclk_multiple]
+    end
+
+    def tdo_strobe
+      JTAG_CONFIG[:tdo_strobe]
+    end
+
+    def tdo_store_cycle
+      JTAG_CONFIG[:tdo_store_cycle]
+    end
+
+    def init_state
+      JTAG_CONFIG[:init_state]
+    end
+
+    def on_create
+      add_reg :test16, 0x0012, 16, bus: { pos: 8, bits: 8 },
+                                   bit: { pos: 0 }
+
+      add_reg :test32, 0x0014, 32, bus: { pos: 16, bits: 16 },
+                                   bit: { pos: 0 }
+
+      $tester.set_timeset('nvmbist', 40)
+      add_pin :tclk
+      add_pin :tdi
+      add_pin :tdo
+      add_pin :tms
+    end
+  end
+end

data/lib/origen_jtag/tap_controller.rb

@@ -0,0 +1,299 @@
+module OrigenJTAG
+  # Provides methods specifically for controlling the state of the
+  # TAP Controller
+  module TAPController
+    # Map of internal state symbols to human readable names
+    STATES = {
+      reset:      'Test-Logic-Reset',
+      idle:       'Run-Test/Idle',
+      select_dr:  'Select-DR',
+      capture_dr: 'Capture-DR',
+      shift_dr:   'Shift-DR',
+      exit1_dr:   'Exit1-DR',
+      pause_dr:   'Pause-DR',
+      exit2_dr:   'Exit2-DR',
+      update_dr:  'Update-DR',
+      select_ir:  'Select-IR',
+      capture_ir: 'Capture-IR',
+      shift_ir:   'Shift-IR',
+      exit1_ir:   'Exit1-IR',
+      pause_ir:   'Pause-IR',
+      exit2_ir:   'Exit2-IR',
+      update_ir:  'Update-IR'
+    }
+
+    # Returns the current state of the JTAG TAP Controller
+    attr_reader :state
+    alias_method :current_state, :state
+
+    # Goto Shift-DR state then exit back to Run-Test/Idle
+    #
+    # @example Trandition into Shift-DR
+    #   # State is Run-Test/Idle
+    #   jtag.shift_dr do
+    #     # State is Shift-DR
+    #   end
+    #   # State is Run-Test/Idle
+    #
+    # This method can be nested inside of a pause_dr block
+    # to transition into the Shift-DR state and then back
+    # to Pause-DR
+    #
+    # @example Switching between Pause-DR and Shift-DR
+    #   # State is Run-Test/Idle
+    #   jtag.pause_dr do
+    #     # State is Pause-DR
+    #     jtag.shift_dr do
+    #       # State is Shift-DR
+    #     end
+    #     # State is Pause-DR
+    #   end
+    #   # State is Run-Test/Idle
+    def shift_dr
+      validate_state(:idle, :pause_dr)
+      log 'Transition to Shift-DR...'
+      if state == :idle
+        tms!(1)  # => Select-DR-Scan
+        tms!(0)  # => Capture-DR
+        tms!(0)  # => Shift-DR
+        update_state :shift_dr
+        log '**** Data start ****', always: true
+        yield
+        log 'Transition to Run-Test/Idle...'
+        if @last_data_vector_shifted
+          @last_data_vector_shifted = false
+        else
+          tms!(1)  # => Exit1-DR
+        end
+        log '**** Data stop ****', always: true
+        tms!(1)  # => Update-DR
+        tms!(0)  # => Run-Test/Idle
+        update_state :idle
+      else # :pause_dr
+        tms!(1)  # => Exit2-DR
+        tms!(0)  # => Shift-DR
+        update_state :shift_dr
+        yield
+        log 'Transition to Pause-DR...'
+        tms!(1)  # => Exit1-DR
+        tms!(0)  # => Pause-DR
+        update_state :pause_dr
+      end
+    end
+
+    # Goto Pause-DR state then exit back to Run-Test/Idle
+    #
+    # @example Trandition into Pause-DR
+    #   # State is Run-Test/Idle
+    #   jtag.pause_dr do
+    #     # State is Pause-DR
+    #   end
+    #   # State is Run-Test/Idle
+    #
+    # This method can be nested inside of a shift_dr block
+    # to transition into the Pause-DR state and then back
+    # to Shift-DR
+    #
+    # @example Switching between Shift-DR and Pause-DR
+    #   # State is Run-Test/Idle
+    #   jtag.shift_dr do
+    #     # State is Shift-DR
+    #     jtag.pause_dr do
+    #       # State is Pause-DR
+    #     end
+    #     # State is Shift-DR
+    #   end
+    #   # State is Run-Test/Idle
+    def pause_dr
+      validate_state(:idle, :shift_dr)
+      log 'Transition to Pause-DR...'
+      if state == :idle
+        tms!(1)  # => Select-DR-Scan
+        tms!(0)  # => Capture-DR
+        tms!(1)  # => Exit1-DR
+        tms!(0)  # => Pause-DR
+        update_state :pause_dr
+        yield
+        log 'Transition to Run-Test/Idle...'
+        tms!(1)  # => Exit2-DR
+        tms!(1)  # => Update-DR
+        tms!(0)  # => Run-Test/Idle
+        update_state :idle
+      else  # shift_dr
+        tms!(1)  # => Exit1-DR
+        tms!(0)  # => Pause-DR
+        update_state :pause_dr
+        yield
+        log 'Transition to Shift-DR...'
+        tms!(1)  # => Exit2-DR
+        tms!(0)  # => Shift-DR
+        update_state :shift_dr
+      end
+    end
+
+    # Goto Shift-IR state then exit back to Run-Test/Idle
+    #
+    # @example Trandition into Shift-IR
+    #   # State is Run-Test/Idle
+    #   jtag.shift_ir do
+    #     # State is Shift-IR
+    #   end
+    #   # State is Run-Test/Idle
+    #
+    # This method can be nested inside of a pause_ir block
+    # to transition into the Shift-IR state and then back
+    # to Pause-IR
+    #
+    # @example Switching between Pause-IR and Shift-IR
+    #   # State is Run-Test/Idle
+    #   jtag.pause_ir do
+    #     # State is Pause-IR
+    #     jtag.shift_ir do
+    #       # State is Shift-IR
+    #     end
+    #     # State is Pause-IR
+    #   end
+    #   # State is Run-Test/Idle
+    def shift_ir
+      validate_state(:idle, :pause_ir)
+      log 'Transition to Shift-IR...'
+      if state == :idle
+        tms!(1)  # => Select-DR-Scan
+        tms!(1)  # => Select-IR-Scan
+        tms!(0)  # => Capture-IR
+        tms!(0)  # => Shift-IR
+        update_state :shift_ir
+        log '**** Data start ****', always: true
+        yield
+        log 'Transition to Run-Test/Idle...'
+        if @last_data_vector_shifted
+          @last_data_vector_shifted = false
+        else
+          tms!(1)  # => Exit1-DR
+        end
+        log '**** Data stop ****', always: true
+        tms!(1)  # => Update-IR
+        tms!(0)  # => Run-Test/Idle
+        update_state :idle
+      else # :pause_ir
+        tms!(1)  # => Exit2-IR
+        tms!(0)  # => Shift-IR
+        update_state :shift_ir
+        yield
+        log 'Transition to Pause-IR...'
+        tms!(1)  # => Exit1-IR
+        tms!(0)  # => Pause-IR
+        update_state :pause_ir
+      end
+    end
+
+    # Goto Pause-IR state then exit back to Run-Test/Idle
+    #
+    # @example Trandition into Pause-iR
+    #   # State is Run-Test/Idle
+    #   jtag.pause_ir do
+    #     # State is Pause-IR
+    #   end
+    #   # State is Run-Test/Idle
+    #
+    # This method can be nested inside of a shift_ir block
+    # to transition into the Pause-IR state and then back
+    # to Shift-IR
+    #
+    # @example Switching between Shift-IR and Pause-IR
+    #   # State is Run-Test/Idle
+    #   jtag.shift_ir do
+    #     # State is Shift-IR
+    #     jtag.pause_ir do
+    #       # State is Pause-IR
+    #     end
+    #     # State is Shift-IR
+    #   end
+    #   # State is Run-Test/Idle
+    def pause_ir
+      validate_state(:idle, :shift_ir)
+      log 'Transition to Pause-IR...'
+      if state == :idle
+        tms!(1)  # => Select-DR-Scan
+        tms!(1)  # => Select-IR-Scan
+        tms!(0)  # => Capture-IR
+        tms!(1)  # => Exit1-IR
+        tms!(0)  # => Pause-IR
+        update_state :pause_ir
+        yield
+        log 'Transition to Run-Test/Idle...'
+        tms!(1)  # => Exit2-IR
+        tms!(1)  # => Update-IR
+        tms!(0)  # => Run-Test/Idle
+        update_state :idle
+      else # :shift_ir
+        tms!(1)  # => Exit1-IR
+        tms!(0)  # => Pause-IR
+        update_state :pause_ir
+        yield
+        log 'Transition to Shift-IR...'
+        tms!(1)  # => Exit2-IR
+        tms!(0)  # => Shift-IR
+        update_state :shift_ir
+      end
+    end
+
+    # Returns the current state as a human readable string
+    def state_str
+      STATES[state]
+    end
+    alias_method :current_state_str, :state_str
+
+    # Forces the state to Run-Test/Idle regardless of the current
+    # state.
+    def idle
+      log 'Force transition to Run-Test/Idle...'
+      # From the JTAG2IPS block guide holding TMS high for 5 cycles
+      # will force it to reset regardless of the state, let's give
+      # it 6 for luck:
+      6.times { tms!(1) }
+      # Now a couple of cycles low to get it into idle
+      2.times { tms!(0) }
+      update_state :idle
+    end
+
+    # Force state to Test-Logic-Reset regardless of the current
+    # state
+    def reset
+      log 'Force transition to Test-Logic-Reset...'
+      # JTAG reset
+      6.times { tms!(1) }
+    end
+
+    private
+
+    def init_tap_controller(options = {})
+      options = {
+      }.merge(options)
+    end
+
+    def update_state(state)
+      @state = state
+      log "Current state: #{state_str}"
+    end
+
+    # Ensures that the current state matches one of the given acceptable
+    # states.
+    #
+    # Additionally if the current state is unknown and idle is acceptable
+    # then the state will be transitioned to idle.
+    def validate_state(*acceptable_states)
+      if current_state == :unknown && acceptable_states.include?(:idle)
+        idle
+      elsif acceptable_states.include?(current_state)
+        return
+      else
+        fail 'JTAG TAP Controller - An invalid state sequence has occurred!'
+      end
+    end
+
+    def log(msg, options = {})
+      cc "JTAG::TAPController - #{msg}" if verbose? || options[:always]
+    end
+  end
+end

data/lib/origen_jtag.rb

@@ -0,0 +1,13 @@
+require 'origen'
+require_relative '../config/application.rb'
+
+# Include this module to add a JTAG driver to your class
+module OrigenJTAG
+  autoload :TAPController, 'origen_jtag/tap_controller'
+  autoload :Driver,        'origen_jtag/driver'
+
+  # Returns an instance of the OrigenJTAG::Driver
+  def jtag
+    @jtag ||= Driver.new(self)
+  end
+end

data/pattern/jtag_workout.rb

@@ -0,0 +1,184 @@
+Pattern.create(options={:name => "jtag_workout_#{$dut.tclk_format.upcase}#{$dut.tclk_multiple}"}) do
+  def test(msg)
+    ss "Test - #{msg}"
+  end
+
+  jtag = $dut.jtag
+  reg = $dut.reg(:test16)
+
+  # First tests of the TAP Controller
+
+  test "Transition TAP controller in and out of Shift-DR"
+  jtag.shift_dr { }
+
+  test "Transition TAP controller in and out of Pause-DR"
+  jtag.pause_dr { }
+
+  test "Transition TAP controller in and out of Shift-IR"
+  jtag.shift_ir { }
+
+  test "Transition TAP controller in and out of Pause-IR"
+  jtag.pause_ir { }
+
+  test "Transition into Shift-DR, then back and forth into Pause-DR"
+  jtag.shift_dr do
+    jtag.pause_dr { }
+    jtag.pause_dr { }
+  end
+
+  test "Transition into Pause-DR, then back and forth into Shift-DR"
+  jtag.pause_dr do
+    jtag.shift_dr { }
+    jtag.shift_dr { }
+  end
+  
+  test "Transition into Shift-IR, then back and forth into Pause-IR"
+  jtag.shift_ir do
+    jtag.pause_ir { }
+    jtag.pause_ir { }
+  end
+
+  test "Transition into Pause-IR, then back and forth into Shift-IR"
+  jtag.pause_ir do
+    jtag.shift_ir { }
+    jtag.shift_ir { }
+  end
+
+  # Tests of the shift method, make sure it handles registers with
+  # bit-level flags set in additional to dumb values
+
+  test "Shifting an explicit value into TDI"
+  jtag.shift 0x1234, :size => 16, :cycle_last => true
+
+  test "Shifting an explicit value out of TDO"
+  jtag.shift 0x1234, :size => 16, :cycle_last => true, :read => true
+
+  test "Shift register into TDI"
+    reg.write(0xFF01)
+    cc "Full register (16 bits)"
+    jtag.shift reg, :cycle_last => true
+    cc "Full register with additional size (32 bits)"
+    jtag.shift reg, :cycle_last => true, :size => 32
+    cc "Full register with reduced size (8 bits)"
+    jtag.shift reg, :cycle_last => true, :size => 8, :includes_last_bit => false
+
+  test "Shift register into TDI with overlay"
+    reg.overlay("write_overlay")
+    cc "Full register (16 bits)"
+    Origen.tester.cycle  # Give a padding cycle as a place for the subroutine call to go
+    jtag.shift reg, :cycle_last => true
+    cc "Full register with additional size (32 bits)"
+    Origen.tester.cycle  # Give a padding cycle as a place for the subroutine call to go
+    jtag.shift reg, :cycle_last => true, :size => 32
+    cc "Full register with reduced size (8 bits)"
+    Origen.tester.cycle  # Give a padding cycle as a place for the subroutine call to go
+    jtag.shift reg, :cycle_last => true, :size => 8, :includes_last_bit => false
+    cc "It should in-line overlays when running in simulation mode"
+    Origen.mode = :simulation
+    Origen.tester.cycle  # Give a padding cycle as a place for the subroutine call to go
+    jtag.shift reg, :cycle_last => true
+    Origen.mode = :debug
+
+  test "Shift register into TDI with single bit overlay"
+    reg.overlay(nil)
+    reg.bit(:bit).overlay("write_overlay")
+    Origen.tester.cycle  # Give a padding cycle as a place for the subroutine call to go
+    jtag.shift reg, :cycle_last => true
+    reg.overlay(nil)
+
+  test "Read register out of TDO"
+    cc "Full register (16 bits)"
+    reg.read
+    jtag.shift reg, :cycle_last => true, :read => true
+    cc "Full register with additional size (32 bits)"
+    reg.read
+    jtag.shift reg, :cycle_last => true, :size => 32, :read => true
+    cc "Full register with reduced size (8 bits)"
+    reg.read
+    jtag.shift reg, :cycle_last => true, :size => 8, :read => true, :includes_last_bit => false
+
+  test "Read single bit out of TDO"
+    reg.bit(:bit).read
+    jtag.shift reg, :cycle_last => true, :read => true
+
+  test "Store register out of TDO"
+    cc "Full register (16 bits)"
+    reg.store
+    jtag.shift reg, :cycle_last => true, :read => true
+    cc "Full register with additional size (32 bits)"
+    reg.store
+    jtag.shift reg, :cycle_last => true, :size => 32, :read => true
+    cc "Full register with reduced size (8 bits)"
+    reg.store
+    jtag.shift reg, :cycle_last => true, :size => 8, :read => true, :includes_last_bit => false
+
+  test "Store single bit out of TDO"
+    reg.bit(:bit).store
+    jtag.shift reg, :cycle_last => true, :read => true
+
+  test "Test flag clear, bit 0 should be read, but not stored"
+    reg.bit(:bit).read
+    jtag.shift reg, :cycle_last => true, :read => true
+
+  test "Shift register out of TDO with overlay"
+    reg.overlay("read_overlay")
+    cc "Full register (16 bits)"
+    Origen.tester.cycle  # Give a padding cycle as a place for the subroutine call to go
+    jtag.shift reg, :cycle_last => true, :read => true
+    cc "Full register with additional size (32 bits)"
+    Origen.tester.cycle  # Give a padding cycle as a place for the subroutine call to go
+    jtag.shift reg, :cycle_last => true, :size => 32, :read => true
+    cc "Full register with reduced size (8 bits)"
+    Origen.tester.cycle  # Give a padding cycle as a place for the subroutine call to go
+    jtag.shift reg, :cycle_last => true, :size => 8, :read => true, :includes_last_bit => false
+    cc "It should in-line overlays when running in simulation mode"
+    Origen.mode = :simulation
+    Origen.tester.cycle  # Give a padding cycle as a place for the subroutine call to go
+    jtag.shift reg, :cycle_last => true, :read => true
+    Origen.mode = :debug
+
+  test "Shift register out of TDO with single bit overlay"
+    reg.overlay(nil)
+    reg.bit(:bit).overlay("read_overlay")
+    Origen.tester.cycle  # Give a padding cycle as a place for the subroutine call to go
+    jtag.shift reg, :cycle_last => true
+    reg.overlay(nil)
+
+  # Finally integration tests of the TAPController + shift
+
+  test "Write value into DR"
+    jtag.write_dr 0xFFFF, :size => 16, :msg => "Write value into DR" 
+
+  test "Write register into DR with full-width overlay"
+    r = $dut.reg(:test32).overlay("write_overlay")
+    jtag.write_dr r
+
+  test "Read value out of DR"
+    jtag.read_dr 0xFFFF, :size => 16, :msg => "Read value out of DR" 
+
+  test "Write value into IR"
+    jtag.write_ir 0xF, :size => 4, :msg => "Write value into IR"
+
+  test "Read value out of IR"
+    jtag.read_ir 0xF, :size => 4, :msg => "Read value out of IR"
+
+  test "The IR value is tracked and duplicate writes are inhibited"
+    jtag.write_ir 0xF, :size => 4
+
+  test "Unless forced"
+    jtag.write_ir 0xF, :size => 4, :force => true
+
+  test "Reset"
+    jtag.reset
+
+  test "Suspend of compare on TDO works"
+    cc "TDO should be H"
+    jtag.read_dr 0xFFFF, :size => 16, :msg => "Read value out of DR" 
+    $tester.ignore_fails($dut.pin(:tdo)) do
+      cc "TDO should be X"
+      jtag.read_dr 0xFFFF, :size => 16, :msg => "Read value out of DR" 
+    end
+    cc "TDO should be H"
+    jtag.read_dr 0xFFFF, :size => 16, :msg => "Read value out of DR" 
+    
+end

data/templates/web/index.md.erb

@@ -0,0 +1,139 @@
+% render "layouts/basic.html" do
+
+%# HTML tags can be embedded in mark down files if you want to do specific custom
+%# formatting like this, but in most cases that is not required.
+<h1><%= Origen.app.namespace %> <span style="font-size: 14px">(<%= Origen.app.version %>)</span></h1>
+
+### Purpose
+
+This plugin provides an ATE driver for an IEEE 1149.1 compliant JTAG interface.
+
+It makes no assumptions about the instruction or data register attributes or higher
+level protocol concerns. For use at DUT model level this plugin would be normally be wrapped in
+a higher level protocol such as [Nexus](http://origen-sdk.org/nexus/).
+
+### How To Import
+
+In your Gemfile add:
+
+~~~ruby
+gem "origen_jtag", ">= <%= Origen.app.version %>"
+~~~
+
+or if your application is a plugin add this to your <code>.gemspec</code>
+
+~~~ruby
+spec.add_development_dependency "origen_jtag", ">= <%= Origen.app.version %>"
+~~~
+
+__NOTE:__ You will also need to include <code>require 'origen_jtag'</code> somewhere in your environment.  This can be done in <code>config/environment.rb</code> for example.
+
+### How To Use
+
+Include the <code>OrigenJTAG</code> module to add a JTAG driver to your class and
+define the required pins.
+Normally the pins would be an alias to existing DUT pins and therefore the
+JTAG driver module cannot assume them.
+
+Including the module adds a <code>jtag</code> method which will return an instance of
+[<code>OrigenJTAG::Driver</code>](<%= path "api/OrigenJTAG/Driver.html" %>).
+
+The following attributes can be customized by defining a <code>JTAG_CONFIG</code>
+hash:
+
+* **tclk_format** - TCLK timing format,  Return High (:rh) or Return Low (:rl). Default is :rh.
+* **tclk_multiple** - Number of cycles for a single TCLK pulse to cover, to support cases where TCLK needs to be a fraction of another clock period. Assumes 50% duty cycle, specify only even numbers if > 1. Default is :r1.
+* **tdo_strobe** - When using multiple cycles for TCK, which state of TCK to strobe for TDO, :tclk_high or :tclk_low or :tclk_all. Default :tclk_high.
+* **tdo_store_cycle** - When using multiple cycles for TCK, which cycle of TCK to store for TDO if store requested (0 to number of tclk_multiple-1). Default 0
+
+Here is an example integration:
+
+~~~ruby
+class Pioneer
+
+  include OrigenJTAG
+  include Origen::Pins
+
+  # TCK covers 4 tester cycles, 2 high then 2 low for each effective TCK pulse
+  # Strobe TDO only when TCK high.  Only store TDO on last cycle (3)
+  JTAG_CONFIG = {
+    :tclk_format => :rl,
+    :tclk_multiple => 4,
+    :tdo_strobe => :tclk_high,
+    :tdo_store_cycle => 3,
+  }
+
+  def initialize
+    add_pin :tclk
+    add_pin :tdi
+    add_pin :tdo
+    add_pin :tms
+  end
+
+end
+
+Pioneer.new.jtag  # => An instance of OrigenJTAG::Driver
+~~~
+
+Two APIs are provided, the primary one provides canned methods to read and
+write to the IR and DR registers.
+
+These accept either an absolute data value or an Origen register/bit collection.
+
+~~~ruby
+jtag.write_dr 0x1234, :size => 16
+# The size option is not required when a register is supplied
+jtag.write_dr $dut.reg(:clkdiv)
+# Although it can still be added if the register is not the full data width
+jtag.write_dr $dut.reg(:clkdiv), :size => 32
+# A rich read method is available which supports bit-level read, store and
+# overlay operations
+$dut.reg(:clkdiv).bits(:div).read(0x55)
+jtag.read $dut.reg(:clkdiv)
+# Similar methods exist for the instruction register
+jtag.write_ir 0x1F, :size => 5
+jtag.read_ir 0x1F, :size => 5
+~~~
+
+A secondary API provides low level control of the TAP Controller state machine.
+
+~~~ruby
+jtag.pause_dr do
+  jtag.shift_dr do
+    # The shift method accepts the same arguments as the canned read/write methods
+    jtag.shift 0x55, :size => 32
+  end
+end
+~~~
+
+See the [<code>OrigenJTAG::Driver</code>](<%= path "api/OrigenJTAG/Driver.html" %>) and
+[<code>OrigenJTAG::TAPController</code>](<%= path "api/OrigenJTAG/TAPController.html" %>)
+APIs for more details about the available driver methods.
+
+### How To Setup a Development Environment
+
+[Clone the repository from Github](https://github.com/Origen-SDK/origen_jtag).
+
+An instance of the OrigenJTAG driver is hooked up to a dummy DUT
+object for use in the console:
+
+~~~
+origen i
+
+> $dut.jtag
+=> #<OrigenJTAG::Driver:0x0000001ee48e78>
+~~~
+
+Follow the instructions here if you want to make a 3rd party app
+workspace use your development copy of the OrigenJTAG plugin:
+[Setting up a Plugin Development Environment](http://origen-sdk.org/origen/latest/guides/plugins)
+
+This plugin also contains a test suite, makes sure this passes before committing
+any changes!
+
+~~~
+origen examples
+~~~
+
+
+% end