origen_doc_helpers 0.7.2 → 0.8.0
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- checksums.yaml +4 -4
- data/config/version.rb +2 -2
- data/lib/origen_doc_helpers_dev/dut.rb +6 -1
- data/templates/shared/_register.html.erb +36 -20
- data/templates/shared/_register.html.erb~ +39 -20
- metadata +2 -2
checksums.yaml
CHANGED
@@ -1,7 +1,7 @@
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1
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---
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2
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SHA256:
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3
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-
metadata.gz:
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4
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-
data.tar.gz:
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3
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+
metadata.gz: e38c7e090bcb00c720933266cbf06095d99d817206d105a88fa2a3792f9dfd71
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4
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+
data.tar.gz: '076904f8fedfcbecab07c948341ffc529f68357d02106d235dbdebf8db6496d1'
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5
5
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SHA512:
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6
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-
metadata.gz:
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7
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-
data.tar.gz:
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6
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+
metadata.gz: 0bb5c8624309ad1e3d5f3261c0e9b5fecc6f30e899a45ef8694d24992b7f6813aadc29bfaebd3ca33bd3915cd44ab5e2319c7c92a300a9e93379fe2aeae8f1ee
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7
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+
data.tar.gz: e6cc432dcef4200b37cbc045eec8c2777f327f055cb5e3d36366cefd0ee508996a5864a7a0c09c1f09c2f30c746c51f498e1fac13808dcce8730fb8ea2c79e6a
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data/config/version.rb
CHANGED
@@ -79,18 +79,23 @@ module OrigenDocHelpersDev
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|
79
79
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bit 31..0, :placeholder, reset: 0b0, access: :rw
|
80
80
|
end
|
81
81
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reg :msb0_debug, 0xf58, 32, bit_order: 'msb0', ip_base_address: 0x1080000, description: '' do
|
82
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-
|
82
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+
# placeholder field description
|
83
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+
bit 31..1, :placeholder, reset: 0b0, access: :rw
|
84
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+
# single bit
|
85
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+
bit 0, :single_bit, reset: 1, access: :rw
|
83
86
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end
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84
87
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reg :lsb0_non_byte_aligned, 0xf5c, 9, bit_order: 'lsb0', ip_base_address: 0x1080000, description: '' do
|
85
88
|
bit 8..0, :placeholder, reset: 0b0, access: :rw
|
86
89
|
end
|
87
90
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reg :msb0_non_byte_aligned, 0xf60, 9, bit_order: :msb0, ip_base_address: 0x1080000, description: '' do
|
91
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+
# placeholder field description
|
88
92
|
bit 8..0, :placeholder, reset: 0b0, access: :rw
|
89
93
|
end
|
90
94
|
reg :lsb0_tiny, 0xf64, 3, bit_order: :lsb0, ip_base_address: 0x1080000, description: '' do
|
91
95
|
bit 2..0, :placeholder, reset: 0b0, access: :rw
|
92
96
|
end
|
93
97
|
reg :msb0_tiny, 0xf68, 3, bit_order: :msb0, ip_base_address: 0x1080000, description: '' do
|
98
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+
# placeholder field description
|
94
99
|
bit 2..0, :placeholder, reset: 0b0, access: :rw
|
95
100
|
end
|
96
101
|
end
|
@@ -19,6 +19,7 @@
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|
19
19
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<h4>0x<%= reg.address.to_s(16).upcase %> - <%= reg_path %></h4>
|
20
20
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% end
|
21
21
|
</a>
|
22
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+
|
22
23
|
% if options[:current_value]
|
23
24
|
% if reg.size <= 8
|
24
25
|
<h4><font style="background-color: #66FF66">Current Value: <%= sprintf("0x%02X",reg.value) %></font></h4>
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@@ -41,33 +42,43 @@
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|
41
42
|
</div>
|
42
43
|
% end
|
43
44
|
|
45
|
+
% if !order_is_lsb0
|
46
|
+
<table class="reg table table-condensed ljust" style="margin-bottom: 0; table-layout: fixed;">
|
47
|
+
<thead>
|
48
|
+
<tr class="bit-positions">
|
49
|
+
<b><tr class = "heading"><%= reg_path%> <span class="msb0_specific" style="color:gray;">(<%= reg_path %>.with_msb0)</span></tr></b>
|
50
|
+
</tr>
|
51
|
+
</thead>
|
52
|
+
</table>
|
53
|
+
% end
|
54
|
+
|
44
55
|
% num_bytes = (reg.size / 8.0).ceil
|
45
56
|
% num_bytes.times do |byte_index|
|
46
57
|
% # Need to add support for little endian regs here?
|
47
58
|
% byte_number = num_bytes - byte_index
|
48
|
-
%
|
49
|
-
%
|
50
|
-
% min_bit = max_bit - 8 + 1
|
51
|
-
% else
|
52
|
-
% min_bit = (byte_index * 8)
|
53
|
-
% max_bit = min_bit + 7
|
54
|
-
% end
|
59
|
+
% max_bit = (byte_number * 8) - 1
|
60
|
+
% min_bit = max_bit - 8 + 1
|
55
61
|
% partial_byte = max_bit > (reg.size - 1)
|
56
62
|
|
57
|
-
<table class="reg table table-condensed <%=
|
63
|
+
<table class="reg table table-condensed <%= 'rjust' %><%= partial_byte ? ' partial' : '' %>" style="margin-bottom: 0; table-layout: fixed;">
|
58
64
|
<thead>
|
59
65
|
<tr class="bit-positions">
|
66
|
+
% if order_is_lsb0
|
60
67
|
<th class="spacer"></th>
|
68
|
+
% else
|
69
|
+
<td class="heading">LSB0<span class="msb0_specific" style="color:gray;"> (MSB0)</span></td>
|
70
|
+
% end
|
71
|
+
|
61
72
|
% 8.times do |i|
|
62
|
-
%
|
63
|
-
% bit_num = (byte_number * 8) - i - 1
|
64
|
-
% else
|
65
|
-
% bit_num = (byte_index * 8) + i
|
66
|
-
% end
|
73
|
+
% bit_num = (byte_number * 8) - i - 1
|
67
74
|
% if bit_num > reg.size - 1
|
68
75
|
<th class="spacer"></th>
|
69
76
|
% else
|
70
|
-
|
77
|
+
% if order_is_lsb0
|
78
|
+
<th class="bit-position"><%= bit_num %></th>
|
79
|
+
% else
|
80
|
+
<th class="bit-position"><%= bit_num %><span class="msb0_specific" style="color:gray;"> (<%= reg.size - bit_num -1%>)</span></th>
|
81
|
+
% end
|
71
82
|
% end
|
72
83
|
% end
|
73
84
|
</tr>
|
@@ -78,8 +89,13 @@
|
|
78
89
|
%# Read Row
|
79
90
|
%#############################################
|
80
91
|
<tr class="read">
|
92
|
+
% if order_is_lsb0
|
81
93
|
<td class="heading">R</td>
|
82
|
-
%
|
94
|
+
% else
|
95
|
+
<td class="heading"><span class="msb0_specific" style="color:gray;">[LSB0] </span>R</td>
|
96
|
+
% end
|
97
|
+
|
98
|
+
% alignment_done = false
|
83
99
|
% reg.named_bits :include_spacers => true do |name, bit|
|
84
100
|
% if _bit_in_range?(bit, max_bit, min_bit)
|
85
101
|
% if max_bit > (reg.size - 1) && !alignment_done
|
@@ -145,7 +161,7 @@
|
|
145
161
|
%#############################################
|
146
162
|
<tr class="write">
|
147
163
|
<td class="heading">W</td>
|
148
|
-
% alignment_done =
|
164
|
+
% alignment_done = false
|
149
165
|
% reg.named_bits :include_spacers => true do |name, bit|
|
150
166
|
% if _bit_in_range?(bit, max_bit, min_bit)
|
151
167
|
% if max_bit > (reg.size - 1) && !alignment_done
|
@@ -246,7 +262,7 @@
|
|
246
262
|
%#############################################
|
247
263
|
<tr class="reset">
|
248
264
|
<td class="heading">Reset</td>
|
249
|
-
% alignment_done =
|
265
|
+
% alignment_done = false
|
250
266
|
% reg.named_bits :include_spacers => true do |name, bit|
|
251
267
|
% if _bit_in_range?(bit, max_bit, min_bit)
|
252
268
|
% if max_bit > (reg.size - 1) && !alignment_done
|
@@ -304,16 +320,16 @@
|
|
304
320
|
<p>
|
305
321
|
<a class="anchor" name="<%= "#{reg.name}_#{name}_#{bits.position}" %>"></a>
|
306
322
|
% if bits.size == 1
|
307
|
-
<%= bits.position %>
|
323
|
+
<%= bits.position %><%= order_is_lsb0 ? '' : "<span class=\"msb0_specific\" style=\"color:gray;\"> (#{reg.size - bits.position - 1})</span>" %>
|
308
324
|
% else
|
309
|
-
<%= bits.position + bits.size - 1 %>-<%= bits.position %>
|
325
|
+
<%= bits.position + bits.size - 1 %>-<%= bits.position %><%= order_is_lsb0 ? '' : "<span class=\"msb0_specific\" style=\"color:gray;\"> (#{reg.size - bits.position - bits.size}-#{reg.size - bits.position - 1})</span>" %>
|
310
326
|
% end
|
311
327
|
</p>
|
312
328
|
<p>
|
313
329
|
% if bits.size == 1
|
314
330
|
<%= name %>
|
315
331
|
% else
|
316
|
-
<%= name %>[<%= bits.size - 1 %>:0]
|
332
|
+
<%= name %>[<%= bits.size - 1 %>:0]<%= order_is_lsb0 ? '' : "<span class=\"msb0_specific\" style=\"color:gray;\"> ([0:#{bits.size - 1}])</span>" %>
|
317
333
|
% end
|
318
334
|
</p>
|
319
335
|
</td>
|
@@ -1,4 +1,6 @@
|
|
1
1
|
% reg = options[:reg]
|
2
|
+
% order_is_lsb0 = true
|
3
|
+
% order_is_lsb0 = false if reg.bit_order == :msb0 || reg.bit_order == 'msb0'
|
2
4
|
% include_data = false
|
3
5
|
|
4
6
|
<div class="register">
|
@@ -17,6 +19,7 @@
|
|
17
19
|
<h4>0x<%= reg.address.to_s(16).upcase %> - <%= reg_path %></h4>
|
18
20
|
% end
|
19
21
|
</a>
|
22
|
+
|
20
23
|
% if options[:current_value]
|
21
24
|
% if reg.size <= 8
|
22
25
|
<h4><font style="background-color: #66FF66">Current Value: <%= sprintf("0x%02X",reg.value) %></font></h4>
|
@@ -39,32 +42,43 @@
|
|
39
42
|
</div>
|
40
43
|
% end
|
41
44
|
|
45
|
+
% if !order_is_lsb0
|
46
|
+
<table class="reg table table-condensed ljust" style="margin-bottom: 0; table-layout: fixed;">
|
47
|
+
<thead>
|
48
|
+
<tr class="bit-positions">
|
49
|
+
<b><tr class = "heading"><%= reg_path%> <span class="msb0_specific" style="color:gray;">(<%= reg_path %>.with_msb0)</span></tr></b>
|
50
|
+
</tr>
|
51
|
+
</thead>
|
52
|
+
</table>
|
53
|
+
% end
|
54
|
+
|
42
55
|
% num_bytes = (reg.size / 8.0).ceil
|
43
56
|
% num_bytes.times do |byte_index|
|
44
57
|
% # Need to add support for little endian regs here?
|
45
58
|
% byte_number = num_bytes - byte_index
|
46
|
-
%
|
47
|
-
%
|
48
|
-
%
|
49
|
-
% else
|
50
|
-
% min_bit = (byte_index * 8)
|
51
|
-
% max_bit = min_bit + 7
|
52
|
-
% end
|
59
|
+
% max_bit = (byte_number * 8) - 1
|
60
|
+
% min_bit = max_bit - 8 + 1
|
61
|
+
% partial_byte = max_bit > (reg.size - 1)
|
53
62
|
|
54
|
-
<table class="reg table table-condensed" style="margin-bottom: 0; table-layout: fixed;">
|
63
|
+
<table class="reg table table-condensed <%= 'rjust' %><%= partial_byte ? ' partial' : '' %>" style="margin-bottom: 0; table-layout: fixed;">
|
55
64
|
<thead>
|
56
65
|
<tr class="bit-positions">
|
66
|
+
% if order_is_lsb0
|
57
67
|
<th class="spacer"></th>
|
68
|
+
% else
|
69
|
+
<td class="heading">LSB0<span class="msb0_specific" style="color:gray;"> (MSB0)</span></td>
|
70
|
+
% end
|
71
|
+
|
58
72
|
% 8.times do |i|
|
59
|
-
%
|
60
|
-
% bit_num = (byte_number * 8) - i - 1
|
61
|
-
% else
|
62
|
-
% bit_num = (byte_index * 8) + i
|
63
|
-
% end
|
73
|
+
% bit_num = (byte_number * 8) - i - 1
|
64
74
|
% if bit_num > reg.size - 1
|
65
75
|
<th class="spacer"></th>
|
66
76
|
% else
|
77
|
+
% if order_is_lsb0
|
67
78
|
<th class="bit-position"><%= bit_num %></th>
|
79
|
+
% else
|
80
|
+
<th class="bit-position"><%= bit_num %><span class="msb0_specific" style="color:gray;"> (<%= reg.size - bit_num -1%>)</span></th>
|
81
|
+
% end
|
68
82
|
% end
|
69
83
|
% end
|
70
84
|
</tr>
|
@@ -75,8 +89,13 @@
|
|
75
89
|
%# Read Row
|
76
90
|
%#############################################
|
77
91
|
<tr class="read">
|
92
|
+
% if order_is_lsb0
|
78
93
|
<td class="heading">R</td>
|
79
|
-
%
|
94
|
+
% else
|
95
|
+
<td class="heading"><span class="msb0_specific" style="color:gray;">[LSB0] </span>R</td>
|
96
|
+
% end
|
97
|
+
|
98
|
+
% alignment_done = false
|
80
99
|
% reg.named_bits :include_spacers => true do |name, bit|
|
81
100
|
% if _bit_in_range?(bit, max_bit, min_bit)
|
82
101
|
% if max_bit > (reg.size - 1) && !alignment_done
|
@@ -142,7 +161,7 @@
|
|
142
161
|
%#############################################
|
143
162
|
<tr class="write">
|
144
163
|
<td class="heading">W</td>
|
145
|
-
% alignment_done =
|
164
|
+
% alignment_done = false
|
146
165
|
% reg.named_bits :include_spacers => true do |name, bit|
|
147
166
|
% if _bit_in_range?(bit, max_bit, min_bit)
|
148
167
|
% if max_bit > (reg.size - 1) && !alignment_done
|
@@ -200,7 +219,7 @@
|
|
200
219
|
% if options[:current_value]
|
201
220
|
<tr class="current_value">
|
202
221
|
<td class="heading">Current Value (Hex)</td>
|
203
|
-
% alignment_done =
|
222
|
+
% alignment_done = !order_is_lsb0
|
204
223
|
% reg.named_bits :include_spacers => true do |name, bit|
|
205
224
|
% if _bit_in_range?(bit, max_bit, min_bit)
|
206
225
|
% if max_bit > (reg.size - 1) && !alignment_done
|
@@ -243,7 +262,7 @@
|
|
243
262
|
%#############################################
|
244
263
|
<tr class="reset">
|
245
264
|
<td class="heading">Reset</td>
|
246
|
-
% alignment_done =
|
265
|
+
% alignment_done = false
|
247
266
|
% reg.named_bits :include_spacers => true do |name, bit|
|
248
267
|
% if _bit_in_range?(bit, max_bit, min_bit)
|
249
268
|
% if max_bit > (reg.size - 1) && !alignment_done
|
@@ -301,16 +320,16 @@
|
|
301
320
|
<p>
|
302
321
|
<a class="anchor" name="<%= "#{reg.name}_#{name}_#{bits.position}" %>"></a>
|
303
322
|
% if bits.size == 1
|
304
|
-
<%= bits.position %>
|
323
|
+
<%= bits.position %><%= order_is_lsb0 ? '' : "<span class="msb0_specific" style="color:gray;"> (#{reg.size - bits.position - 1})</span>" %>
|
305
324
|
% else
|
306
|
-
<%= bits.position + bits.size - 1 %>-<%= bits.position %>
|
325
|
+
<%= bits.position + bits.size - 1 %>-<%= bits.position %><%= order_is_lsb0 ? '' : "<span class="msb0_specific" style="color:gray;"> (#{reg.size - bits.position - bits.size}-#{reg.size - bits.position - 1})</span>" %>
|
307
326
|
% end
|
308
327
|
</p>
|
309
328
|
<p>
|
310
329
|
% if bits.size == 1
|
311
330
|
<%= name %>
|
312
331
|
% else
|
313
|
-
<%= name %>[<%= bits.size - 1 %>:0]
|
332
|
+
<%= name %>[<%= bits.size - 1 %>:0]<%= order_is_lsb0 ? '' : "<span class="msb0_specific" style="color:gray;"> ([0:#{bits.size - 1}])</span>" %>
|
314
333
|
% end
|
315
334
|
</p>
|
316
335
|
</td>
|
metadata
CHANGED
@@ -1,14 +1,14 @@
|
|
1
1
|
--- !ruby/object:Gem::Specification
|
2
2
|
name: origen_doc_helpers
|
3
3
|
version: !ruby/object:Gem::Version
|
4
|
-
version: 0.
|
4
|
+
version: 0.8.0
|
5
5
|
platform: ruby
|
6
6
|
authors:
|
7
7
|
- Stephen McGinty
|
8
8
|
autorequire:
|
9
9
|
bindir: bin
|
10
10
|
cert_chain: []
|
11
|
-
date: 2018-
|
11
|
+
date: 2018-12-13 00:00:00.000000000 Z
|
12
12
|
dependencies:
|
13
13
|
- !ruby/object:Gem::Dependency
|
14
14
|
name: origen
|