origen_debuggers 0.5.0 → 0.5.1
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- checksums.yaml +4 -4
- data/config/version.rb +1 -1
- data/lib/origen_debuggers/base.rb +2 -1
- data/lib/origen_debuggers/j_link.rb +186 -184
- data/templates/web/index.md.erb +29 -0
- metadata +16 -2
checksums.yaml
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metadata.gz:
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metadata.gz: c69434410a715da3818e4cabc0246700dd0e7a52
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data.tar.gz: 55f7bb58c4aa7addbf790e5552356f30bf9abcb3
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metadata.gz: ddfb4384f7a2901c05543c4277b784ae2d9e864c4caa3a8fb3db5720aed9173913fea668b3e772f085ea6d5c96c5faf460b95ff060ffb41f0b1cd3f94f61cf7b
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data.tar.gz: 55edbaaab07ab7fe8efd089a3464bcf187edd91387162846f8cbb086423ace9d5f48c07a35fbda7edd94ba8d75aacfc306e1f6f5ff7976bd2e74a55e0ada876d
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data/config/version.rb
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require 'origen_testers'
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module OrigenDebuggers
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# This is base class of all debuggers, any methods/attributes
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# defined here will be available to all
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class Base <
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class Base < OrigenTesters::CommandBasedTester
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# Returns true if the debugger supports JTAG
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def jtag?
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respond_to?(:write_dr)
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# f Firmware info
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# h halt
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# g go
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# Sleep Waits the given time (in milliseconds). Syntax: Sleep <delay>
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# s Single step the target chip
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# st Show hardware status
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# hwinfo Show hardware info
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# mem Read memory. Syntax: mem <Addr>, <NumBytes> (hex)
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# mem8 Read 8-bit items. Syntax: mem8 <Addr>, <NumBytes> (hex)
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# mem16 Read 16-bit items. Syntax: mem16 <Addr>, <NumItems> (hex)
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# mem32 Read 32-bit items. Syntax: mem32 <Addr>, <NumItems> (hex)
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# w1 Write 8-bit items. Syntax: w1 <Addr>, <Data> (hex)
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# w2 Write 16-bit items. Syntax: w2 <Addr>, <Data> (hex)
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# w4 Write 32-bit items. Syntax: w4 <Addr>, <Data> (hex)
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# erase Erase internal flash of selected device. Syntax: Erase
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# wm Write test words. Syntax: wm <NumWords>
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# is Identify length of scan chain select register
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# ms Measure length of scan chain. Syntax: ms <Scan chain>
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# mr Measure RTCK react time. Syntax: mr
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# q Quit
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# qc Close JLink connection and quit
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# r Reset target (RESET)
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# rx Reset target (RESET). Syntax: rx <DelayAfterReset>
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# RSetType Set the current reset type. Syntax: RSetType <type>
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# Regs Display contents of registers
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# wreg Write register. Syntax: wreg <RegName>, <Value>
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# moe Shows mode-of-entry, meaning: Reason why CPU is halted
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# SetBP Set breakpoint. Syntax: SetBP <addr> [A/T] [S/H]
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# SetWP Set Watchpoint. Syntax: <Addr> [R/W] [<Data> [<D-Mask>] [A-Mask]]
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# ClrBP Clear breakpoint. Syntax: ClrBP <BP_Handle>
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# ClrWP Clear watchpoint. Syntax: ClrWP <WP_Handle>
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# VCatch Write vector catch. Syntax: VCatch <Value>
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# loadbin Load binary file into target memory.
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# Syntax: loadbin <filename>, <addr>
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# savebin Saves target memory into binary file.
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# Syntax: savebin <filename>, <addr>, <NumBytes>
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# verifybin Verfies if the specified binary is already in the target memory at th
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# e specified address.
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# Syntax: verifybin <filename>, <addr>
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# SetPC Set the PC to specified value. Syntax: SetPC <Addr>
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# le Change to little endian mode
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# be Change to big endian mode
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# log Enables log to file. Syntax: log <filename>
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# unlock Unlocks a device. Syntax: unlock <DeviceName>
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# Type unlock without <DeviceName> to get a list
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# of supported device names.
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# nRESET has to be connected
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# term Test command to visualize printf output from the target device,
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# using DCC (SEGGER DCC handler running on target)
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# ReadAP Reads a CoreSight AP register.
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# Note: First read returns the data of the previous read.
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# An additional read of DP reg 3 is necessary to get the data.
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# ReadDP Reads a CoreSight DP register.
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# Note: For SWD data is returned immediately.
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# For JTAG the data of the previous read is returned.
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# An additional read of DP reg 3 is necessary to get the data.
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# WriteAP Writes a CoreSight AP register.
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# WriteDP Writes a CoreSight DP register.
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# SWDSelect Selects SWD as interface and outputs
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# the JTAG -> SWD swichting sequence.
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# SWDReadAP Reads a CoreSight AP register via SWD.
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# Note: First read returns the data of the previous read.
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# An additional read of DP reg 3 is necessary to get the data.
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# SWDReadDP Reads a CoreSight DP register via SWD.
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# Note: Correct data is returned immediately.
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# SWDWriteAP Writes a CoreSight AP register via SWD.
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# SWDWriteDP Writes a CoreSight DP register via SWD.
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# Device Selects a specific device J-Link shall connect to
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# and performs a reconnect.
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# In most cases explicit selection of the device is not necessary.
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# Selecting a device enables the user to make use of the J-Link
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# flash programming functionality as well as using unlimited
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# breakpoints in flash memory.
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# For some devices explicit device selection is mandatory in order
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# to allow the DLL to perform special handling needed by the device.
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# ExpDevList Exports the device names from the DLL internal
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# device list to a text file
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# Syntax: ExpDevList <Filename>
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# PowerTrace Perform power trace (not supported by all models)
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# Syntax: PowerTrace <LogFile> [<ChannelMask> <RefCountSel>]
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# <LogFile>: File to store power trace data to
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# <ChannelMask>: 32-bit mask to specify what channels shall be enabled
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# <SampleFreq>: Sampling frequency in Hz (0 == max)
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# <RefCountSel>: 0: No reference count
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# 1: Number of bytes transmitted on SWO
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# ---- CP15 ------------
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# rce Read CP15. Syntax: rce <Op1>, <CRn>, <CRm>, <Op2>
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# wce Write CP15. Syntax: wce <Op1>, <CRn>, <CRm>, <Op2>, <Data>
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# ---- ICE -------------
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# Ice Show state of the embedded ice macrocell (ICE breaker)
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# ri Read Ice reg. Syntax: ri <RegIndex>(hex)
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# wi Write Ice reg. Syntax: wi <RegIndex>, <Data>(hex)
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# ---- TRACE -----------
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# TAddBranch TRACE - Add branch instruction to trace buffer. Paras:<Addr>,<BAddr>
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# TAddInst TRACE - Add (non-branch) instruction to trace buffer. Syntax: <Addr>
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# TClear TRACE - Clear buffer
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# TSetSize TRACE - Set Size of trace buffer
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# TSetFormat TRACE - SetFormat
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# TSR TRACE - Show Regions (and analyze trace buffer)
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# TStart TRACE - Start
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# TStop TRACE - Stop
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# ---- SWO -------------
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# SWOSpeed SWO - Show supported speeds
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# SWOStart SWO - Start
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# SWOStop SWO - Stop
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# SWOStat SWO - Display SWO status
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# SWORead SWO - Read and display SWO data
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# SWOShow SWO - Read and analyze SWO data
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# SWOFlush SWO - Flush data
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# SWOView SWO - View terminal data
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# ---- PERIODIC --------
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# PERConf PERIODIC - Configure
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# PERStart PERIODIC - Start
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# PERStop PERIODIC - Stop
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# PERStat PERIODIC - Display status
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# PERRead PERIODIC - Read and display data
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# PERShow PERIODIC - Read and analyze data
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# ---- File I/O --------
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# fwrite Write file to emulator
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# fread Read file from emulator
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# fshow Read and display file from emulator
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# fdelete Delete file on emulator
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# fsize Display size of file on emulator
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# ---- Test ------------
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# TestHaltGo Run go/halt 1000 times
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# TestStep Run step 1000 times
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# TestCSpeed Measure CPU speed.
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# Parameters: [<RAMAddr>]
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# TestWSpeed Measure download speed into target memory.
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# Parameters: [<Addr> [<Size>]]
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|
+
# TestRSpeed Measure upload speed from target memory.
|
|
145
|
+
# Parameters: [<Addr> [<Size>] [<NumBlocks>]]
|
|
146
|
+
# TestNWSpeed Measure network download speed.
|
|
147
|
+
# Parameters: [<NumBytes> [<NumReps>]]
|
|
148
|
+
# TestNRSpeed Measure network upload speed.
|
|
149
|
+
# Parameters: [<NumBytes> [<NumReps>]]
|
|
150
|
+
# ---- JTAG ------------
|
|
151
|
+
# Config Set number of IR/DR bits before ARM device.
|
|
152
|
+
# Syntax: Config <IRpre>, <DRpre>
|
|
153
|
+
# speed Set JTAG speed. Syntax: speed <freq>|auto|adaptive, e.g. speed 2000,
|
|
154
|
+
# speed a
|
|
155
|
+
# i Read JTAG Id (Host CPU)
|
|
156
|
+
# wjc Write JTAG command (IR). Syntax: wjc <Data>(hex)
|
|
157
|
+
# wjd Write JTAG data (DR). Syntax: wjd <Data64>(hex), <NumBits>(dec)
|
|
158
|
+
# RTAP Reset TAP Controller using state machine (111110)
|
|
159
|
+
# wjraw Write Raw JTAG data. Syntax: wjraw <NumBits(dec)>, <tms>, <tdi>
|
|
160
|
+
# rt Reset TAP Controller (nTRST)
|
|
161
|
+
# ---- JTAG-Hardware ---
|
|
162
|
+
# c00 Create clock with TDI = TMS = 0
|
|
163
|
+
# c Clock
|
|
164
|
+
# tck0 Clear TCK
|
|
165
|
+
# tck1 Set TCK
|
|
166
|
+
# 0 Clear TDI
|
|
167
|
+
# 1 Set TDI
|
|
168
|
+
# t0 Clear TMS
|
|
169
|
+
# t1 Set TMS
|
|
170
|
+
# trst0 Clear TRST
|
|
171
|
+
# trst1 Set TRST
|
|
172
|
+
# r0 Clear RESET
|
|
173
|
+
# r1 Set RESET
|
|
174
|
+
# ---- Connection ------
|
|
175
|
+
# usb Connect to J-Link via USB. Syntax: usb <port>, where port is 0..3
|
|
176
|
+
# ip Connect to J-Link ARM Pro or J-Link TCP/IP Server via TCP/IP.
|
|
177
|
+
# Syntax: ip <ip_addr>
|
|
178
|
+
# ---- Configuration ---
|
|
179
|
+
# si Select target interface. Syntax: si <Interface>,
|
|
180
|
+
# where 0=JTAG and 1=SWD.
|
|
181
|
+
# power Switch power supply for target. Syntax: power <State> [perm],
|
|
182
|
+
# where State is either On or Off. Example: power on perm
|
|
183
|
+
# wconf Write configuration byte. Syntax: wconf <offset>, <data>
|
|
184
|
+
# rconf Read configuration bytes. Syntax: rconf
|
|
185
|
+
# ipaddr Show/Assign IP address and subnetmask of/to the connected J-Link.
|
|
186
|
+
# gwaddr Show/Assign network gateway address of/to the connected J-Link.
|
|
187
|
+
# dnsaddr Show/Assign network DNS server address of/to the connected J-Link.
|
|
188
|
+
# conf Show configuration of the connected J-Link.
|
|
189
|
+
# ecp Enable the J-Link control panel.
|
|
190
|
+
# calibrate Calibrate the target current measurement.
|
|
191
|
+
# selemu Select a emulator to communicate with,
|
|
192
|
+
# from a list of all emulators which are connected to the host
|
|
193
|
+
# The interfaces to search on, can be specified
|
|
194
|
+
# Syntax: selemu [<Interface0> <Interface1> ...]
|
|
195
|
+
# ShowEmuList Shows a list of all emulators which are connected to the host.
|
|
196
|
+
# The interfaces to search on, can be specified.
|
|
197
|
+
# Syntax: ShowEmuList [<Interface0> <Interface1> ...]
|
|
198
|
+
#
|
|
197
199
|
# ----------------------
|
|
198
200
|
# NOTE: Specifying a filename in command line
|
|
199
201
|
# will start J-Link Commander in script mode.
|
data/templates/web/index.md.erb
CHANGED
|
@@ -46,6 +46,35 @@ $tester = OrigenDebuggers::JLink.new
|
|
|
46
46
|
Patterns should now generate a debugger command file without any additional application
|
|
47
47
|
modifications.
|
|
48
48
|
|
|
49
|
+
For non-JTAG-based protocols, all debuggers support a common API for the protocol to
|
|
50
|
+
interface with, for example:
|
|
51
|
+
|
|
52
|
+
~~~ruby
|
|
53
|
+
# Sleep for 40ms
|
|
54
|
+
$tester.wait(:time_in_ms => 40)
|
|
55
|
+
|
|
56
|
+
# Sleep for 20 cycles
|
|
57
|
+
$tester.wait(:cycles => 20)
|
|
58
|
+
|
|
59
|
+
$tester.write_byte(0x55, address: 0x12)
|
|
60
|
+
|
|
61
|
+
$tester.write_word(0xAA55, address: 0x34)
|
|
62
|
+
|
|
63
|
+
$tester.write_longword(0x1122_AA55, address: 0x5678)
|
|
64
|
+
|
|
65
|
+
$tester.read(10, address: 0x0001234, size: 8)
|
|
66
|
+
~~~
|
|
67
|
+
|
|
68
|
+
See the API for details on all available methods: [Common_API](<%= path "api/OrigenDebuggers/JLink/Common_API.html" %>)
|
|
69
|
+
|
|
70
|
+
Finally all debuggers support a direct write method that should be used as a last resort
|
|
71
|
+
to drive debugger-specific functionality that is not otherwise exposed via an official API:
|
|
72
|
+
|
|
73
|
+
~~~ruby
|
|
74
|
+
$tester.dw "hwinfo"
|
|
75
|
+
$tester.dw "mem 0x1234, 10"
|
|
76
|
+
~~~
|
|
77
|
+
|
|
49
78
|
### How To Setup a Development Environment
|
|
50
79
|
|
|
51
80
|
[Clone the repository from Github](https://github.com/Origen-SDK/origen_debuggers).
|
metadata
CHANGED
|
@@ -1,14 +1,14 @@
|
|
|
1
1
|
--- !ruby/object:Gem::Specification
|
|
2
2
|
name: origen_debuggers
|
|
3
3
|
version: !ruby/object:Gem::Version
|
|
4
|
-
version: 0.5.
|
|
4
|
+
version: 0.5.1
|
|
5
5
|
platform: ruby
|
|
6
6
|
authors:
|
|
7
7
|
- Stephen McGinty
|
|
8
8
|
autorequire:
|
|
9
9
|
bindir: bin
|
|
10
10
|
cert_chain: []
|
|
11
|
-
date: 2015-
|
|
11
|
+
date: 2015-09-01 00:00:00.000000000 Z
|
|
12
12
|
dependencies:
|
|
13
13
|
- !ruby/object:Gem::Dependency
|
|
14
14
|
name: origen
|
|
@@ -24,6 +24,20 @@ dependencies:
|
|
|
24
24
|
- - ">="
|
|
25
25
|
- !ruby/object:Gem::Version
|
|
26
26
|
version: 0.2.6
|
|
27
|
+
- !ruby/object:Gem::Dependency
|
|
28
|
+
name: origen_testers
|
|
29
|
+
requirement: !ruby/object:Gem::Requirement
|
|
30
|
+
requirements:
|
|
31
|
+
- - ">="
|
|
32
|
+
- !ruby/object:Gem::Version
|
|
33
|
+
version: 0.5.0
|
|
34
|
+
type: :runtime
|
|
35
|
+
prerelease: false
|
|
36
|
+
version_requirements: !ruby/object:Gem::Requirement
|
|
37
|
+
requirements:
|
|
38
|
+
- - ">="
|
|
39
|
+
- !ruby/object:Gem::Version
|
|
40
|
+
version: 0.5.0
|
|
27
41
|
- !ruby/object:Gem::Dependency
|
|
28
42
|
name: origen_doc_helpers
|
|
29
43
|
requirement: !ruby/object:Gem::Requirement
|