origen_arm_debug 0.4.2 → 0.4.3

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data/config/version.rb CHANGED
@@ -1,7 +1,7 @@
1
1
  module OrigenARMDebug
2
2
  MAJOR = 0
3
3
  MINOR = 4
4
- BUGFIX = 2
4
+ BUGFIX = 3
5
5
  DEV = nil
6
6
 
7
7
  VERSION = [MAJOR, MINOR, BUGFIX].join(".") + (DEV ? ".pre#{DEV}" : '')
@@ -1,4 +1,9 @@
1
1
  module OrigenARMDebug
2
+ # To use this driver the owner model must include the SWD or JTAG protocol drivers:
3
+ # include JTAG
4
+ # or
5
+ # include SWD
6
+ #
2
7
  class Driver
3
8
  # Returns the parent object that instantiated the driver, could be
4
9
  # either a DUT object or a protocol abstraction
@@ -16,7 +21,7 @@ module OrigenARMDebug
16
21
  @owner = owner
17
22
  end
18
23
 
19
- # Create and/or return the SWJ_DP object with specified protocol
24
+ # Create and/or return the SWJ_DP object with specified protocol
20
25
  def swj_dp
21
26
  if owner.respond_to?(:swd)
22
27
  @swj_dp ||= SWJ_DP.new(self, :swd)
@@ -1,4 +1,5 @@
1
1
  module OrigenARMDebug
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+ # Simple JTAG-specific dut model that inherits from protocol-agnostic DUT model
2
3
  class JTAG_DUT < DUT
3
4
  include OrigenJTAG
4
5
  include Origen::Pins
@@ -1,4 +1,5 @@
1
1
  module OrigenARMDebug
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+ # Simple SWD-specific dut model that inherits from protocol-agnostic DUT model
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3
  class SWD_DUT < DUT
3
4
  include OrigenSWD
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  include Origen::Pins
@@ -1,4 +1,8 @@
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+ 'include rgen'
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  module OrigenARMDebug
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+ # Object that defines the API necessary to perform MEM-AP transactions. Requires
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+ # a top-level protocol be defined as well as a top-level instantiation of an
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+ # SWJ-DP object.
2
6
  class MemAP
3
7
  # ARM Debug Interface v5.1
4
8
  MEM_ADDR_CSW = 0x00000000
@@ -40,6 +44,25 @@ module OrigenARMDebug
40
44
  end
41
45
  alias_method :dp, :debug_port
42
46
 
47
+ # Output some instance-specific information
48
+ def inspect
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+ Origen.log.info '=' * 30
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+ Origen.log.info ' MEM-AP INFO'
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+ Origen.log.info " name: #{@name}"
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+ Origen.log.info " base address: 0x#{@base_address.to_hex}"
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+ Origen.log.info ''
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+ Origen.log.debug " csw_reg_addr = 0x#{csw_reg_addr.to_hex}"
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+ Origen.log.debug " tar_reg_addr = 0x#{tar_reg_addr.to_hex}"
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+ Origen.log.debug " drw_reg_addr = 0x#{drw_reg_addr.to_hex}"
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+ Origen.log.debug " bd0_reg_addr = 0x#{bd0_reg_addr.to_hex}"
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+ Origen.log.debug " bd1_reg_addr = 0x#{bd1_reg_addr.to_hex}"
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+ Origen.log.debug " bd2_reg_addr = 0x#{bd2_reg_addr.to_hex}"
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+ Origen.log.debug " bd3_reg_addr = 0x#{bd3_reg_addr.to_hex}"
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+ Origen.log.debug " cfg_reg_addr = 0x#{cfg_reg_addr.to_hex}"
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+ Origen.log.debug " base_reg_addr = 0x#{base_reg_addr.to_hex}"
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+ Origen.log.debug " idr_reg_addr = 0x#{idr_reg_addr.to_hex}"
64
+ end
65
+
43
66
  # -----------------------------------------------------------------------------
44
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  # User API
45
68
  # -----------------------------------------------------------------------------
@@ -350,7 +373,7 @@ module OrigenARMDebug
350
373
  end
351
374
 
352
375
  # Returns address of BD0 register for this mem-ap instance
353
- def bdo_reg_addr
376
+ def bd0_reg_addr
354
377
  MEM_ADDR_BD0 + @base_address
355
378
  end
356
379
 
@@ -1,12 +1,21 @@
1
1
  module OrigenARMDebug
2
+ # Object that defines API for performing Debug AP transations using SWD or JTAG
2
3
  class SWJ_DP
3
4
  include Origen::Registers
4
5
 
5
6
  # Returns the parent object that instantiated the driver, could be
6
7
  # either a DUT object or a protocol abstraction
7
8
  attr_reader :owner
9
+
10
+ # Protocol implemented at the top-level (i.e. SWD or JTAG)
8
11
  attr_reader :imp
12
+
13
+ # Customizable delay for DUT-specific required cycles for write_ap transaction
14
+ # to complete
9
15
  attr_accessor :write_ap_dly
16
+
17
+ # Customizable delay for DUT-specific required cycles for acc_access transaction
18
+ # to complete
10
19
  attr_accessor :acc_access_dly
11
20
 
12
21
  # Initialize class variables
@@ -356,6 +365,9 @@ module OrigenARMDebug
356
365
  $tester.cycle(repeat: @acc_access_dly)
357
366
  end
358
367
 
368
+ # Returns the address of the register based on the name (string) of the register
369
+ #
370
+ # @param [String] name Name of the register
359
371
  def get_dp_addr(name)
360
372
  case name
361
373
  when 'IDCODE' then return 0x0
@@ -369,11 +381,18 @@ module OrigenARMDebug
369
381
  end
370
382
  end
371
383
 
384
+ # Writes to the JTAG instruction regsiter in order to perform a transaction on the given Register
385
+ #
386
+ # @param [String] name Name of the register to be interacted with
372
387
  def set_ir(name)
373
388
  new_ir = get_ir_code(name)
374
389
  jtag.write_ir(new_ir, size: 4)
375
390
  end
376
391
 
392
+ # Returns the value to be written to the JTAG instruction regsiter in order to perform
393
+ # a transaction on the given Register
394
+ #
395
+ # @param [String] name Name of the register to be interacted with
377
396
  def get_ir_code(name)
378
397
  case name
379
398
  when 'IDCODE' then return 0b1110 # JTAGC_ARM_IDCODE
@@ -389,6 +408,11 @@ module OrigenARMDebug
389
408
  0
390
409
  end
391
410
 
411
+ # Method to select an Access Port (AP) by writing to the SELECT register in the Debug Port
412
+ #
413
+ # @param [Integer] addr Address to be written to the SELECT register. It's value
414
+ # will determine which Access Port is selected.
415
+ # @param [Hash] options Options to customize the operation
392
416
  def set_apselect(addr, options = {})
393
417
  if @imp == :swd
394
418
  addr &= 0xff0000f1
@@ -15,4 +15,7 @@ Pattern.create do
15
15
  $dut.arm_debug.mem_ap.W(0x10000004, 0x55555555)
16
16
  $dut.arm_debug.mem_ap.WR(0x10000004, 0x55555555)
17
17
 
18
+ $dut.arm_debug.mem_ap.inspect
19
+ $dut.arm_debug.mdm_ap.inspect
20
+ $dut.arm_debug.alt_ahbapi.inspect
18
21
  end
metadata CHANGED
@@ -1,14 +1,14 @@
1
1
  --- !ruby/object:Gem::Specification
2
2
  name: origen_arm_debug
3
3
  version: !ruby/object:Gem::Version
4
- version: 0.4.2
4
+ version: 0.4.3
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5
  platform: ruby
6
6
  authors:
7
7
  - Ronnie Lajaunie
8
8
  autorequire:
9
9
  bindir: bin
10
10
  cert_chain: []
11
- date: 2015-08-27 00:00:00.000000000 Z
11
+ date: 2015-08-28 00:00:00.000000000 Z
12
12
  dependencies:
13
13
  - !ruby/object:Gem::Dependency
14
14
  name: origen