origen_arm_debug 1.1.0 → 1.1.1

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data/config/version.rb CHANGED
@@ -1,7 +1,7 @@
1
1
  module OrigenARMDebug
2
2
  MAJOR = 1
3
3
  MINOR = 1
4
- BUGFIX = 0
4
+ BUGFIX = 1
5
5
  DEV = nil
6
6
 
7
7
  VERSION = [MAJOR, MINOR, BUGFIX].join(".") + (DEV ? ".pre#{DEV}" : '')
@@ -9,6 +9,11 @@ module OrigenARMDebug
9
9
  # time of memory read (read data path: memory->drw->rdbuff)
10
10
  attr_accessor :apmem_access_wait
11
11
 
12
+ # Wait states to occur in between configuring the DAP for a read, and for the the read transaction to begin.
13
+ # For JTAG, this is the wait states in between setting the AP and for the read transaction to occur.
14
+ # For SWD, this is the wait states in between setting the AP, initiating and completing a dummy read, and beginning the actual read transaction.
15
+ attr_accessor :apacc_wait_states
16
+
12
17
  def initialize(options = {})
13
18
  super
14
19
 
@@ -39,6 +39,13 @@ module OrigenARMDebug
39
39
 
40
40
  select_ap_reg(reg)
41
41
  dut.swd.read_ap(address: reg.address)
42
+
43
+ # Add any extra delay needed in between selecting the AP state, initiating and completing a dummy read, and
44
+ # starting the actual read.
45
+ if options[:apacc_wait_states]
46
+ options[:apacc_wait_states].cycles
47
+ end
48
+
42
49
  dut.swd.read_dp(reg, options.merge(address: rdbuff.address))
43
50
  end
44
51
  end
@@ -90,9 +90,10 @@ arm_debug.ahb_ap.csw.write!(0x23000052)
90
90
 
91
91
  You can also adjust the intermediate wait-states and latency parameters:
92
92
 
93
- * [AP.apreg_access_wait](http://origen-sdk.org/arm_debug/api/OrigenARMDebug/AP.html#apreg_access_wait-instance_method)
94
- * [MemAP.apmem_access_wait](http://origen-sdk.org/arm_debug/api/OrigenARMDebug/MemAP.html#apmem_access_wait-instance_method)
95
- * [MemAP.latency](http://origen-sdk.org/arm_debug/api/OrigenARMDebug/MemAP.html#latency-instance_method)
93
+ * [AP.apreg_access_wait](<%= path '/api/OrigenARMDebug/AP.html#apreg_access_wait-instance_method' %>)
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+ * [MemAP.apmem_access_wait](<%= path '/api/OrigenARMDebug/MemAP.html#apmem_access_wait-instance_method' %>)
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+ * [MemAP.latency](<%= path '/api/OrigenARMDebug/MemAP.html#latency-instance_method' %>)
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+ * [MemAP.apacc_wait_states](<%= path '/api/OrigenARMDebug/MemAP.html#apacc_wait_states-instance_method' %>)
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97
 
97
98
  ~~~ruby
98
99
  # Assuming ahb_ap has been previously defined
metadata CHANGED
@@ -1,14 +1,14 @@
1
1
  --- !ruby/object:Gem::Specification
2
2
  name: origen_arm_debug
3
3
  version: !ruby/object:Gem::Version
4
- version: 1.1.0
4
+ version: 1.1.1
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5
  platform: ruby
6
6
  authors:
7
7
  - Ronnie Lajaunie
8
8
  autorequire:
9
9
  bindir: bin
10
10
  cert_chain: []
11
- date: 2018-02-14 00:00:00.000000000 Z
11
+ date: 2018-05-01 00:00:00.000000000 Z
12
12
  dependencies:
13
13
  - !ruby/object:Gem::Dependency
14
14
  name: origen
@@ -101,7 +101,6 @@ files:
101
101
  - lib/origen_arm_debug_dev/dut_swd.rb
102
102
  - pattern/workout.rb
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103
  - templates/web/index.md.erb
104
- - templates/web/index.md.erb~
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  - templates/web/layouts/_basic.html.erb
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105
  - templates/web/partials/_navbar.html.erb
107
106
  - templates/web/release_notes.md.erb
@@ -131,4 +130,3 @@ specification_version: 4
131
130
  summary: Provides an Origen API to perform register read and write operations via
132
131
  the ARM_DEBUG protocol.
133
132
  test_files: []
134
- has_rdoc:
@@ -1,238 +0,0 @@
1
- % render "layouts/basic.html" do
2
-
3
- %# HTML tags can be embedded in mark down files if you want to do specific custom
4
- %# formatting like this, but in most cases that is not required.
5
- <h1><%= Origen.app.namespace %> <span style="font-size: 14px">(<%= Origen.app.version %>)</span></h1>
6
-
7
- ### Purpose
8
-
9
- This library provides register and memory read/write and debug control capability via the ARM Debug Interface v5 Spec.
10
-
11
- ### How To Import
12
-
13
- In your Gemfile add:
14
-
15
- ~~~ruby
16
- gem "origen_arm_debug", ">= <%= Origen.app.version %>"
17
- ~~~
18
-
19
- or if your application is a plugin add this to your <code>.gemspec</code>
20
-
21
- ~~~ruby
22
- spec.add_development_dependency "origen_arm_debug", ">= <%= Origen.app.version %>"
23
- ~~~
24
-
25
- __NOTE:__ You will also need to include <code>require 'origen_arm_debug'</code> somewhere in your environment
26
- if your app is a plugin.
27
-
28
-
29
- ### How To Use
30
-
31
- The most common way to use the Arm Debugger plugin is through the Origen register API via
32
- <code>read_register</code> and <code>write_register</code> methods.
33
-
34
- You must include a compatible physical driver depending on what debug
35
- interface your device has, one of the following can be used:
36
-
37
- * [JTAG](http://origen-sdk.org/jtag)
38
- * [Single Wire Debug](http://origen-sdk.org/swd)
39
-
40
- ~~~ruby
41
- class DUT
42
- include Origen::TopLevel
43
-
44
- # Include the required physical driver, JTAG in this example
45
- include OrigenJTAG
46
-
47
- def initialize
48
- reg :myreg, 0x0012, size: 16 do |reg|
49
- reg.bits 15..8, :upper_byte
50
- reg.bits 7..0, :lower_byte
51
- end
52
-
53
- # Simple example using default wait-states and latency:
54
- # mem_ap: APSEL = 0x00 (base_address[31:24])
55
- # mem2_ap: APSEL = 0x01 (base_address[31:24])
56
- mem_aps = {
57
- mem_ap: { base_address: 0x00000000 }
58
- mem2_ap: { base_address: 0x10000000 }
59
- }
60
- sub_block :arm_debug, class_name: 'OrigenARMDebug::DAP', mem_aps: mem_aps
61
- end
62
-
63
- # Hook the ARMDebug module into the register API, any register read
64
- # requests will use the ARM Debug protocol by default
65
- def read_register(reg, options={})
66
- arm_debug.mem_ap.read_register(reg, options)
67
- end
68
-
69
- # As above for write requests
70
- def write_register(reg, options={})
71
- arm_debug.mem_ap.write_register(reg, options)
72
- end
73
- end
74
-
75
- DUT.new.myreg.write!(0x55AA) # => Will generate the required vectors using the ARM debug protocol
76
- ~~~
77
-
78
- You can access the lower-level API using conventional Origen register transactions:
79
-
80
- ~~~ruby
81
- arm_debug.sw_dp.idcode.read!(0x2BA01477)
82
- arm_debug.sw_dp.ctrlstat.write!(0x5000_0000) # Power-up
83
- arm_debug.sw_dp.ctrlstat.read!(0xF0000000) # Verify
84
- arm_debug.ahb_ap.idr.read!(0x24770011)
85
- arm_debug.sw_dp.select.write!(0) # Select AHB-AP, bank 0
86
-
87
- # Set the SIZE field of CSW to 0x2 (32-bit transfers) + AddrInc=1
88
- arm_debug.ahb_ap.csw.write!(0x23000052)
89
- ~~~
90
-
91
- You can also adjust the intermediate wait-states and latency parameters:
92
-
93
- * [AP.apreg_access_wait](http://origen-sdk.org/arm_debug/api/OrigenARMDebug/AP.html#apreg_access_wait-instance_method)
94
- * [MemAP.apmem_access_wait](http://origen-sdk.org/arm_debug/api/OrigenARMDebug/MemAP.html#apmem_access_wait-instance_method)
95
- * [MemAP.latency](http://origen-sdk.org/arm_debug/api/OrigenARMDebug/MemAP.html#latency-instance_method)
96
-
97
- ~~~ruby
98
- # Assuming ahb_ap has been previously defined
99
- dut.arm_debug.ahb_ap.apmem_access_wait = 16
100
- dut.arm_debug.ahb_ap.apreg_access_wait = 12
101
- dut.arm_debug.ahb_ap.latency = 8
102
-
103
- # You can define these at instantiation as well
104
- mem_aps = {
105
- mem_ap: { base_address: 0x00000000, latency: 8, apreg_access_wait: 12, apmem_access_wait: 16 }
106
- mem2_ap: { base_address: 0x10000000, latency: 8, apreg_access_wait: 12, apmem_access_wait: 16 }
107
- }
108
- sub_block :arm_debug, class_name: 'OrigenARMDebug::DAP', mem_aps: mem_aps
109
- ~~~
110
-
111
- When used with the JTAG physical driver these are the default IR size 4 and the default register select values are:
112
-
113
- ~~~
114
- idcode_select = 0b1110
115
- abort_select = 0b1000
116
- dpacc_select = 0b1010
117
- apacc_select = 0b1011
118
- ~~~
119
-
120
- You can set non-default values at instantiation like this:
121
-
122
- ~~~ruby
123
- mem_aps = {
124
- mem_ap: { base_address: 0x00000000 }
125
- mem2_ap: { base_address: 0x10000000 }
126
- }
127
- instantiation_options[:class_name] = 'OrigenARMDebug::DAP'
128
- instantiation_options[:mem_aps] = mem_aps
129
-
130
- instantiation_options[:ir_size] = 8
131
- instantiation_options[:idcode_select] = 0xFE
132
- instantiation_options[:abort_select] = 0xF8
133
- instantiation_options[:dpacc_select] = 0xFA
134
- instantiation_options[:apacc_select] = 0xFB
135
-
136
- sub_block :arm_debug, instantiation_options
137
- ~~~
138
-
139
- ### Company Customization
140
-
141
- It may be the case that your application needs additional, customized Access Ports (AP) which are allowed but
142
- not defined by the standard ARM Debug Interface. The following example shows how you can use the generic AP
143
- class as a starting point and add extra registers as defined by your specific implementation.
144
-
145
- ~~~ruby
146
- require 'origen_arm_debug'
147
- module ARMDebugCOMPANY
148
- # New AP class inherited from generic AP class provided by origen_arm_debug
149
- class CustomAP < OrigenARMDebug::AP
150
- # Initialize AP parameters and registers
151
- def initialize(options = {})
152
- super
153
-
154
- instantiate_registers(options)
155
-
156
- # Standard AP-register latency for most devices. Can be overriden by
157
- # top-level if necessary
158
- @apreg_access_wait = 8
159
- end
160
-
161
- # Add example registers associated with CustomAP.
162
- #
163
- # Custom registers can also be added by ARMDebug owner with add_reg or
164
- # overloading entire instantiate_registers methd
165
- #
166
- # Ex: arm_debug.company_ap.add_reg(:custom_reg_3, 0x08)
167
- def instantiate_registers(options = {})
168
- add_reg :custom_reg_1, 0x00
169
- add_reg :custom_reg_2, 0x04
170
- end
171
- end
172
- end
173
-
174
-
175
- class DUT
176
- include Origen::TopLevel
177
- include ARMDebugCOMPANY
178
-
179
- # Also include the required physical driver, JTAG in this example
180
- include OrigenJTAG
181
-
182
- def initialize
183
- reg :myreg, 0x0012, size: 16 do |reg|
184
- reg.bits 15..8, :upper_byte
185
- reg.bits 7..0, :lower_byte
186
- end
187
-
188
- # Some standard AP parameters values
189
- std_memap_config = { latency: 16, apreg_access_wait: 8, apmem_access_wait: 8, csw_reset: 0x23000040 }
190
-
191
- # 2 MemAPs using standard parameters (above)
192
- mem_aps = {
193
- mem_ap_0: { base_address: 0x00000000 }.merge(std_memap_config), # AP Select = 0x00
194
- mem_ap_1: { base_address: 0x01000000 }.merge(std_memap_config), # AP Select = 0x01
195
- }
196
-
197
- # Add Company-Customized AP class @ APSEL = 0x04
198
- custom_ap = {
199
- company_ap: { class_name: 'ARMDebugCOMPANY::CustomAP', base_address: 0x04000000, apreg_access_wait: 8 }
200
- }
201
-
202
- sub_block :arm_debug, class_name: 'OrigenARMDebug::DAP',
203
- base_address: 0,
204
- mem_aps: mem_aps,
205
- aps: custom_ap
206
- end
207
- end
208
- DUT.new.arm_debug.company_ap.custom_reg_1.write!(0x55AA)
209
- ~~~
210
-
211
- ### How To Setup a Development Environment
212
-
213
- [Clone the repository from Github](https://github.com/Origen-SDK/origen_arm_debug).
214
-
215
- An instance of the OrigenARMDebug driver is hooked up to a dummy DUT
216
- object for use in the console:
217
-
218
- ~~~
219
- origen i
220
-
221
- > dut.arm_debug
222
- => #<OrigenARMDebug::Driver:0x0000001ee48e78>
223
- ~~~
224
-
225
- Follow the instructions here if you want to make a 3rd party app
226
- workspace use your development copy of the OrigenARMDebug plugin:
227
- [Setting up a Plugin Development Environment](http://origen-sdk.org/origen/guides/plugins)
228
-
229
- This plugin also contains a test suite, makes sure this passes before committing
230
- any changes!
231
-
232
- ~~~
233
- origen examples
234
- ~~~
235
-
236
- <%= disqus_comments %>
237
-
238
- % end