origen 0.7.47 → 0.8.0

checksums.yaml

@@ -1,7 +1,7 @@
 ---
 SHA1:
-  metadata.gz: d8688e7223db63afb14c0f389e2ab3d886a734c5
-  data.tar.gz: 86b84cadd3cef4869577b0d1c0537c520665df6d
+  metadata.gz: 7ed980dcd18e1d53defcd27928d2fae2b5c6fe53
+  data.tar.gz: c9d7b163c3c5d219ea8b81f0b624938cf5049877
 SHA512:
-  metadata.gz: a12e93f8ecbbae0ace53ee1766c4508915f51cf9723862b991776c510b412e6713aa95394ea1901cc57a4e783f088f41f21f94c2979df5b9a28f837d08a6b12c
-  data.tar.gz: a0146dad6e254c25bb97fd58ad905e5cf8af69690ec7bff85e1a3ee786ac15ca0adf1c28814d0ed83379cb62701aac22f2f8dc1e99f809481c61acd7dbc76293
+  metadata.gz: 540490e6a49ea8c7acef2f18d56eec937a14fe826b91f48fc0344a52ee9027d6310ed9546a77f1d2a95a484123feac4ca366228b8b8c01bfa79ed1f575f7ac5a
+  data.tar.gz: 83801037183ae53aa780c1c06c4a15bc9976361e2a552011195176eb8004353a69a1b58b525de23ec4373906dc6ad7b8c4b395aec07a65c300e469fc7728ae22

data/config/version.rb

@@ -1,7 +1,7 @@
 module Origen
   MAJOR = 0
-  MINOR = 7
-  BUGFIX = 47
+  MINOR = 8
+  BUGFIX = 0
   DEV = nil
 
   VERSION = [MAJOR, MINOR, BUGFIX].join(".") + (DEV ? ".pre#{DEV}" : '')

data/lib/c99/nvm.rb

@@ -44,6 +44,18 @@ module C99
     def add_non_byte_aligned_regs
       add_reg :non_aligned_small, 0x1000, size: 4
       add_reg :non_aligned_big, 0x1010, size: 10
+      add_reg :non_aligned_small_msb0, 0x2000, size: 4, bit_order: :msb0
+      add_reg :non_aligned_big_msb0, 0x2010, size: 10, bit_order: :msb0
+    end
+
+    def add_msb0_regs
+      reg :SIUL2_MIDR1, 0x4, bit_order: :msb0  do |reg|
+        bit 0..15,  :PARTNUM, res: 0b0101011101110111
+        bit 16,     :ED
+        bit 17..21, :PKG
+        bit 24..27, :MAJOR_MASK
+        bit 28..31, :MINOR_MASK
+      end
     end
   end
 

data/lib/origen/application.rb

@@ -23,7 +23,6 @@ module Origen
     require 'origen/users'
     include Origen::Users
 
-    attr_accessor :current_job
     attr_accessor :name
     attr_accessor :namespace
 
@@ -99,6 +98,14 @@ module Origen
       end
     end
 
+    def current_job
+      current_jobs.last
+    end
+
+    def current_jobs
+      @current_jobs ||= []
+    end
+
     # Load all rake tasks defined in the application's lib/task directory
     def load_tasks
       RakeLoader.new.load_tasks

data/lib/origen/generator/job.rb

@@ -109,7 +109,7 @@ module Origen
       end
 
       def run
-        Origen.app.current_job = self
+        Origen.app.current_jobs << self
         begin
           if @options[:compile]
             Origen.generator.compiler.compile(@requested_pattern, @options)
@@ -151,6 +151,7 @@ module Origen
             raise
           end
         end
+        Origen.app.current_jobs.pop
       end
     end
   end

data/lib/origen/model.rb

@@ -50,6 +50,7 @@ module Origen
       Origen.top_level == self
     end
     alias_method :is_dut?, :is_top_level?
+    alias_method :top_level?, :is_top_level?
 
     # Means that when dealing with a controller/model pair, you can
     # always call obj.model and obj.controller to get the one you want,

data/lib/origen/registers.rb

@@ -24,6 +24,20 @@ module Origen
 
       attr_accessor :owner
       attr_accessor :name
+      attr_writer :bit_order
+    end
+
+    # Returns the bit order attribute of the model (either :msb0 or :lsb0). If
+    # not explicitly defined on this model it will be inherited from the parent
+    # and will default to :lsb0 at the top-level
+    def bit_order
+      @bit_order ||= begin
+        if parent
+          parent.bit_order
+        else
+          :lsb0
+        end
+      end
     end
 
     def method_missing(method, *args, &block) # :nodoc:

data/lib/origen/registers/bit_collection.rb

@@ -17,6 +17,7 @@ module Origen
       STORE_CHAR = 'S'
 
       attr_accessor :name
+      alias_method :id, :name
 
       def initialize(reg, name, data = []) # :nodoc:
         if reg.respond_to?(:has_bits_enabled_by_feature?) && reg.has_parameter_bound_bits?
@@ -27,6 +28,11 @@ module Origen
         [data].flatten.each { |item| self << item }
       end
 
+      # Returns the bit order of the parent register
+      def bit_order
+        parent.bit_order
+      end
+
       def terminal?
         true
       end
@@ -103,7 +109,7 @@ module Origen
             v = tester.capture do
               store!(sync: true)
             end
-            reverse_each.with_index do |bit, i|
+            reverse_shift_out_with_index do |bit, i|
               bit.instance_variable_set('@updated_post_reset', true)
               bit.instance_variable_set('@data', v.first[i])
             end
@@ -264,7 +270,7 @@ module Origen
       #   reg(:control).data         #  => 0x55, assuming the reg has the required bits to store that
       def data
         data = 0
-        each_with_index do |bit, i|
+        shift_out_with_index do |bit, i|
           return undefined if bit.is_a?(Origen::UndefinedClass)
           data |= bit.data << i
         end
@@ -282,7 +288,7 @@ module Origen
       # Returns the reverse of the data value held by the collection
       def data_reverse
         data = 0
-        reverse.each_with_index do |bit, i|
+        reverse_shift_out_with_index do |bit, i|
           return undefined if bit.is_a?(Origen::UndefinedClass)
           data |= bit.data << i
         end
@@ -295,6 +301,11 @@ module Origen
         self
       end
 
+      # Returns true if the collection contains all bits in the register
+      def whole_reg?
+        size == parent.size
+      end
+
       # Set the data value of the collection within the patgen, but not on silicon - i.e. calling
       # write will not trigger a pattern write event.
       def write(value, options = {})
@@ -305,7 +316,10 @@ module Origen
           value = value[0]
         end
         value = value.data if value.respond_to?('data')
-        each_with_index { |bit, i| bit.write(value[i], options) }
+
+        size.times do |i|
+          self[i].write(value[i], options)
+        end
         self
       end
       alias_method :data=, :write
@@ -325,8 +339,8 @@ module Origen
           write(value, force: true)
         end
         if options[:mask]
-          each_with_index { |bit, i| bit.read if options[:mask][i] == 1 }
-          each_with_index { |bit, i| bit.clear_read_flag if options[:mask][i] == 0 }
+          shift_out_with_index { |bit, i| bit.read if options[:mask][i] == 1 }
+          shift_out_with_index { |bit, i| bit.clear_read_flag if options[:mask][i] == 0 }
         else
           each(&:read)
         end
@@ -374,12 +388,58 @@ module Origen
       #       bist_shift(bit)
       #   end
       def shift_out_left
-        reverse_each { |bit| yield bit }
+        if bit_order == :msb0
+          each { |bit| yield bit }
+        else
+          reverse_each { |bit| yield bit }
+        end
+      end
+
+      # Same as Reg#shift_out_left but includes the index counter
+      def shift_out_left_with_index
+        if bit_order == :msb0
+          each.with_index { |bit, i| yield bit, i }
+        else
+          reverse_each.with_index { |bit, i| yield bit, i }
+        end
       end
 
       # Same as Reg#shift_out_left but starts from the MSB
       def shift_out_right
-        each { |bit| yield bit }
+        if bit_order == :msb0
+          reverse_each { |bit| yield bit }
+        else
+          each { |bit| yield bit }
+        end
+      end
+
+      # Same as Reg#shift_out_right but includes the index counter
+      def shift_out_right_with_index
+        if bit_order == :msb0
+          reverse_each.with_index { |bit, i| yield bit, i }
+        else
+          each_with_index { |bit, i| yield bit, i }
+        end
+      end
+
+      # Yields each bit in the register, LSB first.
+      def shift_out(&block)
+        each(&block)
+      end
+
+      # Yields each bit in the register and its index, LSB first.
+      def shift_out_with_index(&block)
+        each_with_index(&block)
+      end
+
+      # Yields each bit in the register, MSB first.
+      def reverse_shift_out(&block)
+        reverse_each(&block)
+      end
+
+      # Yields each bit in the register and its index, MSB first.
+      def reverse_shift_out_with_index(&block)
+        reverse_each.with_index(&block)
       end
 
       # Returns true if any bits have the read flag set - see Bit#is_to_be_read?
@@ -410,7 +470,7 @@ module Origen
       # value in these bits
       def setting(value)
         result = 0
-        each_with_index do |bit, i|
+        shift_out_with_index do |bit, i|
           result |= bit.setting(value[i])
         end
         result
@@ -640,11 +700,11 @@ module Origen
       def reset_data(value = nil)
         # This method was originally setup to set the reset value by passing an argument
         if value
-          each_with_index { |bit, i| bit.reset_val = value[i] }
+          shift_out_with_index { |bit, i| bit.reset_val = value[i] }
           self
         else
           data = 0
-          each_with_index do |bit, i|
+          shift_out_with_index do |bit, i|
             return bit.reset_data if bit.reset_data.is_a?(Symbol)
             data |= bit.reset_data << i
           end
@@ -659,13 +719,13 @@ module Origen
 
       # Modify writable for bits in collection
       def writable(value)
-        each_with_index { |bit, i| bit.writable = (value[i] == 0b1); bit.set_access_from_rw }
+        shift_out_with_index { |bit, i| bit.writable = (value[i] == 0b1); bit.set_access_from_rw }
         self
       end
 
       # Modify readable for bits in collection
       def readable(value)
-        each_with_index { |bit, i| bit.readable = (value[i] == 0b1); bit.set_access_from_rw }
+        shift_out_with_index { |bit, i| bit.readable = (value[i] == 0b1); bit.set_access_from_rw }
         self
       end
 
@@ -718,20 +778,20 @@ module Origen
 
       # Modify clr_only for bits in collection
       def clr_only(value)
-        each_with_index { |bit, i| bit.clr_only = (value[i] == 0b1) }
+        shift_out_with_index { |bit, i| bit.clr_only = (value[i] == 0b1) }
         self
       end
 
       # Modify set_only for bits in collection
       def set_only(value)
-        each_with_index { |bit, i| bit.set_only = (value[i] == 0b1) }
+        shift_out_with_index { |bit, i| bit.set_only = (value[i] == 0b1) }
         self
       end
 
       # Return nvm_dep value held by collection
       def nvm_dep
         nvm_dep = 0
-        each_with_index { |bit, i| nvm_dep |= bit.nvm_dep << i }
+        shift_out_with_index { |bit, i| nvm_dep |= bit.nvm_dep << i }
         nvm_dep
       end
 
@@ -821,7 +881,7 @@ module Origen
       #   myreg.data          # => 0b0011
       def shift_left(data = 0)
         prev_bit = nil
-        reverse_each do |bit|
+        reverse_shift_out do |bit|
           prev_bit.write(bit.data) if prev_bit
           prev_bit = bit
         end
@@ -844,7 +904,7 @@ module Origen
       #   myreg.data          # => 0b1100
       def shift_right(data = 0)
         prev_bit = nil
-        each do |bit|
+        shift_out do |bit|
           prev_bit.write(bit.data) if prev_bit
           prev_bit = bit
         end

data/lib/origen/registers/reg.rb

@@ -14,12 +14,13 @@ module Origen
       # to all of its contained bits unless a specific bit has its own definition of the same
       # attribute
       REG_LEVEL_ATTRIBUTES = {
-        feature:  {},
-        reset:    { aliases: [:res] },
-        memory:   {},
-        path:     { aliases: [:hdl_path] },
-        abs_path: { aliases: [:absolute_path] },
-        access:   {}
+        feature:   {},
+        reset:     { aliases: [:res] },
+        memory:    {},
+        path:      { aliases: [:hdl_path] },
+        abs_path:  { aliases: [:absolute_path] },
+        access:    {},
+        bit_order: {}
       }
 
       # Returns the object that own the register.
@@ -86,6 +87,13 @@ module Origen
         add_bits_from_options(options)
       end
 
+      # Returns the bit order attribute of the register (either :msb0 or :lsb0). If
+      # not explicitly defined on this register it will be inherited from the parent
+      # and will default to :lsb0 at the top-level
+      def bit_order
+        @bit_order ||= parent.bit_order
+      end
+
       def freeze
         bits.each(&:freeze)
         # Call any methods which cache results to generate the instance variables
@@ -122,10 +130,14 @@ module Origen
         bit_width = 13
         desc = ["\n0x%X - :#{name}" % address]
         r = size % 8
-        if r == 0
+        if r == 0 || (size > 8 && bit_order == :msb0)
           desc << ('   ' + ('=' * (bit_width + 1) * 8)).chop
         else
-          desc << ('   ' + (' ' * (bit_width + 1) * (8 - r)) + ('=' * (bit_width + 1) * r)).chop
+          if bit_order == :lsb0
+            desc << ('   ' + (' ' * (bit_width + 1) * (8 - r)) + ('=' * (bit_width + 1) * r)).chop
+          else
+            desc << ('   ' + ('=' * (bit_width + 1) * r)).chop
+          end
         end
 
         # "<#{self.class}: #{self.name}>"
@@ -133,30 +145,48 @@ module Origen
         num_bytes.times do |byte_index|
           # Need to add support for little endian regs here?
           byte_number = num_bytes - byte_index
-          max_bit = (byte_number * 8) - 1
-          min_bit = max_bit - 8 + 1
+          if bit_order == :lsb0
+            max_bit = (byte_number * 8) - 1
+            min_bit = max_bit - 8 + 1
+          else
+            min_bit = (byte_index * 8)
+            max_bit = min_bit + 7
+          end
 
           # BIT INDEX ROW
           line = '  '
+          line_complete = false
           8.times do |i|
-            bit_num = (byte_number * 8) - i - 1
+            if bit_order == :lsb0
+              bit_num = (byte_number * 8) - i - 1
+            else
+              bit_num = (byte_index * 8) + i
+            end
             if bit_num > size - 1
-              line << ' ' + ''.center(bit_width)
+              if bit_order == :msb0 && bit_num == size
+                line += '|'
+                line_complete = true
+              else
+                line << ' ' + ''.center(bit_width)
+              end
             else
               line << '|' + "#{bit_num}".center(bit_width)
             end
           end
-          line += '|'
+          line += '|' unless line_complete
           desc << line
 
           # BIT NAME ROW
           line = '  '
           first_done = false
+          line_complete = false
           named_bits include_spacers: true do |name, bit, bitcounter|
             if _bit_in_range?(bit, max_bit, min_bit)
-              if max_bit > (size - 1) && !first_done
-                (max_bit - (size - 1)).times do
-                  line << ' ' * (bit_width + 1)
+              if bit_order == :lsb0
+                if max_bit > (size - 1) && !first_done
+                  (max_bit - (size - 1)).times do
+                    line << ' ' * (bit_width + 1)
+                  end
                 end
               end
 
@@ -164,13 +194,21 @@ module Origen
 
                 if name
                   if bitcounter.nil?
-                    bit_name = "#{name}[#{_max_bit_in_range(bit, max_bit, min_bit)}:#{_min_bit_in_range(bit, max_bit, min_bit)}]"
+                    if bit_order == :lsb0
+                      bit_name = "#{name}[#{_max_bit_in_range(bit, max_bit, min_bit)}:#{_min_bit_in_range(bit, max_bit, min_bit)}]"
+                    else
+                      bit_name = "#{name}[#{_min_bit_in_range(bit, max_bit, min_bit)}:#{_max_bit_in_range(bit, max_bit, min_bit)}]"
+                    end
                     bit_span = _num_bits_in_range(bit, max_bit, min_bit)
 
                   else
                     upper = _max_bit_in_range(bit, max_bit, min_bit) + bitcounter - bit.size
                     lower = _min_bit_in_range(bit, max_bit, min_bit) + bitcounter - bit.size
-                    bit_name = "#{name}[#{upper}:#{lower}]"
+                    if bit_order == :lsb0
+                      bit_name = "#{name}[#{upper}:#{lower}]"
+                    else
+                      bit_name = "#{name}[#{upper}:#{lower}]"
+                    end
                     bit_span = upper - lower + 1
                   end
                   width = (bit_width * bit_span) + bit_span - 1
@@ -212,9 +250,11 @@ module Origen
           first_done = false
           named_bits include_spacers: true do |name, bit, _bitcounter|
             if _bit_in_range?(bit, max_bit, min_bit)
-              if max_bit > (size - 1) && !first_done
-                (max_bit - (size - 1)).times do
-                  line << ' ' * (bit_width + 1)
+              if bit_order == :lsb0
+                if max_bit > (size - 1) && !first_done
+                  (max_bit - (size - 1)).times do
+                    line << ' ' * (bit_width + 1)
+                  end
                 end
               end
 
@@ -265,13 +305,19 @@ module Origen
 
           if size >= 8
             r = size % 8
-            if byte_index == 0 && r != 0
+            if byte_index == 0 && r != 0 && bit_order == :lsb0
               desc << ('   ' + ('=' * (bit_width + 1) * (8 - r)).chop + ' ' + ('-' * (bit_width + 1) * r)).chop
+            elsif (byte_index == num_bytes - 1) && r != 0 && bit_order == :msb0
+              desc << ('   ' + ('-' * (bit_width + 1) * r)).chop
             else
               desc << ('   ' + ('-' * (bit_width + 1) * 8)).chop
             end
           else
-            desc << ('   ' + (' ' * (bit_width + 1) * (8 - size)) + ('-' * (bit_width + 1) * size)).chop
+            if bit_order == :lsb0
+              desc << ('   ' + (' ' * (bit_width + 1) * (8 - size)) + ('-' * (bit_width + 1) * size)).chop
+            else
+              desc << ('   ' + ('-' * (bit_width + 1) * size)).chop
+            end
           end
         end
         desc.join("\n")
@@ -411,7 +457,6 @@ module Origen
 
       # @api private
       def add_bits_from_options(options = {}) # :nodoc:
-        # edit Traynor
         # options is now an array for split bit groups or a hash if single bit/range bits
         # Now add the requested bits to the register, removing the unwritable bits as required
         options.each do |bit_id, bit_params|
@@ -490,12 +535,24 @@ module Origen
         @lookup.each { |_k, v| split_bits = true if v.is_a? Array }
 
         if split_bits == false
-          current_pos = size
-          # Sort by position descending
-          @lookup.sort_by { |_name, details| -details[:pos] }.each do |name, details|
-            pos = details[:bits] + details[:pos]
+          if bit_order == :lsb0
+            current_pos = size
+          else
+            current_pos = 0
+          end
+          # Sort by position
+          @lookup.sort_by { |_name, details| bit_order == :lsb0 ? -details[:pos] : details[:pos] }.each do |name, details|
+            if bit_order == :lsb0
+              pos = details[:bits] + details[:pos]
+            else
+              pos = details[:pos]
+            end
             if options[:include_spacers] && (pos != current_pos)
-              collection = BitCollection.dummy(self, nil, size: current_pos - pos, pos: pos)
+              if bit_order == :lsb0
+                collection = BitCollection.dummy(self, nil, size: current_pos - pos, pos: pos)
+              else
+                collection = BitCollection.dummy(self, nil, size: pos - current_pos, pos: current_pos)
+              end
               unless collection.size == 0
                 if block_given?
                   yield nil, collection
@@ -515,10 +572,19 @@ module Origen
                 result << [name, collection]
               end
             end
-            current_pos = details[:pos]
+            if bit_order == :lsb0
+              current_pos = details[:pos]
+            else
+              current_pos = details[:bits] + details[:pos]
+            end
           end
-          if options[:include_spacers] && current_pos != 0
-            collection = BitCollection.dummy(self, nil, size: current_pos, pos: 0)
+          if options[:include_spacers] && ((bit_order == :lsb0 && current_pos != 0) ||
+                                            bit_order == :msb0 && current_pos != size)
+            if bit_order == :lsb0
+              collection = BitCollection.dummy(self, nil, size: current_pos, pos: 0)
+            else
+              collection = BitCollection.dummy(self, nil, size: size - current_pos, pos: current_pos)
+            end
             unless collection.size == 0
               if block_given?
                 yield nil, collection
@@ -1159,7 +1225,7 @@ module Origen
           extract_meta_data(method, *args)
         else
           if BitCollection.instance_methods.include?(method)
-            BitCollection.new(self, name, @bits).send(method, *args, &block)
+            to_bit_collection.send(method, *args, &block)
           elsif has_bits?(method)
             bits(method)
           else
@@ -1168,6 +1234,10 @@ module Origen
         end
       end
 
+      def to_bit_collection
+        BitCollection.new(self, name, @bits)
+      end
+
       # Recognize that Reg responds to all BitCollection methods methods based on
       # application-specific meta data properties
       def respond_to?(*args) # :nodoc:

data/lib/origen/remote_manager.rb

@@ -319,12 +319,16 @@ module Origen
             FileUtils.rm_f(version_file) if File.exist?(version_file)
             rc = RevisionControl.new remote: rc_url, local: dir
             rc.checkout version: prefix_tag(tag), force: true
-            `echo "#{tag}" >> "#{version_file}"`
+            File.open(version_file, 'w') do |f|
+              f.write tag
+            end
           else
             rc = RevisionControl.new remote: rc_url, local: dir
             rc.checkout version: prefix_tag(tag), force: true
-            `touch "#{dir}/.initial_populate_successful"`
-            `echo "#{tag}" >> "#{version_file}"`
+            FileUtils.touch "#{dir}/.initial_populate_successful"
+            File.open(version_file, 'w') do |f|
+              f.write tag
+            end
           end
         end
       end

metadata

@@ -1,14 +1,14 @@
 --- !ruby/object:Gem::Specification
 name: origen
 version: !ruby/object:Gem::Version
-  version: 0.7.47
+  version: 0.8.0
 platform: ruby
 authors:
 - Stephen McGinty
 autorequire: 
 bindir: bin
 cert_chain: []
-date: 2017-04-06 00:00:00.000000000 Z
+date: 2017-05-23 00:00:00.000000000 Z
 dependencies:
 - !ruby/object:Gem::Dependency
   name: activesupport
@@ -324,6 +324,20 @@ dependencies:
     - - '='
       - !ruby/object:Gem::Version
         version: 0.12.4
+- !ruby/object:Gem::Dependency
+  name: sinatra
+  requirement: !ruby/object:Gem::Requirement
+    requirements:
+    - - "~>"
+      - !ruby/object:Gem::Version
+        version: '1'
+  type: :runtime
+  prerelease: false
+  version_requirements: !ruby/object:Gem::Requirement
+    requirements:
+    - - "~>"
+      - !ruby/object:Gem::Version
+        version: '1'
 description: 
 email:
 - stephen.f.mcginty@gmail.com
@@ -568,7 +582,7 @@ required_rubygems_version: !ruby/object:Gem::Requirement
       version: 1.8.11
 requirements: []
 rubyforge_project: 
-rubygems_version: 2.6.7
+rubygems_version: 2.5.2
 signing_key: 
 specification_version: 4
 summary: The Semiconductor Developer's Kit