mfrc522 1.0.2 → 3.0.0

checksums.yaml

@@ -1,7 +1,7 @@
 ---
-SHA1:
-  metadata.gz: 215975fcbc3557e0178dfb4914d1f7c485da80ec
-  data.tar.gz: 23d6d8c256dcd032ac97a4c8cfc24484d2b63f1f
+SHA256:
+  metadata.gz: b180534b3c1fff35f759792d021ba7005b460838e82b43782341f358d314ae5c
+  data.tar.gz: 77f1e85d84082d57ed27dbba18aea6b6e1e9949327f62ed135e2ec1389e12efe
 SHA512:
-  metadata.gz: 14924647fdbe471062ef2cf950148f8aef115c3a0a39e77d599a78950928e3356163a001dfdbba9f2a432fd5cf4bce7f54ad49d756e6a2acc30aec4226529293
-  data.tar.gz: 94d9f280bcd1fe4d9d7b9b91c96e149bcd7b0d03dadc3b3023c83ea21a1abd363abaab504c2c504f52ad1471e9e1952fd8d2166ddfb47120086fadd53d7c9bbc
+  metadata.gz: d558480f55924d0e55e6028f87186008ed51346ab8cb1720dd2330613fe3c34ec1c6c8c33575d4e9bc228e9a9bd3be2f6826da3349c67ab12a4006c744e5ea49
+  data.tar.gz: 75554b9bcb105507d74f18ae96552bc1dd93b1d5b813f0dc5fba1e5cfdbf3ace56a54f25b623a5948ee268c1ea936b87466e87101900efba49da2d94ac763168

data/lib/core_ext.rb

@@ -32,4 +32,42 @@ class Array
     sign = (self.last & 0x80 != 0) ? (-1 ^ ((1 << ((self.size * 8) - 1)) - 1)) : 0
     sign | self.to_uint
   end
+
+  def append_crc16
+    append_uint(crc16, 2)
+  end
+
+  def check_crc16(remove_after_check = false)
+    orig_crc = pop(2)
+    old_crc = (orig_crc[1] << 8) + orig_crc[0]
+    new_crc = crc16
+    concat(orig_crc) unless remove_after_check
+    old_crc == new_crc
+  end
+
+  def xor(array2)
+    zip(array2).map{|x, y| x ^ y }
+  end
+
+  def to_bytehex
+    map{|x| x.to_bytehex}
+  end
+
+  private
+
+  def crc16
+    crc = 0x6363
+    self.each do |byte|
+      bb = (byte ^ crc) & 0xFF
+      bb = (bb ^ (bb << 4)) & 0xFF
+      crc = (crc >> 8) ^ (bb << 8) ^ (bb << 3) ^ (bb >> 4)
+    end
+    crc & 0xFFFF
+  end
+end
+
+class Numeric
+  def to_bytehex
+    self.to_s(16).rjust(2, '0').upcase
+  end
 end

data/lib/exceptions.rb

@@ -5,6 +5,7 @@ class IncorrectCRCError < CommunicationError; end
 class CollisionError < CommunicationError; end
 
 class UnexpectedDataError < StandardError; end
+class UsageError < StandardError; end
 
 class MifareNakError < StandardError; end
 

data/lib/mfrc522.rb

@@ -1,4 +1,4 @@
-require 'pi_piper'
+require 'fubuki'
 
 require 'openssl'
 require 'securerandom'
@@ -7,15 +7,14 @@ require 'core_ext'
 require 'exceptions'
 
 require 'picc'
-require 'iso144434'
 
 require 'mifare/key'
 require 'mifare/classic'
+require 'mifare/plus'
+require 'mifare/des_fire'
 require 'mifare/ultralight'
 require 'mifare/ultralight_c'
-require 'mifare/des_fire'
-
-include PiPiper
+require 'mifare/ultralight_ev1'
 
 class MFRC522
 
@@ -27,8 +26,6 @@ class MFRC522
   PICC_SEL_CL2      = 0x95  # Anti collision/Select, Cascade Level 2
   PICC_SEL_CL3      = 0x97  # Anti collision/Select, Cascade Level 3
   PICC_HLTA         = 0x50  # HaLT command, Type A. Instructs an ACTIVE PICC to go to state HALT.
-  # Mifare Acknowledge
-  PICC_MF_ACK       = 0x0A
 
   # PCD commands
   PCD_Idle          = 0x00  # no action, cancels current command execution
@@ -100,19 +97,11 @@ class MFRC522
   TestDAC2Reg       = 0x3A  # defines the test value for TestDAC2
   TestADCReg        = 0x3B  # shows the value of ADC I and Q channels
 
-  def initialize(nrstpd = 24, chip = 0, spd = 8000000, timer = 256)
-    chip_option = { 0 => PiPiper::Spi::CHIP_SELECT_0,
-                    1 => PiPiper::Spi::CHIP_SELECT_1,
-                    2 => PiPiper::Spi::CHIP_SELECT_BOTH,
-                    3 => PiPiper::Spi::CHIP_SELECT_NONE }
-    @spi_chip = chip_option[chip]
-    @spi_spd = spd
-    @timer = timer
-
-    # Power it up
-    nrstpd_pin = PiPiper::Pin.new(pin: nrstpd, direction: :out)
-    nrstpd_pin.on
-    sleep 1.0 / 20.0 # Wait 50ms
+  def initialize(spi_bus: 0, spi_chip: 0, spi_spd: 1_000_000, spi_delay: 1, pcd_timer: 256)
+    @spi_driver = Fubuki::SPI.new(spi_bus, spi_chip)
+    @spi_speed = spi_spd
+    @spi_delay = spi_delay
+    @pcd_timer = pcd_timer
 
     soft_reset # Perform software reset
 
@@ -135,6 +124,12 @@ class MFRC522
 
   # Reset PCD config to default
   def pcd_config_reset
+    # Stop current command
+    write_spi(CommandReg, PCD_Idle)
+
+    # Stop crypto1 communication
+    mifare_crypto1_deauthenticate
+
     # Clear ValuesAfterColl bit
     write_spi_clear_bitmask(CollReg, 0x80)
 
@@ -143,7 +138,7 @@ class MFRC522
     transceiver_baud_rate(:rx, 0)
 
     # Set PCD timer value for 302us default timer
-    internal_timer(@timer)
+    internal_timer(@pcd_timer)
   end
 
   # Control transceive timeout value
@@ -159,10 +154,13 @@ class MFRC522
   # value = 0: 106kBd, 1: 212kBd, 2: 424kBd, 3: 848kBd
   def transceiver_baud_rate(direction, value = nil)
     reg = {tx: TxModeReg, rx: RxModeReg}
+    mod = {0 => 0x26, 1 => 0x15, 2 => 0x0A, 3 => 0x05}
 
     if value
+      @built_in_crc_disabled = (value == 0)
+      write_spi(ModWidthReg, mod.fetch(value))
       value <<= 4
-      value |= 0x80 if value != 0
+      value |= 0x80 unless @built_in_crc_disabled
       write_spi(reg.fetch(direction), value)
     end
 
@@ -189,6 +187,10 @@ class MFRC522
     (read_spi(RFCfgReg) & 0x70) >> 4
   end
 
+  def buffer_size
+    64
+  end
+
   # Wakes PICC from HALT or IDLE to ACTIVE state
   # Accept PICC_REQA and PICC_WUPA command
   def picc_request(picc_command)
@@ -201,7 +203,7 @@ class MFRC522
 
   # Instruct PICC in ACTIVE state go to HALT state
   def picc_halt
-    buffer = append_crc([PICC_HLTA, 0])
+    buffer = [PICC_HLTA, 0].append_crc16
 
     status, _received_data, _valid_bits = communicate_with_picc(PCD_Transceive, buffer)
 
@@ -213,7 +215,7 @@ class MFRC522
   # Select PICC for further communication
   #
   # PICC must be in state ACTIVE
-  def picc_select
+  def picc_select(disable_anticollision = false)
     #  Description of buffer structure:
     #
     #  Byte 0: SEL   Indicates the Cascade Level: PICC_CMD_SEL_CL1, PICC_CMD_SEL_CL2 or PICC_CMD_SEL_CL3
@@ -248,27 +250,42 @@ class MFRC522
       current_level_known_bits = 0
       received_data = []
       valid_bits = 0
+      timeout = true
 
-      loop do
+      # Maxmimum loop count is defined in ISO spec
+      32.times do
         if current_level_known_bits >= 32 # Prepare to do a complete select if we knew everything
-          # ensure there's nothing weird in buffer
-          if buffer.size != 6 && !buffer.select{|b| !buffer.is_a?(Fixnum)}.empty?
-            current_level_known_bits = 0
+          # Validate buffer content against non-numeric classes and incorrect size
+          buffer = buffer[0..5]
+          dirty_buffer = buffer.size != 6
+          dirty_buffer ||= buffer.any?{|byte| !byte.is_a?(Integer) }
+
+          # Retry reading UID when buffer is dirty, but don't reset loop count to prevent infinite loop
+          if dirty_buffer
+            # Reinitialize all variables
             buffer = [cascade_level]
+            current_level_known_bits = 0
+            received_data = []
+            valid_bits = 0
+
+            # Continue to next loop
             next
           end
 
           tx_last_bits = 0
           buffer[1] = 0x70 # NVB - We're sending full length byte[0..6]
-          buffer << (buffer[2] ^ buffer[3] ^ buffer[4] ^ buffer[5]) # Block Check Character
+          buffer[6] = (buffer[2] ^ buffer[3] ^ buffer[4] ^ buffer[5]) # Block Check Character
 
           # Append CRC to buffer
-          buffer = append_crc(buffer)
+          buffer.append_crc16
         else
           tx_last_bits = current_level_known_bits % 8
           uid_full_byte = current_level_known_bits / 8
           all_full_byte = 2 + uid_full_byte # length of SEL + NVB + UID
           buffer[1] = (all_full_byte << 4) + tx_last_bits # NVB
+
+          buffer_length = all_full_byte + (tx_last_bits > 0 ? 1 : 0)
+          buffer = buffer[0...buffer_length]
         end
 
         framing_bit = (tx_last_bits << 4) + tx_last_bits
@@ -278,10 +295,23 @@ class MFRC522
 
         if status != :status_ok && status != :status_collision
           raise CommunicationError, status
+        elsif status == :status_collision && disable_anticollision
+          raise CollisionError
+        end
+
+        if received_data.empty?
+          raise UnexpectedDataError, 'Received empty UID data'
         end
 
         # Append received UID into buffer if not doing full select
-        buffer = buffer[0...all_full_byte] + received_data[0..3] if current_level_known_bits < 32
+        if current_level_known_bits < 32
+          # Check for last collision
+          if tx_last_bits != 0
+            buffer[-1] |= received_data.shift
+          end
+
+          buffer += received_data
+        end
 
         # Handle collision
         if status == :status_collision
@@ -293,18 +323,27 @@ class MFRC522
           collision_position = collision & 0x1F
           collision_position = 32 if collision_position == 0 # Values 0-31, 0 means bit 32
           raise CollisionError if collision_position <= current_level_known_bits
-        
-          # Mark the collision bit
+
+          # Calculate positioin
           current_level_known_bits = collision_position
           uid_bit = (current_level_known_bits - 1) % 8
-          uid_byte = (current_level_known_bits / 8) + (uid_bit != 0 ? 1 : 0)
-          buffer[1 + uid_byte] |= (1 << uid_bit)
+
+          # Mark the collision bit
+          buffer[-1] |= (1 << uid_bit)
         else
-          break if current_level_known_bits >= 32
+          if current_level_known_bits >= 32
+            timeout = false
+            break
+          end
           current_level_known_bits = 32 # We've already known all bits, loop again for a complete select
         end 
       end
 
+      # Handle timeout after 32 loops
+      if timeout
+        raise UnexpectedDataError, 'Keep receiving incomplete UID until timeout'
+      end
+
       # We've finished current cascade level
       # Check and collect all uid stored in buffer
 
@@ -315,7 +354,7 @@ class MFRC522
       # Check the result of full select
       # Select Acknowledge is 1 byte + CRC16
       raise UnexpectedDataError, 'Unknown SAK format' if received_data.size != 3 || valid_bits != 0 
-      raise IncorrectCRCError unless check_crc(received_data)
+      raise IncorrectCRCError unless received_data.check_crc16(true)
 
       sak = received_data[0]
       break if (sak & 0x04) == 0 # No more cascade level
@@ -339,54 +378,6 @@ class MFRC522
     status && uid == new_uid
   end
 
-  # Lookup PICC name using sak
-  def identify_model(sak)
-    # SAK coding separation reference:
-    # http://cache.nxp.com/documents/application_note/AN10833.pdf
-    # http://www.nxp.com/documents/application_note/130830.pdf
-    if sak & 0x04 != 0
-      return :picc_uid_not_complete
-    end
-
-    if sak & 0x02 != 0
-      return :picc_reserved_future_use
-    end
-
-    if sak & 0x08 != 0
-      if sak & 0x10 != 0
-        return :picc_mifare_4k
-      end
-
-      if sak & 0x01 != 0
-        return :picc_mifare_mini
-      end
-      
-      return :picc_mifare_1k
-    end
-
-    if sak & 0x10 != 0
-      if sak & 0x01 != 0
-        return :picc_mifare_plus_4k_sl2
-      end
-        
-      return :picc_mifare_plus_2k_sl2
-    end
-
-    if sak == 0x00
-      return :picc_mifare_ultralight
-    end
-
-    if sak & 0x20 != 0
-      return :picc_iso_14443_4
-    end
-
-    if sak & 0x40 != 0
-      return :picc_iso_18092
-    end
-
-    return :picc_unknown
-  end
-
   # Start Crypto1 communication between reader and Mifare PICC
   #
   # PICC must be selected before calling for authentication
@@ -414,60 +405,55 @@ class MFRC522
 
   # Append CRC to buffer and check CRC or Mifare acknowledge
   def picc_transceive(send_data, accept_timeout = false)
-    send_data = append_crc(send_data)
+    send_data = send_data.dup
+    send_data.append_crc16 if @built_in_crc_disabled
 
-    puts "Sending Data: #{send_data.map{|x|x.to_s(16).rjust(2,'0').upcase}}" if ENV['DEBUG']
+    puts "Sending Data: #{send_data.to_bytehex}" if ENV['DEBUG']
 
     # Transfer data
     status, received_data, valid_bits = communicate_with_picc(PCD_Transceive, send_data)
-    return [] if status == :status_picc_timeout && accept_timeout
+    return if status == :status_picc_timeout && accept_timeout
     raise PICCTimeoutError if status == :status_picc_timeout
     raise CommunicationError, status if status != :status_ok
 
-    puts "Received Data: #{received_data.map{|x|x.to_s(16).rjust(2,'0').upcase}}" if ENV['DEBUG']
-
-    # Data exists, check CRC and return
-    if received_data.size > 1
-      raise IncorrectCRCError unless check_crc(received_data)
+    puts "Received Data: #{received_data.to_bytehex}" if ENV['DEBUG']
+    puts "Valid bits: #{valid_bits}" if ENV['DEBUG']
 
-      return received_data[0..-3]
+    # Data exists, check CRC
+    if received_data.size > 2 && @built_in_crc_disabled
+      raise IncorrectCRCError unless received_data.check_crc16(true)
     end
 
-    raise UnexpectedDataError, 'Incorrect Mifare ACK format' if received_data.size != 1 || valid_bits != 4 # ACK is 4 bits long
-    raise MifareNakError, received_data[0] if received_data[0] != PICC_MF_ACK
-
-    received_data
+    return received_data, valid_bits
   end
 
-  private
-
   # Read from SPI communication
   def read_spi(reg)
-    output = 0
-    PiPiper::Spi.begin do |spi|
-      spi.chip_select_active_low(true)
-      spi.bit_order Spi::MSBFIRST
-      spi.clock @spi_spd
-
-      spi.chip_select(@spi_chip) do
-        spi.write((reg << 1) & 0x7E | 0x80)
-        output = spi.read
-      end
-    end
-    output
+    read_spi_bulk(reg).first
+  end
+
+  def read_spi_bulk(*regs)
+    regs.flatten!
+
+    payload = regs.map{ |reg| ((reg & 0x3F) << 1) | 0x80 }
+    payload << 0x00
+
+    result = @spi_driver.transfer(payload, @spi_speed, @spi_delay)
+
+    # discard first byte
+    result.shift
+
+    result
   end
 
   # Write to SPI communication
   def write_spi(reg, values)
-    PiPiper::Spi.begin do |spi|
-      spi.chip_select_active_low(true)
-      spi.bit_order Spi::MSBFIRST
-      spi.clock @spi_spd
+    spi_addr = (reg & 0x3F) << 1
+    payload = [spi_addr, *values]
 
-      spi.chip_select(@spi_chip) do
-        spi.write((reg << 1) & 0x7E, *values)
-      end
-    end
+    @spi_driver.transfer(payload, @spi_speed, @spi_delay)
+
+    true
   end
 
   # Set bits by mask
@@ -510,15 +496,16 @@ class MFRC522
 
     # Check for error
     error = read_spi(ErrorReg)
-    return :status_error if (error & 0x13) != 0 # BufferOvfl ParityErr ProtocolErr
+    return :status_buffer_overflow if (error & 0x10) != 0
+    return :status_crc_error if (error & 0x04) != 0
+    return :status_parity_error if (error & 0x02) != 0
+    return :status_protocol_error if (error & 0x01) != 0
 
     # Receiving data
     received_data = []
     data_length = read_spi(FIFOLevelReg)
-    while data_length > 0 do
-      data = read_spi(FIFODataReg)
-      received_data << data
-      data_length -=1
+    if data_length > 0
+      received_data = read_spi_bulk(Array.new(data_length, FIFODataReg))
     end
     valid_bits = read_spi(ControlReg) & 0x07
 
@@ -527,39 +514,4 @@ class MFRC522
 
     return status, received_data, valid_bits
   end
-
-  def calculate_crc(data)
-    write_spi(CommandReg, PCD_Idle)               # Stop any active command.
-    write_spi(DivIrqReg, 0x04)                    # Clear the CRCIRq interrupt request bit
-    write_spi_set_bitmask(FIFOLevelReg, 0x80)     # FlushBuffer = 1, FIFO initialization
-    write_spi(FIFODataReg, data)                  # Write data to the FIFO
-    write_spi(CommandReg, PCD_CalcCRC)            # Start the calculation
-
-    # Wait for the command to complete
-    i = 5000
-    loop do
-      irq = read_spi(DivIrqReg)
-      break if (irq & 0x04) != 0
-      raise PCDTimeoutError, 'Error calculating CRC' if i == 0
-      i -= 1
-    end
-
-    write_spi(CommandReg, PCD_Idle)               # Stop calculating CRC for new content in the FIFO.
-
-    [read_spi(CRCResultRegL), read_spi(CRCResultRegH)]
-  end
-
-  def append_crc(data)
-    data + calculate_crc(data)
-  end
-
-  def check_crc(data)
-    raise UnexpectedDataError, 'Data too short for CRC check' if data.size < 3
-
-    data = data.dup
-    crc = data.pop(2)
-
-    crc == calculate_crc(data)
-  end
-
 end