logicuit 0.3.0 → 0.3.1

checksums.yaml

@@ -1,7 +1,7 @@
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data/.rubocop.yml

@@ -31,6 +31,4 @@ Metrics:
 
 plugins:
   - rubocop-minitest
-
-require:
   - rubocop-rake

data/README.md

@@ -1,9 +1,50 @@
 # Logicuit
 
+```
+                *******       *******       *******
+               *********     *********     *********
+              ***********   ***********   ***********
+               *********     *********     *********
+                *******       *******       *******
+
++-----------------------------------------------+       OUT 0111
+|                                               |       ADD A,0001
++--->|rg_a|(0111)----->|   |                    |       JNC 0001
+|    |1000|            |   |                    |       ADD A,0001
+|                      |   |                    |     > JNC 0011
++--->|rg_b|(0000)----->|   |----------->|   |---+       OUT 0110
+|    |0000|            |   |            |   |           ADD A,0001
+|                      |SEL|            |ALU|           JNC 0110
++--->| out|  |  in|--->|   |            |   |           ADD A,0001
+|    |0111|  |0000|    |   |  |  im|--->|   |--(0)      JNC 1000
+|                      |   |  |0011|                    OUT 0000
++--->|  pc|  (0000)--->|   |                            OUT 0100
+     |0100|                                             ADD A,0001
+                                                        JNC 1010
+                                                        OUT 1000
+                                                        JMP 1111
+
+tick: 48
+input: in0,in1,in2,in3?
+```
+
 From logic circuit to Logicuit — a playful portmanteau.
 
 A Ruby-based logic circuit simulator featuring an internal DSL for building circuits.
 
+## Table of Contents
+
+- [Installation](#installation)
+- [DSL](#dsl)
+- [Interactive Execution](#interactive-execution)
+- [Assembling](#assembling)
+- [SignalGroup](#signalgroup)
+- [Sequential Circuits](#sequential-circuits)
+- [Demo: Ramen Timer](#demo-ramen-timer)
+- [Development](#development)
+- [Contributing](#contributing)
+- [License](#license)
+
 ## Installation
 
 Install the gem and add to the application's Gemfile by executing:
@@ -25,7 +66,7 @@ You can define inputs, outputs, and even a visual diagram — all within a Ruby
 
 Here is an example of a simple 2-input AND gate:
 
-```
+```ruby
 require "logicuit"
 
 class MyAndGate < Logicuit::DSL
@@ -77,7 +118,7 @@ This approach gives you more control and expressiveness when building complex ci
 
 Here's an example of a 2-to-1 multiplexer:
 
-```
+```ruby
 require "logicuit"
 
 class MyMultiplexer < Logicuit::DSL
@@ -125,7 +166,7 @@ This allows the code to resemble the actual structure of the circuit, making it
 
 For example:
 
-```
+```ruby
 a >> not_gate.a
 not_gate.y >> and_gate1.b
 ```
@@ -156,14 +197,14 @@ Logicuit provides a convenient way to express these kinds of connections using s
 
 These two lines:
 
-```
+```ruby
 a >> xor_gate.a
 a >> and_gate.a
 ```
 
 can be written more concisely as:
 
-```
+```ruby
 a >> [xor_gate.a, and_gate.a]
 ```
 
@@ -173,7 +214,7 @@ The array on the right-hand side is treated as a signal group, and the connectio
 
 You can also connect multiple outputs to multiple inputs at once by using the [] method to access signals by name:
 
-```
+```ruby
 pc.qa >> rom.a0
 pc.qb >> rom.a1
 pc.qc >> rom.a2
@@ -182,7 +223,7 @@ pc.qd >> rom.a3
 
 is equivalent to:
 
-```
+```ruby
 pc[:qa, :qb, :qc, :qd] >> rom[:a0, :a1, :a2, :a3]
 ```
 
@@ -196,7 +237,7 @@ What if you want to connect signals from multiple different components as a sing
 
 You can use `Logicuit::ArrayAsSignalGroup`, which adds signal group behavior to arrays:
 
-```
+```ruby
 using Logicuit::ArrayAsSignalGroup
 
 assembling do
@@ -212,7 +253,7 @@ In addition to combinational circuits, Logicuit also supports sequential circuit
 
 For example, here’s a D flip-flop:
 
-```
+```ruby
 require "logicuit"
 
 class MyDFlipFlop < Logicuit::DSL
@@ -261,7 +302,7 @@ The number of elapsed ticks is shown as `tick: N`.
 
 By default, the clock ticks at 1 Hz (once per second). You can change the frequency by passing the `hz:` option to `run`:
 
-```
+```ruby
 MyDFlipFlop.run(hz: 10)
 ```
 
@@ -271,7 +312,7 @@ If you want full control, you can set `hz: 0` to disable automatic ticking.
 
 In this mode, the clock only ticks when you press Enter, allowing you to step through the simulation manually:
 
-```
+```ruby
 MyDFlipFlop.run(hz: 0)
 ```
 
@@ -283,7 +324,7 @@ You can build sequential circuits out of smaller components using the `assemblin
 
 Here’s an example of a 4-bit register that stores its input when the load signal `ld` is not active:
 
-```
+```ruby
 require "logicuit"
 
 class MyRegister4bit < Logicuit::DSL
@@ -336,12 +377,26 @@ If your circuit contains one or more sequential components (such as D flip-flops
 
 The clock signal is automatically connected to all internal sequential components. You don't need to wire it manually — just declare it at the top level:
 
-```
+```ruby
 inputs ..., clock: :ck
 ```
 
 > Note: If you forget to declare a clock input, Logicuit won't know it's a sequential circuit — even if you include flip-flops internally. Always include `clock:` to enable timing.
 
+### Demo: Ramen Timer
+
+Logicuit comes with a simple demo circuit — a working 4-bit CPU based on the TD4 architecture described in the book [CPUの創りかた](https://www.amazon.co.jp/dp/4839909865).
+
+You can try it out by running:
+
+```
+ruby -r logicuit -e 'Logicuit::Circuits::Td4::Cpu.run'
+```
+
+This launches a fully functional CPU simulation that counts down from a programmed value — perfect for timing your instant ramen 🍜
+
+The TD4 CPU is built entirely from logic gates and flip-flops, assembled using Logicuit’s DSL. It’s a great demonstration of how small components can be combined to create a complete digital system.
+
 ## Development
 
 After checking out the repo, run `bin/setup` to install dependencies. Then, run `rake test` to run the tests. You can also run `bin/console` for an interactive prompt that will allow you to experiment.

data/lib/logicuit/circuits/td4/rom.rb

@@ -12,7 +12,7 @@ module Logicuit
         def evaluate
           return unless initialized
 
-          output = case "#{a3}#{a2}#{a1}#{a0}"
+          output = case self[:a3, :a2, :a1, :a0].to_s
                    in "0000" then "10110111"
                    in "0001" then "00000001"
                    in "0010" then "11100001"
@@ -30,9 +30,7 @@ module Logicuit
                    in "1110" then "10111000"
                    in "1111" then "11111111"
                    end
-          output.split("").zip([d7, d6, d5, d4, d3, d2, d1, d0]).each do |v, o|
-            v == "1" ? o.on : o.off
-          end
+          self[:d7, :d6, :d5, :d4, :d3, :d2, :d1, :d0].set output
         end
 
         truth_table <<~TRUTH_TABLE

data/lib/logicuit/dsl.rb

@@ -91,7 +91,7 @@ module Logicuit
     def self.assembling(&block)
       define_method(:assembling) do
         ret = instance_eval(&block)
-        ret.each { @components << it } if ret.is_a?(Array)
+        ret.each { @components << _1 } if ret.is_a?(Array)
       end
     end
 
@@ -132,8 +132,8 @@ module Logicuit
           headers.size == values.size
         end.map do |values|
           array = [values]
-          while array.any? { it.any? { |v| v == :any } }
-            target_index = array.find_index { it.any? { |v| v == :any } }
+          while array.any? { _1.any? { |v| v == :any } }
+            target_index = array.find_index { _1.any? { |v| v == :any } }
             target = array[target_index]
             prop_index = target.find_index { |v| v == :any }
             array.delete_at(target_index)
@@ -151,6 +151,31 @@ module Logicuit
       end
     end
 
+    def self.verify_against_truth_table
+      new.truth_table.each do |row|
+        args = row.values_at(*new.input_targets).map { _1 ? 1 : 0 }
+        subject = new(*args)
+
+        previous_values = row.reject do |_k, v|
+          v == :clock
+        end.keys.reduce({}) { |acc, key| acc.merge(key => subject.send(key).current) }
+
+        Signals::Clock.tick if row.values.find :clock
+
+        row.each do |key, value|
+          next if value == :clock
+
+          if value.is_a?(Array) && value.first == :ref
+            expected = previous_values[value.last]
+
+            raise "#{self}.new(#{args.join(", ")}).#{key} should be #{expected}" unless expected == subject.send(key).current
+          else
+            raise "#{self}.new(#{args.join(", ")}).#{key} should be #{value}" unless value == subject.send(key).current
+          end
+        end
+      end
+    end
+
     def self.run(opts = {})
       ::Logicuit.run(new, **opts)
     end

data/lib/logicuit/signals/signal_group.rb

@@ -19,7 +19,13 @@ module Logicuit
       alias >> connects_to
 
       def to_s
-        signals.map { it.current ? "1" : "0" }.join
+        signals.map { _1.current ? "1" : "0" }.join
+      end
+
+      def set(vals)
+        vals.split("").zip(signals).each do |v, o|
+          v == "1" ? o.on : o.off
+        end
       end
     end
   end

data/lib/logicuit/version.rb

@@ -1,5 +1,5 @@
 # frozen_string_literal: true
 
 module Logicuit
-  VERSION = "0.3.0"
+  VERSION = "0.3.1"
 end

metadata

@@ -1,13 +1,13 @@
 --- !ruby/object:Gem::Specification
 name: logicuit
 version: !ruby/object:Gem::Version
-  version: 0.3.0
+  version: 0.3.1
 platform: ruby
 authors:
 - Koji NAKAMURA
 bindir: exe
 cert_chain: []
-date: 2025-04-19 00:00:00.000000000 Z
+date: 1980-01-02 00:00:00.000000000 Z
 dependencies: []
 description: logi(c cir)cuit -> logicuit
 email:
@@ -68,7 +68,7 @@ required_rubygems_version: !ruby/object:Gem::Requirement
     - !ruby/object:Gem::Version
       version: '0'
 requirements: []
-rubygems_version: 3.6.5
+rubygems_version: 3.6.7
 specification_version: 4
 summary: logi(c cir)cuit -> logicuit
 test_files: []