libfst 0.1.0

data/samples/transaction_filter_process/sdcard.rb

@@ -0,0 +1,793 @@
+#!/usr/bin/env ruby
+
+# Copyright (C) 2024 Théotime Bollengier <theotime.bollengier@ensta-bretagne.fr>
+#
+# This file is part of libfst.rb <https://gitlab.ensta-bretagne.fr/bollenth/libfst.rb>
+#
+# libfst.rb is free software: you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published
+# by the Free Software Foundation, either version 3 of the License,
+# or (at your option) any later version.
+#
+# libfst.rb is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+# See the GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with libfst.rb. If not, see <https://www.gnu.org/licenses/>. 
+
+require_relative '../../lib/libfst'
+require 'colorize'
+
+class SDCardDecoder < GTKWave::TransactionFilter
+  CMDS = [
+    # name, response, abbrev, argument
+    ['CMD0',  nil,  'GO_IDLE_STATE'],
+    ['CMD1',  nil,  'RESERVED'],
+    ['CMD2',  :R2,  'ALL_SEND_CID'],
+    ['CMD3',  :R6,  'SEND_RELATIVE_ADDR'],
+    ['CMD4',  nil,  'SET_DSR',              { (16..31) => 'DSR' }],
+    ['CMD5',  nil,  'RESERVED'],
+    ['CMD6',  :R1,  'SWITCH_FUNCTION',      { (0..3) => 'fg1am', (4..7) => 'fg2cs', (8..11) => 'fg3ds', (12..15) => 'fg4pl', (31..31) => 'check or switch function' }],
+    ['CMD7',  :R1b, 'SELECT/DESELECT_CARD', { (16..31) => 'RCA' }],
+    ['CMD8',  :R7,  'SEND_IF_COND',         { (0..7) => 'check pattern', (8..11) => 'supply voltage (VHS)' }],
+    ['CMD9',  :R2,  'SEND_CSD',             { (16..31) => 'RCA' }],
+    ['CMD10', :R2,  'SEND_CID',             { (16..31) => 'RCA' }],
+    ['CMD11', :R1,  'VOLTAGE_SWITCH'],
+    ['CMD12', :R1b, 'STOP_TRANSMISSION'],
+    ['CMD13', :R1,  'SEND_STATUS',          { (16..31) => 'RCA' }],
+    ['CMD14', nil,  'RESERVED'],
+    ['CMD15', nil,  'GO_INACTIVE_STATE',    { (16..31) => 'RCA' }],
+    ['CMD16', :R1,  'SET_BLOCKLEN',         { (0..31) => 'block length' }],
+    ['CMD17', :R1,  'READ_SINGLE_BLOCK',    { (0..31) => 'data address' }],
+    ['CMD18', :R1,  'READ_MULTIPLE_BLOCK',  { (0..31) => 'data address' }],
+    ['CMD19', :R1,  'SEND_TUNING_BLOCK'],
+    ['CMD20', :R1b, 'SPEED_CLASS_CONTROL',  { (0..27) => 'speed class', (28..31) => 'speed class control' }],
+    ['CMD21'],
+    ['CMD22', :R1,  'ADDRESS_EXTENSION',    { (0..5) => 'extended address' }],
+    ['CMD23', :R1,  'SET_BLOCK_COUNT',      { (0..31) => 'block count' }],
+    ['CMD24', :R1,  'WRITE_BLOCK',          { (0..31) => 'data address' }],
+    ['CMD25', :R1,  'WRITE_MULTIPLE_BLOCK', { (0..31) => 'data address' }],
+    ['CMD26', nil,  'RESERVED'],
+    ['CMD27', :R1,  'PROGRAM_CSD'],
+    ['CMD28', :R1b, 'SET_WRITE_PROT',       { (0..31) => 'data address' }],
+    ['CMD29', :R1b, 'CLR_WRITE_PROT',       { (0..31) => 'data address' }],
+    ['CMD30', :R1,  'SEND_WRITE_PROT',      { (0..31) => 'write protect data address' }],
+    ['CMD31', nil,  'RESERVED'],
+    ['CMD32', :R1,  'ERASE_WR_BLK_START',   { (0..31) => 'data address' }],
+    ['CMD33', :R1,  'ERASE_WR_BLK_END',     { (0..31) => 'data address' }],
+    ['CMD34'],
+    ['CMD35'],
+    ['CMD36'],
+    ['CMD37'],
+    ['CMD38', :R1b, 'ERASE',                { (0..31) => 'erase function' }],
+    ['CMD39', :R1b, 'SELECT_CARD_PARTITION', { (24..31) => 'partition ID' }],
+    ['CMD40', :R1,  'def_by_dps_spec',      { (0..31) => 'def by DPS spec' }],
+    ['CMD41', :R3,  'RESERVED'],
+    ['CMD42', :R1,  'LOCK_UNLOCK',          { (0..31) => 'def by DPS spec' }],
+    ['CMD43', :R1b, 'Q_MANAGEMENT',         { (0..3) => 'opcode', (16..20) => 'task ID' }],
+    ['CMD44', :R1,  'Q_TASK_INFO_A',        { (0..15) => 'number of blocks', (16..20) => 'task ID', (23..23) => 'priority', (24..29) => 'extended address', (30..30) => 'direction' }],
+    ['CMD45', :R1,  'Q_TASK_INFO_B',        { (0..31) => 'start block address' }],
+    ['CMD46', :R1,  'Q_RD_TASK',            { (16..20) => 'task ID' }],
+    ['CMD47', :R1,  'Q_WR_TASK',            { (16..20) => 'task ID' }],
+    ['CMD48', :R1,  'READ_EXTR_SINGLE',     { (0..8) => 'LEN', (9..25) => 'ADDR', (27..30) => 'FNO', (31..31) => 'memory or IO' }],
+    ['CMD49', :R1,  'WRITE_EXTR_SINGLE',    { (0..8) => 'LEN/MASK', (9..25) => 'ADDR', (27..30) => 'FNO', (31..31) => 'memory or IO' }],
+    ['CMD50'],
+    ['CMD51', nil, 'RESERVED'],
+    ['CMD52'],
+    ['CMD53'],
+    ['CMD54'],
+    ['CMD55', :R1,  'APP_CMD',               { (16..31) => 'RCA' }], # next command is a ACMD
+    ['CMD56', :R1,  'GEN_CMD',               { (0..0) => 'RD/WR' }],
+    ['CMD57'],
+    ['CMD58', :R1,  'READ_EXTR_MULTI',       { (0..8) => 'BUC', (9..25) => 'ADDR', (26..26) => 'BUS', (27..30) => 'FNO', (31..31) => 'memory or IO' }],
+    ['CMD59', :R1,  'WRITE_EXTR_MULTI',      { (0..8) => 'BUC', (9..25) => 'ADDR', (26..26) => 'BUS', (27..30) => 'FNO', (31..31) => 'memory or IO' }],
+    ['CMD60'],
+    ['CMD61'],
+    ['CMD62'],
+    ['CMD63']
+  ].freeze
+
+  ACMDS = [
+    ['ACMD0'],
+    ['ACMD1',  nil,  'RESERVED'],
+    ['ACMD2',  nil,  'RESERVED'],
+    ['ACMD3',  nil,  'RESERVED'],
+    ['ACMD4',  nil,  'RESERVED'],
+    ['ACMD5',  nil,  'RESERVED'],
+    ['ACMD6',  :R1,  'SET_BUS_WIDTH', { (0..1) => 'bus width' }],
+    ['ACMD7',  nil,  'RESERVED'],
+    ['ACMD8',  nil,  'RESERVED'],
+    ['ACMD9',  nil,  'RESERVED'],
+    ['ACMD10', nil,  'RESERVED'],
+    ['ACMD11', nil,  'RESERVED'],
+    ['ACMD12', nil,  'RESERVED'],
+    ['ACMD13', :R1,  'SD_STATUS'],
+    ['ACMD14', nil,  'RESERVED'],
+    ['ACMD15', nil,  'RESERVED'],
+    ['ACMD16', nil,  'RESERVED'],
+    ['ACMD17', nil,  'RESERVED'],
+    ['ACMD18', nil,  'RESERVED'],
+    ['ACMD19', nil,  'RESERVED'],
+    ['ACMD20', nil,  'RESERVED'],
+    ['ACMD21', nil,  'RESERVED'],
+    ['ACMD22', :R1,  'SEND_NUM_WR_BLOCKS'],
+    ['ACMD23', :R1,  'SEND_WR_BLK_ERASE_COUNT', { (0..22) => 'number of blocks' }],
+    ['ACMD24', nil,  'RESERVED'],
+    ['ACMD25', nil,  'RESERVED'],
+    ['ACMD26', nil,  'RESERVED'],
+    ['ACMD27', nil,  'RESERVED'],
+    ['ACMD28', nil,  'RESERVED'],
+    ['ACMD29', nil,  'RESERVED'],
+    ['ACMD30', nil,  'RESERVED'],
+    ['ACMD31', nil,  'RESERVED'],
+    ['ACMD32', nil,  'RESERVED'],
+    ['ACMD33', nil,  'RESERVED'],
+    ['ACMD34', nil,  'RESERVED'],
+    ['ACMD35', nil,  'RESERVED'],
+    ['ACMD36', nil,  'RESERVED'],
+    ['ACMD37', nil,  'RESERVED'],
+    ['ACMD38', nil,  'RESERVED'],
+    ['ACMD39', nil,  'RESERVED'],
+    ['ACMD40', nil,  'RESERVED'],
+    ['ACMD41', :R3,  'SD_SEND_OP_COND', { (0..23) => 'VDD voltage window', (24..24) => 'S18R', (28..28) => 'XPC', (30..30) => 'HCS' }],
+    ['ACMD42', :R1,  'SET_CLR_CARD_DETECT', { (0..0) => 'set_cd' }],
+    ['ACMD43', nil,  'RESERVED'],
+    ['ACMD44', nil,  'RESERVED'],
+    ['ACMD45', nil,  'RESERVED'],
+    ['ACMD46', nil,  'RESERVED'],
+    ['ACMD47', nil,  'RESERVED'],
+    ['ACMD48', nil,  'RESERVED'],
+    ['ACMD49', nil,  'RESERVED'],
+    ['ACMD50'],
+    ['ACMD51', :R1,  'SEND_SCR'],
+    ['ACMD52', nil,  'RESERVED'],
+    ['ACMD53', :R1,  'SECURE_RECEIVE', { (0..7) => 'SSSF', (8..15) => 'SPSP0', (16..23) => 'SPSP1', (24..31) => 'Security protocol' }],
+    ['ACMD54', :R1,  'SECURE_SEND', { (0..7) => 'SSSF', (8..15) => 'SPSP0', (16..23) => 'SPSP1', (24..31) => 'Security protocol' }],
+    ['ACMD55', :R1,  'APP_CMD', { (16..31) => 'RCA' }],
+    ['ACMD56', nil,  'RESERVED'],
+    ['ACMD57', nil,  'RESERVED'],
+    ['ACMD58', nil,  'RESERVED'],
+    ['ACMD59', nil,  'RESERVED']
+  ].freeze
+
+
+  def initialize
+    super
+    puts ' SD Card Decoder '.center(80, '-')
+    puts "Name: #{@name.inspect}"
+    puts "#{@signames.length} signal#{@signames.length > 1 ? 's' : ''}: #{[@signames[0...-1].join(', '), @signames.last].reject(&:empty?).join(' and ')}"
+    raise "expecting two signals, not #{@ivcd.traces.length}" unless @ivcd.traces.length == 2
+
+    # Try to find the clk and cmd signals
+    @ivcd.traces.each_value do |t|
+      raise "expecting two signals of 1 bit, not #{t.width}-bit wide" unless t.width == 1
+      t.variables.each do |v|
+        if v.name =~ /cl(oc)?k/i then
+          raise 'CLK found twice' if @clk_trace
+          @clk_trace = t
+          break
+        elsif v.name =~ /co?m(man)?d/i then
+          raise 'CMD found twice' if @cmd_trace
+          @cmd_trace = t
+          break
+        end
+      end
+    end
+    raise 'Cannot find a clock signal' unless @clk_trace
+    raise 'Cannot find a command signal' unless @cmd_trace
+  end
+
+
+  def puts(*args)
+    $stderr.puts(*args)
+  end
+
+
+  def read
+    @cmd = 1
+    @clk = nil
+    @time = nil
+    @state = :wait_host_start_bit
+    @times = [0]
+    @phases = ['']
+    @values = ['']
+
+    @ivcd.read do |trace, value, time|
+      case trace
+      when @clk_trace
+        clock(value, time)
+      when @cmd_trace
+        @cmd = value.to_i
+      end
+    end
+  end
+
+
+  def write
+    $stdout.write "$name #{@name}\n"
+    $stdout.write "##{@min_time}\n"
+    @times.each_with_index do |t, i|
+      v = @values[i]
+      $stdout.write "##{t}#{v ? " #{v}" : ''}\n"
+    end
+    $stdout.write "$next\n"
+    $stdout.write "$name desc\n"
+    $stdout.write "##{@min_time}\n"
+    @times.each_with_index do |t, i|
+      p = @phases[i]
+      $stdout.write "##{t}#{p ? " #{p}" : ''}\n"
+    end
+    $stdout.write "$finish\n"
+    $stdout.flush
+    puts '-'*80
+  end
+
+
+  private
+
+
+  def clock(value, time)
+    value = value.to_i
+    if value == 1 and @clk == 0 then
+      rising_edge
+    elsif value == 0 and @clk == 1 then
+      falling_edge
+    end
+    @clk = value
+    @time = time
+  end
+
+=begin
+  def reset_read
+    @read_index = 0
+  end
+
+  def advance
+    @read_index += 1
+  end
+
+  def get_time
+    @times[@read_index]
+  end
+
+  def get_phase_and_value
+    [@phases[@read_index], @values[@read_index]]
+  end
+=end
+
+  def crc7(str)
+    crc = 0
+    str.each_byte do |b|
+      b = (b == 48 ? 0 : 1)
+      crc = (b ^ crc[6]) | ((crc[2] ^ (b ^ crc[6])) << 3) | ((crc << 1) & 0x76)
+    end
+    crc
+  end
+
+  def card_status_to_string(cs)
+    # page 147
+    a = []
+    a << 'OUT_OF_RANGE'       if cs[31] == 1
+    a << 'ADDRESS_ERROR'      if cs[30] == 1
+    a << 'BLOCL_LEN_ERROR'    if cs[29] == 1
+    a << 'ERASE_SEQ_ERROR'    if cs[28] == 1
+    a << 'ERASE_PARAM'        if cs[27] == 1
+    a << 'WP_VIOLATION'       if cs[26] == 1
+    a << 'CARD_IS_LOCKED'     if cs[25] == 1
+    a << 'LOCK_UNLOCK_FAILED' if cs[24] == 1
+    a << 'COM_CRC_ERROR'      if cs[23] == 1
+    a << 'ILLEGAL_COMMAND'    if cs[22] == 1
+    a << 'CARD_ECC_FAILED'    if cs[21] == 1
+    a << 'CC_ERROR'           if cs[20] == 1
+    a << 'ERROR'              if cs[19] == 1
+    a << 'CSD_OVERWRITE'      if cs[16] == 1
+    a << 'WP_ERASE_SKIP'      if cs[15] == 1
+    a << 'CARD_ECC_DISABLED'  if cs[14] == 1
+    a << 'ERASE_RESET'        if cs[13] == 1
+    a << %w[idle ready ident stby tran data rcv prg dis xxx xxx xxx xxx xxx xxx RES][(cs >> 9) & 0x0f]
+    a << 'READY_FOR_DATA'     if cs[8] == 1
+    a << 'FX_EVENT'           if cs[6] == 1
+    a << 'APP_CMD'            if cs[5] == 1
+    a << 'AKE_SEQ_ERROR'      if cs[3] == 1
+    a << 'reserved bits set'  if (cs & 0x00060097) != 0
+    a.join(', ')
+  end
+
+
+  def MID_to_string(mid)
+    name = {
+      0x01=>'Panasonic',
+      0x02=>'Toshiba',
+      0x03=>'SanDisk',
+      0x1b=>'Samsung',
+      0x1d=>'AData',
+      0x27=>'Phison',
+      0x28=>'Lexar',
+      0x31=>'Silicon Power',
+      0x41=>'Kingston',
+      0x74=>'Transcend',
+      0x76=>'Patriot',
+      0x82=>'Sony'
+    }[mid]
+    return '' unless name
+    " (#{name})"
+  end
+
+
+  def cid_to_s(cid)
+    # page 250
+    cid <<= 8
+    a = []
+    mid = (cid >> 120) & 0xff
+    a << "MID: 0x#{mid.to_s(16).rjust(2,'0')}#{MID_to_string(mid)}"
+    a << "OID: \"#{((cid >> 112) & 0xff).chr}#{((cid >> 104) & 0xff).chr}\""
+    pnm = 5.times.reverse_each.collect { |i| ((cid >> (64 + 8*i)) & 0xff).chr }.join
+    a << "PNM: \"#{pnm}\""
+    a << "PRV: \"#{(cid >> 60) & 0x0f}.#{(cid >> 56) & 0x0f}\""
+    a << "PSN: 0x#{((cid >> 24) & 0xffffffff).to_s(16).rjust(8, '0')}"
+    mdt = (cid >> 8) & 0xfff
+    a << "MDT: #{%w[January February March April May June July August September October November December][(mdt & 0xf) - 1]} #{(mdt >> 4) + 2000}"
+    a.join(', ')
+  end
+
+
+  def rising_edge
+    case @state
+    when :r1_start_bit
+      if @cmd == 0 then
+        @times << @time
+        @phases << '?violet?Start bit'
+        @values << '?violet?0'
+        @bits = @cmd.to_s
+        @state = :r1_transmission_bit
+      end
+    when :r1_transmission_bit
+      @times << @time
+      @phases << 'Transmission bit'
+      @values << @cmd.to_s
+      @cnt = 0
+      @r_cmd_index = 0
+      @bits += @cmd.to_s
+      @state = :r1_command_index
+      puts 'WARNING: bit is 1 at response transmission bit'.light_red.bold if @cmd == 1
+    when :r1_command_index
+      if @cnt == 0 then
+        @times << @time
+      end
+      @r_cmd_index = (@r_cmd_index << 1) | @cmd
+      @cnt += 1
+      if @cnt == 6 then
+        @phases << 'CMD index'
+        if @r_cmd_index == @cmd_index then
+          @values << "#{@r_cmd_index} (OK)"
+        else
+          @values << "#{@r_cmd_index} (Should be #{@cmd_index})"
+          puts "WARNING: R1 response to command #{@r_cmd_index} instead of #{@cmd_index}".light_red.bold
+        end
+        @cnt = 0
+        @card_status = 0
+        @state = :r1_status
+      end
+      @bits += @cmd.to_s
+    when :r1_status
+      if @cnt == 0 then
+        @times << @time
+        @phases << 'Card status'
+      end
+      @card_status = (@card_status << 1) | @cmd
+      @cnt += 1
+      if @cnt == 32 then
+        puts " R1: #{card_status_to_string(@card_status)}"
+        @values << card_status_to_string(@card_status)
+        @cnt = 0
+        @crc = 0
+        @state = :r_crc7
+      end
+      @bits += @cmd.to_s
+    when :r_crc7
+      if @cnt == 0 then
+        @times << @time
+        @phases << 'CRC7'
+      end
+      @crc = (@crc << 1) | @cmd
+      @cnt += 1
+      if @cnt == 7 then
+        if @crc == crc7(@bits) then
+          @values << "#{@crc} (OK)"
+        else
+          puts "WARNING: CRC7(#{@bits}) = #{crc7(@bits)}, got, #{@crc}".light_red.bold
+          @values << "#{@crc} (FAIL -> #{crc7(@bits)})"
+        end
+        @state = :r_end_bit
+      end
+    when :r_end_bit
+      @times << @time
+      @phases << 'E'
+      @values << @cmd.to_s
+      @state = :response_sent
+      puts 'WARNING: bit is 0 at end bit'.light_red.bold if @cmd == 0
+    when :response_sent
+      @times << @time
+      @phases << nil
+      @values << nil
+      @state = :wait_host_start_bit
+
+    ## R7 ##
+    when :r7_start_bit
+      if @cmd == 0 then
+        @times << @time
+        @phases << '?violet?Start bit'
+        @values << '?violet?0'
+        @bits = @cmd.to_s
+        @state = :r7_transmission_bit
+      end
+    when :r7_transmission_bit
+      @times << @time
+      @phases << 'Transmission bit'
+      @values << @cmd.to_s
+      @cnt = 0
+      @r_cmd_index = 0
+      @bits += @cmd.to_s
+      @state = :r7_command_index
+      puts 'WARNING: bit is 1 at response transmission bit'.light_red.bold if @cmd == 1
+    when :r7_command_index
+      if @cnt == 0 then
+        @times << @time
+      end
+      @r_cmd_index = (@r_cmd_index << 1) | @cmd
+      @cnt += 1
+      if @cnt == 6 then
+        @phases << 'CMD index'
+        if @r_cmd_index == @cmd_index then
+          @values << "#{@r_cmd_index} (OK)"
+        else
+          @values << "#{@r_cmd_index} (Should be #{@cmd_index})"
+          puts "WARNING: R7 response to command #{@r_cmd_index} instead of #{@cmd_index}".light_red.bold
+        end
+        @cnt = 0
+        @tmp = 0
+        @state = :r7_reserved
+      end
+      @bits += @cmd.to_s
+    when :r7_reserved
+      if @cnt == 0 then
+        @times << @time
+        @phases << 'Reserved'
+      end
+      @tmp = (@tmp << 1) | @cmd
+      @cnt += 1
+      if @cnt == 18 then
+        @values << "0x#{@tmp.to_s(16).rjust(5, '0')}"
+        @cnt = 0
+        @tmp = 0
+        @state = :r7_status
+      end
+      @bits += @cmd.to_s
+    when :r7_status
+      if @cnt == 0 then
+        @times << @time
+        @phases << 'Status'
+      end
+      @tmp = (@tmp << 1) | @cmd
+      @cnt += 1
+      if @cnt == 14 then
+        str  = "PCIe 1.2v: #{@tmp[13] == 1 ? 'Y' : 'N'}"
+        str += ", PCIe: #{@tmp[12] == 1 ? 'Y' : 'N'}"
+        str += ", Voltage accepted: #{{0=>'Not defined', 1=>'2.7-3.6V', 2=>'Res for LV range', 4=>'Res', 8=>'Res'}.fetch((@tmp >> 8) & 0x0f, 'Not defined')}"
+        str += ", Check pattern: #{@tmp & 0xff}"
+        puts " R7: #{str}"
+        @values << str
+        @cnt = 0
+        @crc = 0
+        @state = :r7_crc7
+      end
+      @bits += @cmd.to_s
+    when :r7_crc7
+      if @cnt == 0 then
+        @times << @time
+        @phases << 'CRC7'
+      end
+      @crc = (@crc << 1) | @cmd
+      @cnt += 1
+      if @cnt == 7 then
+        if @crc == crc7(@bits) then
+          @values << "#{@crc} (OK)"
+        else
+          puts "WARNING: CRC7(#{@bits}) = #{crc7(@bits)}, got, #{@crc}".light_red.bold
+          @values << "#{@crc} (FAIL -> #{crc7(@bits)})"
+        end
+        @state = :r_end_bit
+      end
+
+    ## R3 ##
+    when :r3_start_bit
+      if @cmd == 0 then
+        @times << @time
+        @phases << '?violet?Start bit'
+        @values << '?violet?0'
+        @bits = @cmd.to_s
+        @state = :r3_transmission_bit
+      end
+    when :r3_transmission_bit
+      @times << @time
+      @phases << 'Transmission bit'
+      @values << @cmd.to_s
+      @cnt = 0
+      @r_cmd_index = 0
+      @bits += @cmd.to_s
+      @state = :r3_command_index
+      puts 'WARNING: bit is 1 at response transmission bit'.light_red.bold if @cmd == 1
+    when :r3_command_index
+      if @cnt == 0 then
+        @times << @time
+      end
+      @r_cmd_index = (@r_cmd_index << 1) | @cmd
+      @cnt += 1
+      if @cnt == 6 then
+        @phases << 'Reserved'
+        @values << "0b#{@r_cmd_index.to_s(2).rjust(6,'0')}#{@r_cmd_index == 0b111111 ? '' : ' (ERROR)'}"
+        puts "WARNING: R3 reserved zone should be 0b111111 instead of 0b#{@r_cmd_index.to_s(2).rjust(6,'0')}".light_red.bold unless @r_cmd_index == 0b111111
+        @cnt = 0
+        @tmp = 0
+        @state = :r3_OCR
+      end
+      @bits += @cmd.to_s
+    when :r3_OCR
+      if @cnt == 0 then
+        @times << @time
+        @phases << 'OCR'
+      end
+      @tmp = (@tmp << 1) | @cmd
+      @cnt += 1
+      if @cnt == 32 then
+        puts " R3: OCR = 0x#{@tmp.to_s(16).rjust(8, '0')}"
+        @values << "OCR = 0x#{@tmp.to_s(16).rjust(8, '0')}"
+        @cnt = 0
+        @crc = 0
+        @state = :r3_crc7
+      end
+      @bits += @cmd.to_s
+    when :r3_crc7
+      if @cnt == 0 then
+        @times << @time
+        @phases << 'Reserved'
+      end
+      @crc = (@crc << 1) | @cmd
+      @cnt += 1
+      if @cnt == 7 then
+        @values << "0b#{@crc.to_s(2).rjust(7, '0')}"
+        puts "WARNING: R3 reserved zone should be 0b1111111 instead of 0b#{@crc.to_s(2).rjust(7,'0')}".light_red.bold unless @crc == 0b1111111
+        @state = :r_end_bit
+      end
+
+    ## R2 ##
+    when :r2_start_bit
+      if @cmd == 0 then
+        @times << @time
+        @phases << '?violet?Start bit'
+        @values << '?violet?0'
+        @state = :r2_transmission_bit
+      end
+    when :r2_transmission_bit
+      @times << @time
+      @phases << 'Transmission bit'
+      @values << @cmd.to_s
+      @cnt = 0
+      @r_cmd_index = 0
+      @state = :r2_command_index
+      puts 'WARNING: bit is 1 at response transmission bit'.light_red.bold if @cmd == 1
+    when :r2_command_index
+      if @cnt == 0 then
+        @times << @time
+      end
+      @r_cmd_index = (@r_cmd_index << 1) | @cmd
+      @cnt += 1
+      if @cnt == 6 then
+        @phases << 'Reserved'
+        @values << "0b#{@r_cmd_index.to_s(2).rjust(6,'0')}#{@r_cmd_index == 0b111111 ? '' : ' (ERROR)'}"
+        puts "WARNING: R2 reserved zone should be 0b111111 instead of 0b#{@r_cmd_index.to_s(2).rjust(6,'0')}".light_red.bold unless @r_cmd_index == 0b111111
+        @cnt = 0
+        @tmp = 0
+        @bits = ''
+        @state = :r2_CID_CSD
+      end
+    when :r2_CID_CSD
+      if @cnt == 0 then
+        @times << @time
+        @phases << (@cmd_index == 2 || @cmd_index == 10 ? 'CID' : 'CSD')
+      end
+      @tmp = (@tmp << 1) | @cmd
+      @cnt += 1
+      if @cnt == 120 then
+        if @cmd_index == 2 || @cmd_index == 10 then
+          puts " R2: CID = #{cid_to_s(@tmp)}"
+          @values << "CID = #{cid_to_s(@tmp)}"
+        else
+          puts " R2: CSD = 0x#{@tmp.to_s(16).rjust(30, '0')}"
+          @values << "CSD = 0x#{@tmp.to_s(16).rjust(30, '0')}"
+        end
+        @cnt = 0
+        @crc = 0
+        @state = :r_crc7
+      end
+      @bits += @cmd.to_s
+
+    ## R6 ##
+    when :r6_start_bit
+      if @cmd == 0 then
+        @times << @time
+        @phases << '?violet?Start bit'
+        @values << '?violet?0'
+        @bits = @cmd.to_s
+        @state = :r6_transmission_bit
+      end
+    when :r6_transmission_bit
+      @times << @time
+      @phases << 'Transmission bit'
+      @values << @cmd.to_s
+      @cnt = 0
+      @r_cmd_index = 0
+      @bits += @cmd.to_s
+      @state = :r6_command_index
+      puts 'WARNING: bit is 1 at response transmission bit'.light_red.bold if @cmd == 1
+    when :r6_command_index
+      if @cnt == 0 then
+        @times << @time
+      end
+      @r_cmd_index = (@r_cmd_index << 1) | @cmd
+      @cnt += 1
+      if @cnt == 6 then
+        @phases << 'CMD index'
+        if @r_cmd_index == @cmd_index then
+          @values << "#{@r_cmd_index} (OK)"
+        else
+          @values << "#{@r_cmd_index} (Should be #{@cmd_index})"
+          puts "WARNING: R1 response to command #{@r_cmd_index} instead of #{@cmd_index}".light_red.bold
+        end
+        @cnt = 0
+        @tmp = 0
+        @state = :r6_status
+      end
+      @bits += @cmd.to_s
+    when :r6_status
+      if @cnt == 0 then
+        @times << @time
+        @phases << 'Card status'
+      end
+      @tmp = (@tmp << 1) | @cmd
+      @cnt += 1
+      if @cnt == 32 then
+        cs = (@tmp & 0x1fff) | ((@tmp & 0x2000) << 6) | ((@tmp & 0x4000) << 8) | ((@tmp & 0x8000) << 8)
+        str = "RCA: #{(@tmp >> 16) & 0xffff}"
+        puts " R6: #{str}"
+        @values << str
+        @cnt = 0
+        @crc = 0
+        @state = :r_crc7
+      end
+      @bits += @cmd.to_s
+    end
+  end
+
+
+  def falling_edge
+    case @state
+    when :wait_host_start_bit
+      if @cmd == 0 then
+        @times << @time
+        @phases << '?green?Start bit'
+        @values << '?green?0'
+        @bits = @cmd.to_s
+        @state = :host_transmission_bit
+      end
+    when :host_transmission_bit
+      @times << @time
+      @phases << 'Transmission bit'
+      @values << @cmd.to_s
+      @cnt = 0
+      @cmd_index = 0
+      @bits += @cmd.to_s
+      @state = :host_command_index
+      puts 'WARNING: bit is 0 at host transmission bit'.light_red.bold if @cmd == 0
+    when :host_command_index
+      if @cnt == 0 then
+        @times << @time
+      end
+      @cmd_index = (@cmd_index << 1) | @cmd
+      @cnt += 1
+      if @cnt == 6 then
+        if @last_cmd_is_cmd_app then
+          @command = ACMDS[@cmd_index]
+        else
+          @command = CMDS[@cmd_index]
+        end
+        @last_cmd_is_cmd_app = (@cmd_index == 55)
+        @phases << @command[0]
+        @values << @command[2]
+        $stderr.write @command[2] ? @command[2].light_green.bold : @command[0].light_yellow.bold
+        @cnt = 0
+        @argument = 0
+        @state = :host_argument
+      end
+      @bits += @cmd.to_s
+    when :host_argument
+      if @cnt == 0 then
+        @times << @time
+        @phases << 'Argument'
+      end
+      @argument = (@argument << 1) | @cmd
+      @cnt += 1
+      if @cnt == 32 then
+        if @command[3].nil? then
+          @values << "0x#{@argument.to_s(16).rjust(8, '0')}" 
+          puts
+        else
+          str = @command[3].collect{|range, name|
+            b = range.begin
+            e = range.end
+            e += 1 unless range.exclude_end?
+            l = e - b
+            v = (@argument >> b) & ((1 << l) - 1)
+            "#{name} = #{v}"
+          }.join(', ')
+          @values << str
+          puts ' ' + str
+        end
+        @cnt = 0
+        @crc = 0
+        @state = :host_crc7
+      end
+      @bits += @cmd.to_s
+    when :host_crc7
+      if @cnt == 0 then
+        @times << @time
+        @phases << 'CRC7'
+      end
+      @crc = (@crc << 1) | @cmd
+      @cnt += 1
+      if @cnt == 7 then
+        if @crc == crc7(@bits) then
+          @values << "#{@crc} (OK)"
+        else
+          puts "WARNING: CRC7(#{@bits}) = #{crc7(@bits)}, got, #{@crc}".light_red.bold
+          @values << "#{@crc} (FAIL -> #{crc7(@bits)})"
+        end
+        @state = :host_end_bit
+      end
+    when :host_end_bit
+      @times << @time
+      @phases << 'End bit'
+      @values << @cmd.to_s
+      @state = :command_send
+      puts 'WARNING: bit is 0 at end bit'.light_red.bold if @cmd == 0
+    when :command_send
+      @times << @time
+      @phases << nil
+      @values << nil
+      @state = case @command[1]
+               when :R1, :R1b
+                 :r1_start_bit
+               when :R2
+                 :r2_start_bit
+               when :R3
+                 :r3_start_bit
+               when :R6
+                 :r6_start_bit
+               when :R7
+                 :r7_start_bit
+               when nil
+                 :wait_host_start_bit
+               else
+                 puts "Stopping because expecting unsupported #{@command[1]} response".light_yellow.bold
+                 :wait
+               end
+    end
+  end
+
+end
+
+
+SDCardDecoder.run
+