kompiler 0.2.0.pre.1 → 0.2.0

checksums.yaml

@@ -1,7 +1,7 @@
 ---
 SHA256:
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-  data.tar.gz: 63a7973c95797b77119b47f24b8aa5bda591d7d2a4e5cbd5e34485fb11aea9b7
+  metadata.gz: fc460a4bb7ead297f0fe530c19304038f4d3980103cde260df057c52b35cfeeb
+  data.tar.gz: 57ea6ace09f3b1a5c3d0914d9edbbd02a83a5002b5c55ecde398f593cdcbb211
 SHA512:
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+  data.tar.gz: 4c001f5a2c64e4a26752c98a116ff85138733662fe376e4b470352731cee721688bd194760f89e949552cf59e3824ef7b2ac607f6ab696732d783dff1b779cf6

data/lib/kompiler/architectures/armv8a/instructions.rb

@@ -103,18 +103,21 @@ end
 	},
 	
 	{
-		keyword: "and", # And between registers, with shift set to zero
-		name: "And",
-		description: "Computes a logical bit-wise AND operation between two registers and writes the result to the destination register.",
-		operands: [{type: "register", restrictions: {reg_size: 64}, name: "Destination"}, {type: "register", restrictions: {reg_size: 64}, name: "Register 1"}, {type: "register", restrictions: {reg_size: 64}, name: "Register 2"}],
+		keyword: "and",
+		name: "And (register)",
+		description: "Performs a bitwise AND of two register values and writes the result to the destination register.",
+		operands: [{type: "register", restrictions: {reg_type: "gpr"}, name: "Destination"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Register 1"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Register 2"}],
 		mc_constructor: [
-			["get_bits", ["encode_gp_register", ["get_operand", 0]], 0, 5],
-			["get_bits", ["encode_gp_register", ["get_operand", 1]], 0, 5],
+			["if_eq_else", ["get_key", ["get_operand", 0], :reg_size], ["get_key", ["get_operand", 1], :reg_size], [], ["raise_error", "and Error: Register sizes are not the same"]],
+			["if_eq_else", ["get_key", ["get_operand", 1], :reg_size], ["get_key", ["get_operand", 2], :reg_size], [], ["raise_error", "and Error: Register sizes are not the same"]],
+			["get_bits", ["encode_gp_register", ["get_operand", 0]], 0, 5], # Rd
+			["get_bits", ["encode_gp_register", ["get_operand", 1]], 0, 5], # Rn
 			["get_bits", 0, 0, 6], # imm6 (shift amount) set to zero
 			["get_bits", ["encode_gp_register", ["get_operand", 2]], 0, 5],
 			["bits", 0], # N
 			["bits", 0,0], # shift type
-			["bits", 0,1,0,1,0, 0,0, 1],
+			["bits", 0,1,0,1,0, 0,0],
+			["case", ["get_key", ["get_operand", 0], :reg_size], 64, ["bits", 1], 32, ["bits", 0], []], # sf
 		],
 		bitsize: 32
 	},
@@ -185,82 +188,101 @@ end
 		bitsize: 32
 	},
 	{
-		# LSL (Logical shift left) with an immediate
-		# immr (rotation) is just set to zeros
 		keyword: "lsl",
-		name: "LSL (immediate)",
-		description: "Logically shifts left the value in the source register by the amount specified by the immediate, and stores the output in the destination register",
-		operands: [{type: "register", restrictions: {reg_size: 64}, name: "Destination"}, {type: "register", restrictions: {reg_size: 64}, name: "Source"}, {type: "immediate", name: "Amount"}],
+		name: "Logical shift left (immediate)",
+		description: "Logically shifts left the value in the source register by the amount specified by the immediate, and writes the result to the destination register",
+		operands: [{type: "register", restrictions: {reg_type: "gpr"}, name: "Destination"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Source"}, {type: "immediate", name: "Shift amount"}],
 		mc_constructor: [
+			["if_eq_else", ["get_key", ["get_operand", 0], :reg_size], ["get_key", ["get_operand", 1], :reg_size], [], ["raise_error", "lsl Error: Register sizes are not the same"]],
 			["get_bits", ["encode_gp_register", ["get_operand", 0]], 0, 5],
 			["get_bits", ["encode_gp_register", ["get_operand", 1]], 0, 5],
 			
-			["get_bits", ["subtract", 63, ["get_operand", 2]], 0, 6],
-			["get_bits", ["modulo", ["multiply", ["get_operand", 2], -1], 64], 0, 6],
+			["case", ["get_key", ["get_operand", 0], :reg_size], 
+				64, ["concat", ["get_bits", ["subtract", 63, ["get_operand", 2]], 0, 6],
+					["get_bits", ["modulo", ["multiply", ["get_operand", 2], -1], 64], 0, 6],],
+				32, ["concat", ["get_bits", ["subtract", 31, ["get_operand", 2]], 0, 6],
+					["get_bits", ["modulo", ["multiply", ["get_operand", 2], -1], 32], 0, 6]],
+				[]
+			],
 			
-			["bits", 1, 0,1,1,0,0,1, 0,1, 1],
+			["case", ["get_key", ["get_operand", 0], :reg_size], 64, ["bits", 1], 32, ["bits", 0], []], # N
+			["bits", 0,1,1,0,0,1, 0,1],
+			["case", ["get_key", ["get_operand", 0], :reg_size], 64, ["bits", 1], 32, ["bits", 0], []], # sf
 		],
 		bitsize: 32
 	},
+	
 	{
-		# LSL (Logical shift left) with an immediate for 32-bit registers
-		# immr (rotation) is just set to zeros
 		keyword: "lsl",
-		name: "LSL (immediate)",
-		description: "Logically shifts left the value in the source register by the amount specified by the immediate, and stores the output in the destination register",
-		operands: [{type: "register", restrictions: {reg_size: 32}, name: "Destination"}, {type: "register", restrictions: {reg_size: 32}, name: "Source"}, {type: "immediate", name: "Amount"}],
+		name: "Logical shift left (register)",
+		description: "Logically shifts left the value in the source register by the amount specified by a variable number of bits, shifting in zeros, and writes the result to the destination register. The shift amount is equal to a modulo operation between the second register value and register size (either 64 or 32).",
+		operands: [{type: "register", restrictions: {reg_type: "gpr"}, name: "Destination"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Source"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Shift amount"}],
 		mc_constructor: [
+			["if_eq_else", ["get_key", ["get_operand", 0], :reg_size], ["get_key", ["get_operand", 1], :reg_size], [], ["raise_error", "lsl Error: Register sizes are not the same"]],
+			["if_eq_else", ["get_key", ["get_operand", 1], :reg_size], ["get_key", ["get_operand", 2], :reg_size], [], ["raise_error", "lsl Error: Register sizes are not the same"]],
+
 			["get_bits", ["encode_gp_register", ["get_operand", 0]], 0, 5],
 			["get_bits", ["encode_gp_register", ["get_operand", 1]], 0, 5],
-			["get_bits", ["subtract", 31, ["get_operand", 2]], 0, 6],
-			["get_bits", ["modulo", ["multiply", ["get_operand", 2], -1], 32], 0, 6],			
-			["bits", 0, 0,1,1,0,0,1, 0,1, 0],
+			
+			["bits", 0,0, 0,1,0,0],
+			
+			["get_bits", ["encode_gp_register", ["get_operand", 2]], 0, 5],
+
+			["bits", 0,1,1,0,1,0,1,1, 0, 0],
+			["case", ["get_key", ["get_operand", 0], :reg_size], 64, ["bits", 1], 32, ["bits", 0], []], # sf
 		],
 		bitsize: 32
 	},
 	
-	
-	
 	{
-		# LSL (Logical shift left) with an immediate
-		# immr (rotation) is just set to zeros
 		keyword: "lsr",
-		name: "LSR (immediate)",
-		description: "Logically shifts right the value in the source register by the amount specified by the immediate, and stores the output in the destination register",
-		operands: [{type: "register", restrictions: {reg_size: 64}, name: "Destination"}, {type: "register", restrictions: {reg_size: 64}, name: "Source"}, {type: "immediate", name: "Amount"}],
+		name: "Logical shift right (immediate)",
+		description: "Logically shifts right the value in the source register by the amount specified by the immediate, and writes the result to the destination register",
+		operands: [{type: "register", restrictions: {reg_type: "gpr"}, name: "Destination"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Source"}, {type: "immediate", name: "Shift amount"}],
 		mc_constructor: [
+			["if_eq_else", ["get_key", ["get_operand", 0], :reg_size], ["get_key", ["get_operand", 1], :reg_size], [], ["raise_error", "lsr Error: Register sizes are not the same"]],
 			["get_bits", ["encode_gp_register", ["get_operand", 0]], 0, 5],
 			["get_bits", ["encode_gp_register", ["get_operand", 1]], 0, 5],
-
+			
 			["bits", 1,1,1,1,1], # imms
-			["bits", 1], # imms end (specifies size)
+			["case", ["get_key", ["get_operand", 0], :reg_size], 64, ["bits", 1], 32, ["bits", 0], []], # imms end
+			
 			["get_bits", ["get_operand", 2], 0, 6], # immr
 			
-			["bits", 1, 0,1,1,0,0,1, 0,1, 1],
+			["case", ["get_key", ["get_operand", 0], :reg_size], 64, ["bits", 1], 32, ["bits", 0], []], # N
+			
+			["bits", 0,1,1,0,0,1, 0,1],
+			
+			["case", ["get_key", ["get_operand", 0], :reg_size], 64, ["bits", 1], 32, ["bits", 0], []], # sf
 		],
 		bitsize: 32
 	},
+	
+	
 	{
 		keyword: "lsr",
-		name: "LSR (immediate)",
-		description: "Logically shifts right the value in the source register by the amount specified by the immediate, and stores the output in the destination register",
-		operands: [{type: "register", restrictions: {reg_size: 32}, name: "Destination"}, {type: "register", restrictions: {reg_size: 32}, name: "Source"}, {type: "immediate", name: "Amount"}],
+		name: "Logical shift right (register)",
+		description: "Logically shifts right the value in the source register by the amount specified by a variable number of bits, shifting in zeros, and writes the result to the destination register. The shift amount is equal to a modulo operation between the second register value and register size (either 64 or 32).",
+		operands: [{type: "register", restrictions: {reg_type: "gpr"}, name: "Destination"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Source"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Shift amount"}],
 		mc_constructor: [
+			["if_eq_else", ["get_key", ["get_operand", 0], :reg_size], ["get_key", ["get_operand", 1], :reg_size], [], ["raise_error", "lsl Error: Register sizes are not the same"]],
+			["if_eq_else", ["get_key", ["get_operand", 1], :reg_size], ["get_key", ["get_operand", 2], :reg_size], [], ["raise_error", "lsl Error: Register sizes are not the same"]],
+	
 			["get_bits", ["encode_gp_register", ["get_operand", 0]], 0, 5],
 			["get_bits", ["encode_gp_register", ["get_operand", 1]], 0, 5],
-		
-			["bits", 1,1,1,1,1], # imms
-			["bits", 0], # imms end (specifies size)
-			["get_bits", ["get_operand", 2], 0, 6], # immr
 			
-			["bits", 0, 0,1,1,0,0,1, 0,1, 0],
+			["bits", 1,0, 0,1,0,0],
+			
+			["get_bits", ["encode_gp_register", ["get_operand", 2]], 0, 5],
+	
+			["bits", 0,1,1,0,1,0,1,1, 0, 0],
+			["case", ["get_key", ["get_operand", 0], :reg_size], 64, ["bits", 1], 32, ["bits", 0], []], # sf
 		],
 		bitsize: 32
 	},
 	
 	
 	
-	
 	{
 		# LDR immediate
 		keyword: "ldr",
@@ -292,6 +314,33 @@ end
 		bitsize: 32
 	},
 	
+	{
+		keyword: "ldr_unsigned",
+		name: "Load Register (immediate), unsigned offset",
+		description: "Loads 4 or 8 bytes from memory at the address in the second register with an unsigned immediate offset, and writes it to the destination register",
+		operands: [{type: "register", restrictions: {reg_type: "gpr"}, name: "Destination"}, {type: "register", restrictions: {reg_type: "gpr", reg_size: 64}, name: "Source address"}, {type: "immediate", name: "Offset"}],
+		mc_constructor: [
+			["case", ["get_key", ["get_operand", 0], :reg_size],
+				64, ["if_eq_else", ["modulo", ["get_operand", 2], 8], 0, [], ["raise_error", "ldr_unsigned Error: Unsigned offset must be divisible by 8 for 64-bit registers."]],
+				32, ["if_eq_else", ["modulo", ["get_operand", 2], 4], 0, [], ["raise_error", "ldr_unsigned Error: Unsigned offset must be divisible by 4 for 32-bit registers."]],
+				[]
+			],
+			["get_bits", ["encode_gp_register", ["get_operand", 0]], 0, 5],
+			["get_bits", ["encode_gp_register", ["get_operand", 1]], 0, 5],
+			["get_bits",
+				["case", ["get_key", ["get_operand", 0], :reg_size],
+					64, ["divide", ["get_operand", 2], 8],
+					32, ["divide", ["get_operand", 2], 4],
+					["get_operand", 2]
+				],
+			0, 12],			
+			["bits", 1,0, 1,0, 0, 1,1,1],
+			["case", ["get_key", ["get_operand", 0], :reg_size], 64, ["bits", 1], 32, ["bits", 0], []],
+			["bits", 1],
+		],
+		bitsize: 32
+	},
+	
 	{
 		keyword: "ldrb",
 		name: "Load Register Byte",
@@ -394,80 +443,236 @@ end
 		],
 		bitsize: 32
 	},
+
+
+	{
+		keyword: "strb",
+		name: "Store byte",
+		description: "Stores the least significant byte of a 32-bit general purpose register at the address specified by the second register.",
+		operands: [{type: "register", restrictions: {reg_type: "gpr", reg_size: 32}, name: "Content"}, {type: "register", restrictions: {reg_type: "gpr", reg_size: 64}, name: "Address"}],
+		mc_constructor: [
+			["get_bits", ["encode_gp_register", ["get_operand", 0]], 0, 5],
+			["get_bits", ["encode_gp_register", ["get_operand", 1]], 0, 5],
+			["get_bits", 0, 0, 12],	
+			["bits", 0,0, 1,0, 0, 1,1,1, 0,0],
+		],
+		bitsize: 32
+	},
+
+	{
+		keyword: "strb_unsigned",
+		name: "Store byte (immediate), unsigned offset",
+		description: "Stores the least significant byte of a 32-bit general purpose register at the address specified by the second register with an unsigned immediate offset.",
+		operands: [{type: "register", restrictions: {reg_type: "gpr", reg_size: 32}, name: "Content"}, {type: "register", restrictions: {reg_type: "gpr", reg_size: 64}, name: "Address"}, {type: "immediate", name: "Address Offset"}],
+		mc_constructor: [
+			["get_bits", ["encode_gp_register", ["get_operand", 0]], 0, 5],
+			["get_bits", ["encode_gp_register", ["get_operand", 1]], 0, 5],
+			["get_bits", ["get_operand", 2], 0, 12],	
+			["bits", 0,0, 1,0, 0, 1,1,1, 0,0],
+		],
+		bitsize: 32
+	},
 	
+	{
+		keyword: "strb_post_index",
+		name: "Store byte (immediate), signed post-index offset",
+		description: "Stores the least significant byte of a 32-bit general purpose register at the address specified by the second register with an immediate offset added after writing.",
+		operands: [{type: "register", restrictions: {reg_type: "gpr", reg_size: 32}, name: "Content"}, {type: "register", restrictions: {reg_type: "gpr", reg_size: 64}, name: "Address"}, {type: "immediate", name: "Address Offset"}],
+		mc_constructor: [
+			["get_bits", ["encode_gp_register", ["get_operand", 0]], 0, 5],
+			["get_bits", ["encode_gp_register", ["get_operand", 1]], 0, 5],
+			["bits", 1,0],
+			["get_bits", ["get_operand", 2], 0, 9],	
+			["bits", 0, 0,0, 0,0, 0, 1,1,1, 0,0],
+		],
+		bitsize: 32
+	},
 	
 	{
-		keyword: "cmp",
-		operands: [{type: "register", restrictions: {reg_size: 64}}, {type: "immediate"}],
+		keyword: "strb_pre_index",
+		name: "Store byte (immediate), signed pre-index offset",
+		description: "Stores the least significant byte of a 32-bit general purpose register at the address specified by the second register with an immediate offset added before writing.",
+		operands: [{type: "register", restrictions: {reg_type: "gpr", reg_size: 32}, name: "Content"}, {type: "register", restrictions: {reg_type: "gpr", reg_size: 64}, name: "Address"}, {type: "immediate", name: "Address Offset"}],
 		mc_constructor: [
-			["bits", 1,1,1,1,1],
 			["get_bits", ["encode_gp_register", ["get_operand", 0]], 0, 5],
-			["get_bits", ["get_operand", 1], 0, 12], # Immediate offset zero			
-			["bits", 0, 0,1,0,0,0,1, 1, 1, 1],
+			["get_bits", ["encode_gp_register", ["get_operand", 1]], 0, 5],
+			["bits", 1,1],
+			["get_bits", ["get_operand", 2], 0, 9],	
+			["bits", 0, 0,0, 0,0, 0, 1,1,1, 0,0],
 		],
 		bitsize: 32
 	},
 	
+		
 	{
 		keyword: "cmp",
-		name: "CMP (two registers)",
-		description: "Compares two 64-bit registers and updates condition flags based on the result.",
-		operands: [{type: "register", restrictions: {reg_size: 64}, name: "Register 1"}, {type: "register", restrictions: {reg_size: 64}, name: "Register 2"}],
+		name: "Compare (immediate)",
+		description: "Subtracts an immediate value from a register value, and updates the condition flags based on the result.",
+		operands: [{type: "register", restrictions: {reg_type: "gpr"}}, {type: "immediate"}],
 		mc_constructor: [
-			["bits", 1,1,1,1,1], # Rd
+			["bits", 1,1,1,1,1],
 			["get_bits", ["encode_gp_register", ["get_operand", 0]], 0, 5],
-			["get_bits", 0, 0, 6], # Immediate offset zero (shift amount)
-			["get_bits", ["encode_gp_register", ["get_operand", 1]], 0, 5], # Rm
-			["bits", 0],
-			["bits", 0, 0], # Shift type
-			["bits", 1,1,0,1,0,1,1,1],
+			["get_bits", ["get_operand", 1], 0, 12], # Immediate value	
+			["bits", 0, 0,1,0,0,0,1, 1, 1],
+			["case", ["get_key", ["get_operand", 0], :reg_size], 64, ["bits", 1], 32, ["bits", 0], []], # sf
 		],
 		bitsize: 32
 	},
 	
 	{
 		keyword: "cmp",
-		name: "CMP (two registers)",
-		description: "Compares two 32-bit registers and updates condition flags based on the result.",
-		operands: [{type: "register", restrictions: {reg_size: 32}, name: "Register 1"}, {type: "register", restrictions: {reg_size: 32}, name: "Register 2"}],
+		name: "Compare (registers)",
+		description: "Subtracts the second register value from the first register value, and updates the condition flags based on the result.",
+		operands: [{type: "register", restrictions: {reg_type: "gpr"}, name: "Register 1"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Register 2"}],
 		mc_constructor: [
+			["if_eq_else", ["get_key", ["get_operand", 0], :reg_size], ["get_key", ["get_operand", 1], :reg_size], [], ["raise_error", "cmp Error: Register sizes are not the same"]],
 			["bits", 1,1,1,1,1], # Rd
-			["get_bits", ["encode_gp_register", ["get_operand", 0]], 0, 5],
+			["get_bits", ["encode_gp_register", ["get_operand", 0]], 0, 5], # Rn
 			["get_bits", 0, 0, 6], # Immediate offset zero (shift amount)
 			["get_bits", ["encode_gp_register", ["get_operand", 1]], 0, 5], # Rm
 			["bits", 0],
 			["bits", 0, 0], # Shift type
-			["bits", 1,1,0,1,0,1,1,0],
+			["bits", 1,1,0,1,0,1,1],
+			["case", ["get_key", ["get_operand", 0], :reg_size], 64, ["bits", 1], 32, ["bits", 0], []], # sf
 		],
 		bitsize: 32
 	},
+
 	
 	{
 		keyword: "sub",
-		operands: [{type: "register", restrictions: {reg_size: 64}}, {type: "register", restrictions: {reg_size: 64}}, {type: "immediate"}],
+		name: "Subtract (immediate)",
+		description: "Subtract an immediate value from a register value, and store the result in the destination register",
+		operands: [{type: "register", restrictions: {reg_type: "gpr"}, name: "Destination"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Source"}, {type: "immediate", name: "Immediate"}],
 		mc_constructor: [
+			["if_eq_else", ["get_key", ["get_operand", 0], :reg_size], ["get_key", ["get_operand", 1], :reg_size], [], ["raise_error", "sub Error: Register sizes are not the same"]],
 			["get_bits", ["encode_gp_register", ["get_operand", 0]], 0, 5],
 			["get_bits", ["encode_gp_register", ["get_operand", 1]], 0, 5],
 			["get_bits", ["get_operand", 2], 0, 12], # Immediate offset zero
 			["bits", 0], # Shift	
-			["bits", 0,1,0,0,0,1,0,1,1],
+			["bits", 0,1,0,0,0,1,0,1],
+			["case", ["get_key", ["get_operand", 0], :reg_size], 64, ["bits", 1], 32, ["bits", 0], []], # sf
+		],
+		bitsize: 32
+	},
+	
+	{
+		keyword: "sub",
+		name: "Subtract (register)",
+		description: "Subtract the second register value from the first register value, and store the result in the destination register",
+		operands: [{type: "register", restrictions: {reg_type: "gpr"}, name: "Destination"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Register 1 (Source)"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Register 2 (To subtract)"}],
+		mc_constructor: [
+			# Check for size
+			["if_eq_else", ["get_key", ["get_operand", 0], :reg_size], ["get_key", ["get_operand", 1], :reg_size], [], ["raise_error", "sub Error: Register sizes are not the same"]], 
+			["if_eq_else", ["get_key", ["get_operand", 1], :reg_size], ["get_key", ["get_operand", 2], :reg_size], [], ["raise_error", "sub Error: Register sizes are not the same"]],
+
+			["get_bits", ["encode_gp_register", ["get_operand", 0]], 0, 5], # Rd
+			["get_bits", ["encode_gp_register", ["get_operand", 1]], 0, 5], # Rn
+			["get_bits", 0, 0, 6], # shift amount zero
+			["get_bits", ["encode_gp_register", ["get_operand", 2]], 0, 5], # Rm
+			["bits", 0, 0,0, 1,1,0,1,0, 0, 1],
+			["case", ["get_key", ["get_operand", 0], :reg_size], 64, ["bits", 1], 32, ["bits", 0], []], # sf
 		],
 		bitsize: 32
 	},
 	
 	{
 		keyword: "mul",
-		name: "MUL",
-		description: "Multiply the contents of two registers and store the output in the destination register.",
-		operands: [{type: "register", restrictions: {reg_type: "gpr"}}, {type: "register", restrictions: {reg_type: "gpr"}}, {type: "register", restrictions: {reg_type: "gpr"}}],
+		name: "Multiply",
+		description: "Multiply the contents of two registers, and store the output in the destination register.",
+		operands: [{type: "register", restrictions: {reg_type: "gpr"}, name: "Destination"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Register 1"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Register 2"}],
 		mc_constructor: [
+			["if_eq_else", ["get_key", ["get_operand", 0], :reg_size], ["get_key", ["get_operand", 1], :reg_size], [], ["raise_error", "mul Error: Register sizes are not the same"]], 
+			["if_eq_else", ["get_key", ["get_operand", 1], :reg_size], ["get_key", ["get_operand", 2], :reg_size], [], ["raise_error", "mul Error: Register sizes are not the same"]],
 			["get_bits", ["encode_gp_register", ["get_operand", 0]], 0, 5], # Rd
 			["get_bits", ["encode_gp_register", ["get_operand", 1]], 0, 5], # Rn
 			["bits", 1,1,1,1,1, 0], # Ra o0
 			["get_bits", ["encode_gp_register", ["get_operand", 2]], 0, 5], # Rm
 			["bits", 0,0,0, 1,1,0,1,1, 0,0],
-			["if_eq_else", ["get_key", ["get_operand", 0], :reg_size], 64, ["bits", 1], []], # SF = 1 if 64-bit
-			["if_eq_else", ["get_key", ["get_operand", 0], :reg_size], 32, ["bits", 0], []], # SF = 0 if 32-bit
+			["case", ["get_key", ["get_operand", 0], :reg_size], 64, ["bits", 1], 32, ["bits", 0], []], # sf
+		],
+		bitsize: 32
+	},
+	
+	
+	{
+		keyword: "madd",
+		name: "Multiply-Add",
+		description: "Multiplies two register values, adds a third register value, and writes the result to the destination register.",
+		operands: [{type: "register", restrictions: {reg_type: "gpr"}, name: "Destination"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Register 1 (to multiply)"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Register 2 (to multiply)"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Register 3 (to add)"}],
+		mc_constructor: [
+			# Checks for register sizes being the same
+			["if_eq_else", ["get_key", ["get_operand", 0], :reg_size], ["get_key", ["get_operand", 1], :reg_size], [], ["raise_error", "madd Error: Register sizes are not the same"]], 
+			["if_eq_else", ["get_key", ["get_operand", 1], :reg_size], ["get_key", ["get_operand", 2], :reg_size], [], ["raise_error", "madd Error: Register sizes are not the same"]], 
+			["if_eq_else", ["get_key", ["get_operand", 2], :reg_size], ["get_key", ["get_operand", 3], :reg_size], [], ["raise_error", "madd Error: Register sizes are not the same"]], 
+
+			["get_bits", ["encode_gp_register", ["get_operand", 0]], 0, 5], # Rd
+			["get_bits", ["encode_gp_register", ["get_operand", 1]], 0, 5], # Rn
+			["get_bits", ["encode_gp_register", ["get_operand", 3]], 0, 5], #Ra
+			["bits", 0], # o0
+			["get_bits", ["encode_gp_register", ["get_operand", 2]], 0, 5], # Rm
+			["bits", 0,0,0, 1,1,0,1,1, 0,0],
+			["case", ["get_key", ["get_operand", 0], :reg_size], 64, ["bits", 1], 32, ["bits", 0], []], # sf
+		],
+		bitsize: 32,
+	},
+	
+	
+	{
+		keyword: "msub",
+		name: "Multiply-Subtract",
+		description: "Multiplies two register values, subtracts the product from a third register value, and writes the result to the destination register.",
+		operands: [{type: "register", restrictions: {reg_type: "gpr"}, name: "Destination"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Register 1 (to multiply)"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Register 2 (to multiply)"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Register 3 (To subtract from)"}],
+		mc_constructor: [
+			# Checks for register sizes being the same
+			["if_eq_else", ["get_key", ["get_operand", 0], :reg_size], ["get_key", ["get_operand", 1], :reg_size], [], ["raise_error", "madd Error: Register sizes are not the same"]], 
+			["if_eq_else", ["get_key", ["get_operand", 1], :reg_size], ["get_key", ["get_operand", 2], :reg_size], [], ["raise_error", "madd Error: Register sizes are not the same"]], 
+			["if_eq_else", ["get_key", ["get_operand", 2], :reg_size], ["get_key", ["get_operand", 3], :reg_size], [], ["raise_error", "madd Error: Register sizes are not the same"]], 
+	
+			["get_bits", ["encode_gp_register", ["get_operand", 0]], 0, 5], # Rd
+			["get_bits", ["encode_gp_register", ["get_operand", 1]], 0, 5], # Rn
+			["get_bits", ["encode_gp_register", ["get_operand", 3]], 0, 5], #Ra
+			["bits", 1], # o0
+			["get_bits", ["encode_gp_register", ["get_operand", 2]], 0, 5], # Rm
+			["bits", 0,0,0, 1,1,0,1,1, 0,0],
+			["case", ["get_key", ["get_operand", 0], :reg_size], 64, ["bits", 1], 32, ["bits", 0], []], # sf
+		],
+		bitsize: 32,
+	},
+	
+	
+	{
+		keyword: "udiv",
+		name: "Unsigned Divide",
+		description: "Divides an unsigned integer register value by another unsigned integer register value, and writes the result to the destination register.",
+		operands: [{type: "register", restrictions: {reg_type: "gpr"}, name: "Destination"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Register 1"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Register 2"}],
+		mc_constructor: [
+			["if_eq_else", ["get_key", ["get_operand", 0], :reg_size], ["get_key", ["get_operand", 1], :reg_size], [], ["raise_error", "udiv Error: Register sizes are not the same"]], 
+			["if_eq_else", ["get_key", ["get_operand", 1], :reg_size], ["get_key", ["get_operand", 2], :reg_size], [], ["raise_error", "udiv Error: Register sizes are not the same"]],
+			["get_bits", ["encode_gp_register", ["get_operand", 0]], 0, 5], # Rd
+			["get_bits", ["encode_gp_register", ["get_operand", 1]], 0, 5], # Rn
+			["bits", 0, 1,0,0,0,0],
+			["get_bits", ["encode_gp_register", ["get_operand", 2]], 0, 5], # Rm
+			["bits", 0,1,1,0,1,0,1,1, 0, 0],
+			["case", ["get_key", ["get_operand", 0], :reg_size], 64, ["bits", 1], 32, ["bits", 0], []], # sf
+		],
+		bitsize: 32
+	},
+	
+	{
+		keyword: "sdiv",
+		name: "Signed Divide",
+		description: "Divides a signed integer register value by another signed integer register value, and writes the result to the destination register.",
+		operands: [{type: "register", restrictions: {reg_type: "gpr"}, name: "Destination"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Register 1"}, {type: "register", restrictions: {reg_type: "gpr"}, name: "Register 2"}],
+		mc_constructor: [
+			["if_eq_else", ["get_key", ["get_operand", 0], :reg_size], ["get_key", ["get_operand", 1], :reg_size], [], ["raise_error", "udiv Error: Register sizes are not the same"]], 
+			["if_eq_else", ["get_key", ["get_operand", 1], :reg_size], ["get_key", ["get_operand", 2], :reg_size], [], ["raise_error", "udiv Error: Register sizes are not the same"]],
+			["get_bits", ["encode_gp_register", ["get_operand", 0]], 0, 5], # Rd
+			["get_bits", ["encode_gp_register", ["get_operand", 1]], 0, 5], # Rn
+			["bits", 1, 1,0,0,0,0],
+			["get_bits", ["encode_gp_register", ["get_operand", 2]], 0, 5], # Rm
+			["bits", 0,1,1,0,1,0,1,1, 0, 0],
+			["case", ["get_key", ["get_operand", 0], :reg_size], 64, ["bits", 1], 32, ["bits", 0], []], # sf
 		],
 		bitsize: 32
 	},
@@ -479,8 +684,8 @@ end
 	
 	{
 		keyword: "b.eq",
-		name: "Branch with condition",
-		description: "Branches to a label if the condition (equality) is met",
+		name: "Branch if equal (label)",
+		description: "Branches to a label if the condition is met",
 		operands: [{type: "label"}],
 		mc_constructor: [
 			["if_eq_else", ["modulo", ["subtract", ["get_label_address", ["get_operand", 0]], ["get_current_address"]], 4], 0, [], ["raise_error", "Can't branch to the address - offset not divisible by 4 bytes."]], # Check if address is accessible
@@ -493,8 +698,9 @@ end
 	},
 	{
 		keyword: "b.eq",
+		name: "Branch if equal (immediate)",
+		description: "Changes the PC relatively by the immediate value if the condition is met",
 		operands: [{type: "immediate"}],
-		description: "Changes the PC relatively by the immediate value if the condition is met (equality)",
 		mc_constructor: [
 			["bits", 0,0,0,0], # eq condition
 			["bits", 0],
@@ -503,8 +709,157 @@ end
 		],
 		bitsize: 32
 	},
+	
+	
+	{
+		keyword: "b.ne",
+		name: "Branch if not equal (label)",
+		description: "Branches to a label if the condition is met",
+		operands: [{type: "label"}],
+		mc_constructor: [
+			["if_eq_else", ["modulo", ["subtract", ["get_label_address", ["get_operand", 0]], ["get_current_address"]], 4], 0, [], ["raise_error", "Can't branch to the address - offset not divisible by 4 bytes."]], # Check if address is accessible
+			["bits", 1,0,0,0], # condition
+			["bits", 0],
+			["get_bits", ["divide", ["subtract", ["get_label_address", ["get_operand", 0]], ["get_current_address"]], 4], 0, 19],
+			["bits", 0, 0,1,0,1,0,1,0],
+		],
+		bitsize: 32
+	},
+	{
+		keyword: "b.ne",
+		name: "Branch if not equal (immediate)",
+		description: "Changes the PC relatively by the immediate value if the condition is met",
+		operands: [{type: "immediate"}],
+		mc_constructor: [
+			["bits", 1,0,0,0], # condition
+			["bits", 0],
+			["get_bits", ["get_operand", 0], 0, 19],
+			["bits", 0, 0,1,0,1,0,1,0],
+		],
+		bitsize: 32
+	},
+	
+	
+	{
+		keyword: "b.ge",
+		name: "Branch if greater or equal (label)",
+		description: "Branches to a label if the condition is met",
+		operands: [{type: "label"}],
+		mc_constructor: [
+			["if_eq_else", ["modulo", ["subtract", ["get_label_address", ["get_operand", 0]], ["get_current_address"]], 4], 0, [], ["raise_error", "Can't branch to the address - offset not divisible by 4 bytes."]], # Check if address is accessible
+			["bits", 0,1,0,1], # condition
+			["bits", 0],
+			["get_bits", ["divide", ["subtract", ["get_label_address", ["get_operand", 0]], ["get_current_address"]], 4], 0, 19],
+			["bits", 0, 0,1,0,1,0,1,0],
+		],
+		bitsize: 32
+	},
+	{
+		keyword: "b.ge",
+		name: "Branch if greater or equal (immediate)",
+		description: "Changes the PC relatively by the immediate value if the condition is met",
+		operands: [{type: "immediate"}],
+		mc_constructor: [
+			["bits", 0,1,0,1], # condition
+			["bits", 0],
+			["get_bits", ["get_operand", 0], 0, 19],
+			["bits", 0, 0,1,0,1,0,1,0],
+		],
+		bitsize: 32
+	},
+	
+	
+	
+	{
+		keyword: "b.lt",
+		name: "Branch if less than (label)",
+		description: "Branches to a label if the condition is met",
+		operands: [{type: "label"}],
+		mc_constructor: [
+			["if_eq_else", ["modulo", ["subtract", ["get_label_address", ["get_operand", 0]], ["get_current_address"]], 4], 0, [], ["raise_error", "Can't branch to the address - offset not divisible by 4 bytes."]], # Check if address is accessible
+			["bits", 1,1,0,1], # condition
+			["bits", 0],
+			["get_bits", ["divide", ["subtract", ["get_label_address", ["get_operand", 0]], ["get_current_address"]], 4], 0, 19],
+			["bits", 0, 0,1,0,1,0,1,0],
+		],
+		bitsize: 32
+	},
+	{
+		keyword: "b.lt",
+		name: "Branch if less than (immediate)",
+		description: "Changes the PC relatively by the immediate value if the condition is met",
+		operands: [{type: "immediate"}],
+		mc_constructor: [
+			["bits", 1,1,0,1], # condition
+			["bits", 0],
+			["get_bits", ["get_operand", 0], 0, 19],
+			["bits", 0, 0,1,0,1,0,1,0],
+		],
+		bitsize: 32
+	},
+	
+	
+	
+	
+	{
+		keyword: "b.gt",
+		name: "Branch if greater than (label)",
+		description: "Branches to a label if the condition is met",
+		operands: [{type: "label"}],
+		mc_constructor: [
+			["if_eq_else", ["modulo", ["subtract", ["get_label_address", ["get_operand", 0]], ["get_current_address"]], 4], 0, [], ["raise_error", "Can't branch to the address - offset not divisible by 4 bytes."]], # Check if address is accessible
+			["bits", 0,0,1,1], # condition
+			["bits", 0],
+			["get_bits", ["divide", ["subtract", ["get_label_address", ["get_operand", 0]], ["get_current_address"]], 4], 0, 19],
+			["bits", 0, 0,1,0,1,0,1,0],
+		],
+		bitsize: 32
+	},
+	{
+		keyword: "b.gt",
+		name: "Branch if greater than (immediate)",
+		description: "Changes the PC relatively by the immediate value if the condition is met",
+		operands: [{type: "immediate"}],
+		mc_constructor: [
+			["bits", 0,0,1,1], # condition
+			["bits", 0],
+			["get_bits", ["get_operand", 0], 0, 19],
+			["bits", 0, 0,1,0,1,0,1,0],
+		],
+		bitsize: 32
+	},
+	
+	
+	{
+		keyword: "b.le",
+		name: "Branch if less or equal (label)",
+		description: "Branches to a label if the condition is met",
+		operands: [{type: "label"}],
+		mc_constructor: [
+			["if_eq_else", ["modulo", ["subtract", ["get_label_address", ["get_operand", 0]], ["get_current_address"]], 4], 0, [], ["raise_error", "Can't branch to the address - offset not divisible by 4 bytes."]], # Check if address is accessible
+			["bits", 1,0,1,1], # condition
+			["bits", 0],
+			["get_bits", ["divide", ["subtract", ["get_label_address", ["get_operand", 0]], ["get_current_address"]], 4], 0, 19],
+			["bits", 0, 0,1,0,1,0,1,0],
+		],
+		bitsize: 32
+	},
+	{
+		keyword: "b.le",
+		name: "Branch if less or equal (immediate)",
+		description: "Changes the PC relatively by the immediate value if the condition is met",
+		operands: [{type: "immediate"}],
+		mc_constructor: [
+			["bits", 1,0,1,1], # condition
+			["bits", 0],
+			["get_bits", ["get_operand", 0], 0, 19],
+			["bits", 0, 0,1,0,1,0,1,0],
+		],
+		bitsize: 32
+	},
+	
 ]
 
 end # Kompiler::ARMv8A
 
-end # Kompiler
+end # Kompiler

data/lib/kompiler/mc_builder.rb

@@ -40,6 +40,7 @@ MC_AST_NODES = [
 	end},
 	{name: "raise_error", n_args: 1, func: lambda {|args, state| raise args[0] } },
 	{name: "get_key", n_args: 2, func: lambda {|args, state| args[0][args[1]] }},
+	{name: "concat", n_args: "any", func: lambda {|args, state| args.flatten}},
 ]
 
 def self.is_ast_node(val)

data/lib/kompiler/parsers.rb

@@ -9,6 +9,8 @@ def self.parse_str(code)
 
 	# Skip the "
 	i = 1
+	
+	quote = code[0]
 
 	next_char_backslashed = false
 
@@ -20,15 +22,14 @@ def self.parse_str(code)
 				str_content << "\n"
 			elsif code[i] == "r"
 				str_content << "\r"
-			elsif code[i] == "\\"
-				str_content << "\\"
+			elsif code[i] == "0"
+				str_content << "\0"
 			else
-				str_content << "\\"
 				str_content << code[i]
 			end
 			next_char_backslashed = false
 		else
-			if code[i] == "\""
+			if code[i] == quote
 				break
 			elsif code[i] == "\\"
 				next_char_backslashed = true
@@ -145,6 +146,29 @@ def self.check_decimal_operand(str)
 end
 
 
+def self.check_char_operand(str)
+
+	# If doesn't start with ' or doesn't end with ', return false
+	if (str[0] != "'") || (str[-1] != "'")
+		return [false, nil]
+	end
+
+	# Use existing logic to parse the contents
+	to_parse = str.dup
+	to_parse[0] = '"'
+	to_parse[-1] = '"'
+	content, parse_i = parse_str(to_parse)
+	
+	# If more than one character, return false
+	if content.size != 1
+		return [false, nil]
+	end
+
+	return [true, content.encode("ascii").bytes[0]]
+end
+
+
+
 def self.check_immediate_operand(operand_str)
 	
 	is_bin, bin_value = check_binary_operand(operand_str)
@@ -156,6 +180,9 @@ def self.check_immediate_operand(operand_str)
 	is_hex, hex_value = check_hex_operand(operand_str)
 	return [true, {type: "immediate", value: hex_value, def_type: "hex"}] if is_hex
 	
+	is_char, char_value = check_char_operand(operand_str)
+	return [true, {type: "immediate", value: char_value, def_type: "char"}] if is_char
+	
 	return [false, nil]
 end
 
@@ -179,7 +206,6 @@ end
 
 def self.parse_operand_str(operand_str)
 	
-	
 	# Check if the operand is a register
 	is_register, register = check_register_operand(operand_str)
 	return {type: "register", value: register, register: register} if is_register
@@ -260,9 +286,9 @@ def self.parse_instruction_line(line)
 			end
 			
 			# If a string definition, parse to the end of the string
-			if line[i] == "\""
+			if ["\"", "'"].include?(line[i])
 				str_content, parsed_size = parse_str(line[i..])
-				operand_content += '"' + str_content + '"'
+				operand_content += line[i] + str_content + line[i]
 				i += parsed_size
 				next
 			end

metadata

@@ -1,14 +1,14 @@
 --- !ruby/object:Gem::Specification
 name: kompiler
 version: !ruby/object:Gem::Version
-  version: 0.2.0.pre.1
+  version: 0.2.0
 platform: ruby
 authors:
 - Kyryl Shyshko
 autorequire:
 bindir: bin
 cert_chain: []
-date: 2024-11-28 00:00:00.000000000 Z
+date: 2024-12-04 00:00:00.000000000 Z
 dependencies: []
 description: 'Kompiler is a low-level, modular and extendable compiler for any architecture.
   By default Kompiler supports ARMv8-a, but other architecture extensions can be downloaded