hardsploit_gui 2.0
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- checksums.yaml +7 -0
- data/README.md +22 -0
- data/Rakefile +1 -0
- data/bin/hardsploit_gui +3 -0
- data/lib/Firmware/FPGA/I2C/I2C_INTERACT/HARDSPLOIT_FIRMWARE_FPGA_I2C_INTERACT.rpd +0 -0
- data/lib/Firmware/FPGA/PARALLEL/NO_MUX_PARALLEL_MEMORY/HARDSPLOIT_FIRMWARE_FPGA_NO_MUX_PARALLEL_MEMORY.rpd +0 -0
- data/lib/Firmware/FPGA/SPI/SPI_INTERACT/HARDSPLOIT_FIRMWARE_FPGA_SPI_INTERACT.rpd +0 -0
- data/lib/Firmware/FPGA/SWD/SWD_INTERACT/HARDSPLOIT_FIRMWARE_FPGA_SWD_INTERACT.rpd +0 -0
- data/lib/Firmware/FPGA/TEST/TEST_INTERACT/HARDSPLOIT_FIRMWARE_FPGA_TEST_INTERACT.rpd +0 -0
- data/lib/Firmware/FPGA/VersionFPGA.rb +5 -0
- data/lib/Firmware/UC/HARDSPLOIT_FIRMWARE_UC.bin +0 -0
- data/lib/Firmware/UC/VersionUC.rb +12 -0
- data/lib/HardsploitAPI/HardsploitAPI.rb +134 -0
- data/lib/HardsploitAPI/HardsploitAPI_CONSTANT.rb +145 -0
- data/lib/HardsploitAPI/HardsploitAPI_FIRMWARE.rb +311 -0
- data/lib/HardsploitAPI/HardsploitAPI_I2C.rb +218 -0
- data/lib/HardsploitAPI/HardsploitAPI_NO_MUX_PARALLELE_MEMORY.rb +229 -0
- data/lib/HardsploitAPI/HardsploitAPI_SPI.rb +179 -0
- data/lib/HardsploitAPI/HardsploitAPI_TEST_INTERACT.rb +98 -0
- data/lib/HardsploitAPI/HardsploitAPI_USB_COMMUNICATION.rb +149 -0
- data/lib/HardsploitAPI/LICENSE.txt +674 -0
- data/lib/HardsploitAPI/README.md +22 -0
- data/lib/HardsploitAPI/SWD/HardsploitAPI_SWD.rb +249 -0
- data/lib/HardsploitAPI/SWD/HardsploitAPI_SWD_DEBUG.rb +102 -0
- data/lib/HardsploitAPI/SWD/HardsploitAPI_SWD_MEM_AP.rb +78 -0
- data/lib/HardsploitAPI/SWD/HardsploitAPI_SWD_STM32.rb +104 -0
- data/lib/HardsploitAPI/TRADEMARK +3 -0
- data/lib/LICENSE.txt +674 -0
- data/lib/README.md +22 -0
- data/lib/TRADEMARK +3 -0
- data/lib/class/Chip_editor.rb +448 -0
- data/lib/class/Command_editor.rb +268 -0
- data/lib/class/Command_table.rb +239 -0
- data/lib/class/Console.rb +28 -0
- data/lib/class/Export_manager.rb +124 -0
- data/lib/class/Firmware.rb +29 -0
- data/lib/class/Generic_commands.rb +275 -0
- data/lib/class/HardsploitGUI.rb +462 -0
- data/lib/class/I2C/I2c_command.rb +48 -0
- data/lib/class/I2C/I2c_export.rb +121 -0
- data/lib/class/I2C/I2c_import.rb +92 -0
- data/lib/class/I2C/I2c_settings.rb +117 -0
- data/lib/class/PARALLEL/Parallel_export.rb +146 -0
- data/lib/class/PARALLEL/Parallel_import.rb +88 -0
- data/lib/class/PARALLEL/Parallel_settings.rb +102 -0
- data/lib/class/SPI/Spi_export.rb +141 -0
- data/lib/class/SPI/Spi_import.rb +112 -0
- data/lib/class/SPI/Spi_settings.rb +90 -0
- data/lib/class/Wire_helper.rb +246 -0
- data/lib/db/associations.rb +125 -0
- data/lib/db/hs.db +0 -0
- data/lib/gui/gui_chip_editor.rb +355 -0
- data/lib/gui/gui_chip_management.rb +372 -0
- data/lib/gui/gui_command_editor.rb +218 -0
- data/lib/gui/gui_export_manager.rb +93 -0
- data/lib/gui/gui_generic_commands.rb +164 -0
- data/lib/gui/gui_generic_export.rb +148 -0
- data/lib/gui/gui_generic_import.rb +126 -0
- data/lib/gui/gui_i2c_command.rb +115 -0
- data/lib/gui/gui_i2c_settings.rb +201 -0
- data/lib/gui/gui_parallel_settings.rb +194 -0
- data/lib/gui/gui_spi_import.rb +126 -0
- data/lib/gui/gui_spi_settings.rb +187 -0
- data/lib/gui/gui_wire_helper.rb +99 -0
- data/lib/gui_designer/gui_chip_editor.ui +553 -0
- data/lib/gui_designer/gui_chip_management.ui +842 -0
- data/lib/gui_designer/gui_command_editor.ui +347 -0
- data/lib/gui_designer/gui_export_manager.ui +115 -0
- data/lib/gui_designer/gui_generic_commands.ui +258 -0
- data/lib/gui_designer/gui_generic_export.ui +179 -0
- data/lib/gui_designer/gui_generic_import.ui +142 -0
- data/lib/gui_designer/gui_i2c_command.ui +145 -0
- data/lib/gui_designer/gui_i2c_settings.ui +261 -0
- data/lib/gui_designer/gui_parallel_settings.ui +244 -0
- data/lib/gui_designer/gui_processing.ui +81 -0
- data/lib/gui_designer/gui_spi_settings.ui +321 -0
- data/lib/gui_designer/gui_wire_helper.ui +117 -0
- data/lib/hardsploit.rb +122 -0
- data/lib/images/search.png +0 -0
- data/lib/logs/error.log +0 -0
- metadata +236 -0
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# Hardsploit
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The essential security auditing tool for Internet of Things devices you'll need in your toolbox
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### [GO TO HARDSPLOIT](http://www.hardsploit.io)
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TO LEARN ABOUT IT
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### [GO TO SHOP](https://www.shop-hardsploit.com)
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TO BUY
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### [GO TO WIKI](https://github.com/OPALESECURITY/hardsploit-api/wiki)
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TO UNDERSTAND HOW USE IT
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### [GO TO FORUM](http://forum.hardsploit.io)
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FOR SUPPORT / HELP
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### [GO TO BUG TRACKER](https://github.com/OPALESECURITY/hardsploit-api/issues)
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FOR BUGS OR IMPROVEMENTS
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#!/usr/bin/ruby
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#===================================================
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# Hardsploit API - By Opale Security
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# www.opale-security.com || www.hardsploit.io
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# License: GNU General Public License v3
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# License URI: http://www.gnu.org/licenses/gpl.txt
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#===================================================
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require_relative 'HardsploitAPI_SWD_DEBUG'
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require_relative 'HardsploitAPI_SWD_STM32'
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class HardsploitAPI
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attr_accessor :debugPort
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attr_accessor :stm32
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def runSWD
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@debugPort = SWD_DEBUG_PORT.new(self)
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@stm32 = SWD_STM32.new(debugPort)
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resetSWD()
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# Cortex M4 0x410FC241
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# Cortex M3 411FC231
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end
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def obtainCodes
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resetSWD()
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code = {
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:DebugPortId => debugPort.idcode(),
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:AccessPortId => stm32.ahb.idcode(),
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:CpuId => stm32.ahb.readWord(0xE000ED00),
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:DeviceId => stm32.ahb.readWord(0x1FFFF7E8)
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}
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return code
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end
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def writeFlash(path)
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resetSWD()
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dataWrite = IO.binread(path)
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dataWrite = dataWrite.unpack("C*")
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puts "Halting Processor"
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stm32.halt()
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puts "Erasing Flash"
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stm32.flashUnlock()
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stm32.flashErase()
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puts "Programming Flash"
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stm32.flashProgram()
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time = Time.new
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stm32.flashWrite(0x08000000, dataWrite)
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time = Time.new - time
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puts "Write #{((dataWrite.size/time)).round(2)}Bytes/s #{(dataWrite.size)}Bytes in #{time.round(4)} s"
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stm32.flashProgramEnd()
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puts "Resetting"
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stm32.sysReset()
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puts "Start"
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stm32.unhalt
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end
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def eraseFlash
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puts 'Erase'
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stm32.flashErase()
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end
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def dumpFlash(path)
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resetSWD()
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#DUMP FLASH MEMORY TO A FILE
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@stm32.halt
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flash_size = (stm32.ahb.readWord(0x1ffff7e0) & 0xFFFF)
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puts "Flash size : #{(flash_size) } KB"
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puts "Dump flash"
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time = Time.new
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data = @stm32.flashRead(0x08000000,(flash_size*1024))
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time = Time.new - time
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puts "DUMP #{((data.size/time)).round(2)}Bytes/s #{(data.size)}Bytes in #{time.round(4)} s"
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IO.binwrite(path, data.pack('C*'))
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puts "Finish dump"
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end
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def writeSWD(ap,register,data)
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packet = Array.new
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packet.push 0 #low byte of lenght of trame refresh automaticly before send by usb
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packet.push 0 #high byte of lenght of trame refresh automaticly before send by usb
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packet.push HardsploitAPI.lowByte(HardsploitAPI::USB_COMMAND::FPGA_COMMAND)
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packet.push HardsploitAPI.highByte(HardsploitAPI::USB_COMMAND::FPGA_COMMAND)
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packet.push 0x50 #Command RAW COMMUNICATION TO FPGA FIFO
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packet.push 0x10 #Write mode
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packet.push (calcOpcode(ap, register, false)) #Send Request
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packet.push ((data & 0xFF) >> 0)
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packet.push ((data & 0xFF00) >> 8 )
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packet.push ((data & 0xFF0000) >> 16 )
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packet.push ((data & 0xFF000000) >> 24 )
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result = sendAndReceiveDATA(packet,1000)
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if result.class == Array then
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if result.size == 1 + 4 then #receive ACK
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if result[4] == 1 then
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return true
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elsif result[4] == 2 then
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raise "WAIT response"
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elsif result[4] == 4 then
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raise "FAULT response"
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else
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raise "WRITE ERROR #{result[4]}"
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end
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else
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raise "Error during writing}"
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end
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else # Receive and error
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raise "Error during writing, timeout "
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end
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return false
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end
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def writeBlockAP(data)
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if data.size > 8000 then
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raise "data is too big > 8000"
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end
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packet = Array.new
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packet.push 0 #low byte of lenght of trame refresh automaticly before send by usb
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packet.push 0 #high byte of lenght of trame refresh automaticly before send by usb
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packet.push HardsploitAPI.lowByte(HardsploitAPI::USB_COMMAND::FPGA_COMMAND)
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packet.push HardsploitAPI.highByte(HardsploitAPI::USB_COMMAND::FPGA_COMMAND)
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packet.push 0x50 #Command RAW COMMUNICATION TO FPGA FIFO
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packet.push 0xBB #Write ap
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packet.push *data
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result = sendAndReceiveDATA(packet,1000)
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if result.class == Array then
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if result.size == 1 + 4 then #receive ACK
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if result[4] == 1 then
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return true
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elsif result[4] == 2 then
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raise "WAIT response"
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elsif result[4] == 4 then
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raise "FAULT response"
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else
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raise "WRITE ERROR #{result[4]}"
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end
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else
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raise "Error during writing"
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end
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else # Receive and error
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raise "Error during writing, timeout "
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end
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return false
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end
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def readBlockAP(size)
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packet = Array.new
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packet.push 0 #low byte of lenght of trame refresh automaticly before send by usb
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packet.push 0 #high byte of lenght of trame refresh automaticly before send by usb
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packet.push HardsploitAPI.lowByte(HardsploitAPI::USB_COMMAND::FPGA_COMMAND)
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packet.push HardsploitAPI.highByte(HardsploitAPI::USB_COMMAND::FPGA_COMMAND)
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packet.push 0x50 #Command RAW COMMUNICATION TO FPGA FIFO
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packet.push 0xAA #Read mode
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packet.push HardsploitAPI.lowByte(size)
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packet.push HardsploitAPI.highByte(size)
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result = sendAndReceiveDATA(packet,1000)
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if result.class == Array then
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if result.size >= 4 then #Receive read + 4bytes for header
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return result.drop(4)
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else
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raise "Receive just Header where is the data ? "
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end
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else # Receive and error
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raise "Error during reading timeout or ACK issue "
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end
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end
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def readSWD(ap,register)
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packet = Array.new
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packet.push 0 #low byte of lenght of trame refresh automaticly before send by usb
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packet.push 0 #high byte of lenght of trame refresh automaticly before send by usb
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packet.push HardsploitAPI.lowByte(HardsploitAPI::USB_COMMAND::FPGA_COMMAND)
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packet.push HardsploitAPI.highByte(HardsploitAPI::USB_COMMAND::FPGA_COMMAND)
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packet.push 0x50 #Command RAW COMMUNICATION TO FPGA FIFO
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packet.push 0x11 #Read mode
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packet.push(calcOpcode(ap,register, true)) #Send Request
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result = sendAndReceiveDATA(packet,1000)
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if result.class == Array then
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if result.size == 4 + 4 then #Receive read + 4bytes for header
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convert = (result[7] << 24) + (result[6] << 16) + (result[5] << 8 ) + result[4]
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return convert
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elsif result.size == 4+1 then #receive ACK
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raise "Read error ACK : #{result[4]}"
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else
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raise "Error during reading"
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end
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else # Receive and error
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raise "Error during reading timeout "
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end
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end
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#Return array with 1 byte for ACK
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#Return 32bits integer for data read here is Core ID
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#Raise if error
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def resetSWD
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packet = Array.new
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packet.push 0 #low byte of lenght of trame refresh automaticly before send by usb
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packet.push 0 #high byte of lenght of trame refresh automaticly before send by usb
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packet.push HardsploitAPI.lowByte(HardsploitAPI::USB_COMMAND::FPGA_COMMAND)
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packet.push HardsploitAPI.highByte(HardsploitAPI::USB_COMMAND::FPGA_COMMAND)
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packet.push 0x50 #Command RAW COMMUNICATION TO FPGA FIFO
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packet.push 0x00 #Reset mode
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result = sendAndReceiveDATA(packet,1000)
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if result.class == Array then
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if result.size == 4 + 4 then #Receive read + 4bytes for header
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convert = (result[7] << 24) + (result[6] << 16) + (result[5] << 8 ) + result[4]
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return convert
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elsif result.size == 4 +1 then #reveice ACK
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raise "ERROR ACK #{result[4]}"
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else
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raise "Error during reading ICCODE result != 4"
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end
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else # Receive and error
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raise "Error during reading ICCODE timeout "
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end
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end
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def calcOpcode (ap, register, read)
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opcode = 0x00
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(ap ? opcode |= 0x40 : opcode |= 0x00)
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(read ? opcode |= 0x20 : opcode |= 0x00)
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opcode = opcode | ((register & 0x01) << 4) | ((register & 0x02) << 2) #Addr AP DP bit 2..3
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opcode = opcode | (((opcode & 0x78).to_s(2).count('1').odd? ? 1 : 0) << 2) #0x78 mask to take only read ap and register to process parity bit
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opcode = opcode | 0x81 #Start and Park Bit
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#puts "OpCode #{opcode.to_s(16)}"
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return opcode
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end
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end
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#!/usr/bin/ruby
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#===================================================
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# Hardsploit API - By Opale Security
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# www.opale-security.com || www.hardsploit.io
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# License: GNU General Public License v3
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# License URI: http://www.gnu.org/licenses/gpl.txt
|
7
|
+
#===================================================
|
8
|
+
class SWD_DEBUG_PORT
|
9
|
+
|
10
|
+
def initialize(hardAPI)
|
11
|
+
@HardAPI = hardAPI
|
12
|
+
@HardAPI.startFPGA
|
13
|
+
sleep(0.5)
|
14
|
+
@HardAPI.resetSWD
|
15
|
+
# read the IDCODE
|
16
|
+
# if HardAPI.resetSWD() != 0x1ba01477 then
|
17
|
+
# raise "warning: unexpected idcode"
|
18
|
+
# else
|
19
|
+
# puts "MCU DETECTED"
|
20
|
+
# end
|
21
|
+
abort(1,1,1,1,1)
|
22
|
+
select(0,0)
|
23
|
+
# power shit up
|
24
|
+
puts "Power shit up"
|
25
|
+
@HardAPI.writeSWD(FALSE, 1, 0x54000000)
|
26
|
+
if (status() >> 24) != 0xF4 then
|
27
|
+
raise "error powering up system"
|
28
|
+
exit(0)
|
29
|
+
else
|
30
|
+
puts "POWERING UP SYTEM OK"
|
31
|
+
end
|
32
|
+
#get the SELECT register to a known state
|
33
|
+
select(0,0)
|
34
|
+
@curAP = 0
|
35
|
+
@curBank = 0
|
36
|
+
end
|
37
|
+
|
38
|
+
def getAPI
|
39
|
+
return @HardAPI
|
40
|
+
end
|
41
|
+
|
42
|
+
def idcode
|
43
|
+
return @HardAPI.readSWD(FALSE, 0)
|
44
|
+
end
|
45
|
+
|
46
|
+
def abort (orunerr, wdataerr, stickyerr, stickycmp, dap)
|
47
|
+
value = 0x00000000
|
48
|
+
(orunerr ? value |= 0x10 : value |= 0x00)
|
49
|
+
(wdataerr ? value |= 0x08 : value |= 0x00)
|
50
|
+
(stickyerr ? value |= 0x04 : value |= 0x00)
|
51
|
+
(stickycmp ? value |= 0x02 : value |= 0x00)
|
52
|
+
(dap ? value |= 0x01 : value |= 0x00)
|
53
|
+
@HardAPI.writeSWD(FALSE, 0, value)
|
54
|
+
end
|
55
|
+
|
56
|
+
def status
|
57
|
+
val= @HardAPI.readSWD(FALSE,1)
|
58
|
+
return val
|
59
|
+
end
|
60
|
+
|
61
|
+
def control (trnCount = 0, trnMode = 0, maskLane = 0, orunDetect = 0)
|
62
|
+
value = 0x54000000
|
63
|
+
value = value | ((trnCount & 0xFFF) << 12)
|
64
|
+
value = value | ((maskLane & 0x00F) << 8)
|
65
|
+
value = value | ((trnMode & 0x003) << 2)
|
66
|
+
(orunDetect ? value |= 0x01 : value |= 0x00)
|
67
|
+
@HardAPI.writeSWD(False, 1, value)
|
68
|
+
end
|
69
|
+
|
70
|
+
def select (apsel, apbank)
|
71
|
+
value = 0x00000000
|
72
|
+
value = value | ((apsel & 0xFF) << 24)
|
73
|
+
value = value | ((apbank & 0x0F) << 4)
|
74
|
+
@HardAPI.writeSWD(FALSE, 2, value)
|
75
|
+
end
|
76
|
+
|
77
|
+
|
78
|
+
def readRB
|
79
|
+
return @HardAPI.readSWD(FALSE, 3)
|
80
|
+
end
|
81
|
+
def readAP ( apsel, address)
|
82
|
+
adrBank = (address >> 4) & 0xF
|
83
|
+
adrReg = (address >> 2) & 0x3
|
84
|
+
if apsel != @curAP or adrBank != @curBank then
|
85
|
+
select(apsel, adrBank)
|
86
|
+
@curAP = apsel
|
87
|
+
@curBank = adrBank
|
88
|
+
end
|
89
|
+
return @HardAPI.readSWD(TRUE, adrReg)
|
90
|
+
end
|
91
|
+
|
92
|
+
def writeAP (apsel, address, data)
|
93
|
+
adrBank = (address >> 4) & 0xF
|
94
|
+
adrReg = (address >> 2) & 0x3
|
95
|
+
if apsel != @curAP or adrBank != @curBank then
|
96
|
+
select(apsel, adrBank)
|
97
|
+
@curAP = apsel
|
98
|
+
@curBank = adrBank
|
99
|
+
end
|
100
|
+
@HardAPI.writeSWD(TRUE, adrReg, data)
|
101
|
+
end
|
102
|
+
end
|
@@ -0,0 +1,78 @@
|
|
1
|
+
#!/usr/bin/ruby
|
2
|
+
#===================================================
|
3
|
+
# Hardsploit API - By Opale Security
|
4
|
+
# www.opale-security.com || www.hardsploit.io
|
5
|
+
# License: GNU General Public License v3
|
6
|
+
# License URI: http://www.gnu.org/licenses/gpl.txt
|
7
|
+
#===================================================
|
8
|
+
|
9
|
+
class SWD_MEM_AP
|
10
|
+
|
11
|
+
def initialize( dp, apsel)
|
12
|
+
@dp = dp
|
13
|
+
@apsel = apsel
|
14
|
+
csw(1,2) # 32-bit auto-incrementing addressing
|
15
|
+
end
|
16
|
+
|
17
|
+
def csw ( addrInc, size)
|
18
|
+
@dp.readAP(@apsel, 0x00)
|
19
|
+
val = @dp.readRB() & 0xFFFFFF00
|
20
|
+
@dp.writeAP(@apsel, 0x00, val + (addrInc << 4) + size)
|
21
|
+
end
|
22
|
+
def idcode
|
23
|
+
@dp.readAP(@apsel, 0xFC)
|
24
|
+
return @dp.readRB()
|
25
|
+
end
|
26
|
+
def readWord (adr)
|
27
|
+
@dp.writeAP(@apsel, 0x04, adr)
|
28
|
+
@dp.readAP(@apsel, 0x0C)
|
29
|
+
return @dp.readRB()
|
30
|
+
end
|
31
|
+
def writeWord (adr, data)
|
32
|
+
@dp.writeAP(@apsel, 0x04, adr)
|
33
|
+
@dp.writeAP(@apsel, 0x0C, data)
|
34
|
+
return @dp.readRB()
|
35
|
+
end
|
36
|
+
def readBlock ( adr, count)#1K boundaries and return 4K of data word alignement
|
37
|
+
if count < 1 then
|
38
|
+
raise "readBlock error : count must be >= 1"
|
39
|
+
end
|
40
|
+
if count > 1024 then
|
41
|
+
raise "readBlock error : count must be <= 1024 "
|
42
|
+
end
|
43
|
+
csw(1, 2) # 32-bit single-incrementing addressing
|
44
|
+
@dp.writeAP(@apsel, 0x04, adr)
|
45
|
+
vals = Array.new
|
46
|
+
@dp.readAP(@apsel, 0x0C) #For the first byte
|
47
|
+
vals.push(*@dp.getAPI.readBlockAP(count-1)) #Hardcoded function to increase speed of read block
|
48
|
+
return vals
|
49
|
+
end
|
50
|
+
|
51
|
+
# def writeBlockNonInc (adr, data)
|
52
|
+
# self.csw(0, 2) # 32-bit non-incrementing addressing
|
53
|
+
# for val in data
|
54
|
+
# @dp.writeAP(@apsel, 0x04, adr)
|
55
|
+
# @dp.writeAP(@apsel, 0x0C, val)
|
56
|
+
# end
|
57
|
+
# self.csw(1, 2) # 32-bit auto-incrementing addressing
|
58
|
+
# end
|
59
|
+
|
60
|
+
def writeBlock (adr, data) #1K boundaries
|
61
|
+
@dp.writeAP(@apsel, 0x04, adr)
|
62
|
+
puts "writeBlock #{adr.to_s(16)}"
|
63
|
+
|
64
|
+
@dp.getAPI.writeBlockAP(data)
|
65
|
+
# for i in (0..data.size-1).step(4)
|
66
|
+
# @dp.writeAP(@apsel, 0x0C, data[i].to_i + (data[i+1].to_i << 8) + (data[i+2].to_i << 16)+ (data[i+3].to_i << 24))
|
67
|
+
# end
|
68
|
+
end
|
69
|
+
|
70
|
+
def writeHalfs (adr, data)
|
71
|
+
self.csw(2, 1) # 16-bit packed-incrementing addressing
|
72
|
+
@dp.writeAP(@apsel, 0x04, adr)
|
73
|
+
for val in data
|
74
|
+
sleep(0.001)
|
75
|
+
@dp.writeAP(@apsel, 0x0C, val)
|
76
|
+
end
|
77
|
+
end
|
78
|
+
end
|