grpc 1.71.0 → 1.74.0

data/third_party/abseil-cpp/absl/container/internal/raw_hash_set_resize_impl.h

@@ -0,0 +1,80 @@
+// Copyright 2025 The Abseil Authors
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     https://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+// This is a private implementation detail of resize algorithm of
+// raw_hash_set. It is exposed in a separate file for testing purposes.
+
+#ifndef ABSL_CONTAINER_INTERNAL_RAW_HASH_SET_RESIZE_IMPL_H_
+#define ABSL_CONTAINER_INTERNAL_RAW_HASH_SET_RESIZE_IMPL_H_
+
+#include <cstddef>
+#include <cstdint>
+
+#include "absl/base/config.h"
+
+namespace absl {
+ABSL_NAMESPACE_BEGIN
+namespace container_internal {
+
+// Encoding for probed elements used for smaller tables.
+// Data is encoded into single integer.
+// Storage format for 4 bytes:
+// - 7 bits for h2
+// - 12 bits for source_offset
+// - 13 bits for h1
+// Storage format for 8 bytes:
+// - 7 bits for h2
+// - 28 bits for source_offset
+// - 29 bits for h1
+// Storage format for 16 bytes:
+// - 7 bits for h2
+// - 57 bits for source_offset
+// - 58 bits for h1
+template <typename IntType, size_t kTotalBits>
+struct ProbedItemImpl {
+  static constexpr IntType kH2Bits = 7;
+
+  static constexpr IntType kMaxOldBits = (kTotalBits - kH2Bits) / 2;
+  static constexpr IntType kMaxOldCapacity = (IntType{1} << kMaxOldBits) - 1;
+
+  // We always have one bit more for h1.
+  static constexpr IntType kMaxNewBits = kMaxOldBits + 1;
+  static constexpr IntType kMaxNewCapacity = (IntType{1} << kMaxNewBits) - 1;
+
+  static constexpr IntType kH2Shift = (kTotalBits - kH2Bits);
+  static_assert(kMaxNewBits + kMaxOldBits + kH2Bits == kTotalBits);
+
+  ProbedItemImpl() = default;
+  ProbedItemImpl(uint8_t h2_arg, size_t source_offset_arg, size_t h1_arg)
+      : h2(h2_arg),
+        source_offset(static_cast<IntType>(source_offset_arg)),
+        h1(static_cast<IntType>(h1_arg)) {}
+
+  IntType h2 : kH2Bits;
+  IntType source_offset : kMaxOldBits;
+  IntType h1 : kMaxNewBits;
+};
+
+using ProbedItem4Bytes = ProbedItemImpl<uint32_t, 32>;
+static_assert(sizeof(ProbedItem4Bytes) == 4);
+using ProbedItem8Bytes = ProbedItemImpl<uint64_t, 64>;
+static_assert(sizeof(ProbedItem8Bytes) == 8);
+using ProbedItem16Bytes = ProbedItemImpl<uint64_t, 7 + 57 + 58>;
+static_assert(sizeof(ProbedItem16Bytes) == 16);
+
+}  // namespace container_internal
+ABSL_NAMESPACE_END
+}  // namespace absl
+
+#endif  // ABSL_CONTAINER_INTERNAL_RAW_HASH_SET_RESIZE_IMPL_H_

data/third_party/abseil-cpp/absl/crc/crc32c.cc

@@ -54,10 +54,6 @@ crc32c_t ExtendCrc32cInternal(crc32c_t initial_crc,
 
 }  // namespace crc_internal
 
-crc32c_t ComputeCrc32c(absl::string_view buf) {
-  return ExtendCrc32c(crc32c_t{0}, buf);
-}
-
 crc32c_t ExtendCrc32cByZeroes(crc32c_t initial_crc, size_t length) {
   uint32_t crc = static_cast<uint32_t>(initial_crc) ^ kCRC32Xor;
   CrcEngine()->ExtendByZeroes(&crc, length);

data/third_party/abseil-cpp/absl/crc/crc32c.h

@@ -83,11 +83,6 @@ crc32c_t ExtendCrc32cInternal(crc32c_t initial_crc,
 // CRC32C Computation Functions
 // -----------------------------------------------------------------------------
 
-// ComputeCrc32c()
-//
-// Returns the CRC32C value of the provided string.
-crc32c_t ComputeCrc32c(absl::string_view buf);
-
 // ExtendCrc32c()
 //
 // Computes a CRC32C value from an `initial_crc` CRC32C value including the
@@ -112,6 +107,13 @@ inline crc32c_t ExtendCrc32c(crc32c_t initial_crc,
   return crc_internal::ExtendCrc32cInternal(initial_crc, buf_to_add);
 }
 
+// ComputeCrc32c()
+//
+// Returns the CRC32C value of the provided string.
+inline crc32c_t ComputeCrc32c(absl::string_view buf) {
+  return ExtendCrc32c(crc32c_t{0}, buf);
+}
+
 // ExtendCrc32cByZeroes()
 //
 // Computes a CRC32C value for a buffer with an `initial_crc` CRC32C value,

data/third_party/abseil-cpp/absl/crc/internal/cpu_detect.cc

@@ -18,12 +18,21 @@
 #include <string>
 
 #include "absl/base/config.h"
+#include "absl/types/optional.h"  // IWYU pragma: keep
 
 #if defined(__aarch64__) && defined(__linux__)
 #include <asm/hwcap.h>
 #include <sys/auxv.h>
 #endif
 
+#if defined(__aarch64__) && defined(__APPLE__)
+#if defined(__has_include) && __has_include(<arm/cpu_capabilities_public.h>)
+#include <arm/cpu_capabilities_public.h>
+#endif
+#include <sys/sysctl.h>
+#include <sys/types.h>
+#endif
+
 #if defined(_WIN32) || defined(_WIN64)
 #include <intrin.h>
 #endif
@@ -269,8 +278,55 @@ CpuType GetCpuType() {
 }
 
 bool SupportsArmCRC32PMULL() {
+#if defined(HWCAP_CRC32) && defined(HWCAP_PMULL)
   uint64_t hwcaps = getauxval(AT_HWCAP);
   return (hwcaps & HWCAP_CRC32) && (hwcaps & HWCAP_PMULL);
+#else
+  return false;
+#endif
+}
+
+#elif defined(__aarch64__) && defined(__APPLE__)
+
+CpuType GetCpuType() { return CpuType::kUnknown; }
+
+template <typename T>
+static absl::optional<T> ReadSysctlByName(const char* name) {
+  T val;
+  size_t val_size = sizeof(T);
+  int ret = sysctlbyname(name, &val, &val_size, nullptr, 0);
+  if (ret == -1) {
+    return absl::nullopt;
+  }
+  return val;
+}
+
+bool SupportsArmCRC32PMULL() {
+  // Newer XNU kernels support querying all capabilities in a single
+  // sysctlbyname.
+#if defined(CAP_BIT_CRC32) && defined(CAP_BIT_FEAT_PMULL)
+  static const absl::optional<uint64_t> caps =
+      ReadSysctlByName<uint64_t>("hw.optional.arm.caps");
+  if (caps.has_value()) {
+    constexpr uint64_t kCrc32AndPmullCaps =
+        (uint64_t{1} << CAP_BIT_CRC32) | (uint64_t{1} << CAP_BIT_FEAT_PMULL);
+    return (*caps & kCrc32AndPmullCaps) == kCrc32AndPmullCaps;
+  }
+#endif
+
+  // https://developer.apple.com/documentation/kernel/1387446-sysctlbyname/determining_instruction_set_characteristics#3915619
+  static const absl::optional<int> armv8_crc32 =
+      ReadSysctlByName<int>("hw.optional.armv8_crc32");
+  if (armv8_crc32.value_or(0) == 0) {
+    return false;
+  }
+  // https://developer.apple.com/documentation/kernel/1387446-sysctlbyname/determining_instruction_set_characteristics#3918855
+  static const absl::optional<int> feat_pmull =
+      ReadSysctlByName<int>("hw.optional.arm.FEAT_PMULL");
+  if (feat_pmull.value_or(0) == 0) {
+    return false;
+  }
+  return true;
 }
 
 #else

data/third_party/abseil-cpp/absl/crc/internal/crc32_x86_arm_combined_simd.h

@@ -99,19 +99,12 @@ V128 V128_PMul10(const V128 l, const V128 r);
 // Produces a XOR operation of |l| and |r|.
 V128 V128_Xor(const V128 l, const V128 r);
 
-// Produces an AND operation of |l| and |r|.
-V128 V128_And(const V128 l, const V128 r);
-
 // Sets the lower half of a 128 bit register to the given 64-bit value and
 // zeroes the upper half.
 // dst[63:0] := |r|
 // dst[127:64] := |0|
 V128 V128_From64WithZeroFill(const uint64_t r);
 
-// Shift |l| right by |imm| bytes while shifting in zeros.
-template <int imm>
-V128 V128_ShiftRight(const V128 l);
-
 // Extracts a 32-bit integer from |l|, selected with |imm|.
 template <int imm>
 int V128_Extract32(const V128 l);
@@ -170,17 +163,10 @@ inline V128 V128_PMul10(const V128 l, const V128 r) {
 
 inline V128 V128_Xor(const V128 l, const V128 r) { return _mm_xor_si128(l, r); }
 
-inline V128 V128_And(const V128 l, const V128 r) { return _mm_and_si128(l, r); }
-
 inline V128 V128_From64WithZeroFill(const uint64_t r) {
   return _mm_set_epi64x(static_cast<int64_t>(0), static_cast<int64_t>(r));
 }
 
-template <int imm>
-inline V128 V128_ShiftRight(const V128 l) {
-  return _mm_srli_si128(l, imm);
-}
-
 template <int imm>
 inline int V128_Extract32(const V128 l) {
   return _mm_extract_epi32(l, imm);
@@ -261,20 +247,12 @@ inline V128 V128_PMul10(const V128 l, const V128 r) {
 
 inline V128 V128_Xor(const V128 l, const V128 r) { return veorq_u64(l, r); }
 
-inline V128 V128_And(const V128 l, const V128 r) { return vandq_u64(l, r); }
-
 inline V128 V128_From64WithZeroFill(const uint64_t r){
   constexpr uint64x2_t kZero = {0, 0};
   return vsetq_lane_u64(r, kZero, 0);
 }
 
 
-template <int imm>
-inline V128 V128_ShiftRight(const V128 l) {
-  return vreinterpretq_u64_s8(
-      vextq_s8(vreinterpretq_s8_u64(l), vdupq_n_s8(0), imm));
-}
-
 template <int imm>
 inline int V128_Extract32(const V128 l) {
   return vgetq_lane_s32(vreinterpretq_s32_u64(l), imm);

data/third_party/abseil-cpp/absl/crc/internal/crc_x86_arm_combined.cc

@@ -64,27 +64,27 @@ class CRC32AcceleratedX86ARMCombined : public CRC32 {
 constexpr size_t kSmallCutoff = 256;
 constexpr size_t kMediumCutoff = 2048;
 
-#define ABSL_INTERNAL_STEP1(crc)                      \
+#define ABSL_INTERNAL_STEP1(crc, p)                   \
   do {                                                \
     crc = CRC32_u8(static_cast<uint32_t>(crc), *p++); \
   } while (0)
-#define ABSL_INTERNAL_STEP2(crc)                                               \
+#define ABSL_INTERNAL_STEP2(crc, p)                                            \
   do {                                                                         \
     crc =                                                                      \
         CRC32_u16(static_cast<uint32_t>(crc), absl::little_endian::Load16(p)); \
     p += 2;                                                                    \
   } while (0)
-#define ABSL_INTERNAL_STEP4(crc)                                               \
+#define ABSL_INTERNAL_STEP4(crc, p)                                            \
   do {                                                                         \
     crc =                                                                      \
         CRC32_u32(static_cast<uint32_t>(crc), absl::little_endian::Load32(p)); \
     p += 4;                                                                    \
   } while (0)
-#define ABSL_INTERNAL_STEP8(crc, data)                  \
-  do {                                                  \
-    crc = CRC32_u64(static_cast<uint32_t>(crc),         \
-                    absl::little_endian::Load64(data)); \
-    data += 8;                                          \
+#define ABSL_INTERNAL_STEP8(crc, p)                                            \
+  do {                                                                         \
+    crc =                                                                      \
+        CRC32_u64(static_cast<uint32_t>(crc), absl::little_endian::Load64(p)); \
+    p += 8;                                                                    \
   } while (0)
 #define ABSL_INTERNAL_STEP8BY2(crc0, crc1, p0, p1) \
   do {                                             \
@@ -221,7 +221,8 @@ class CRC32AcceleratedX86ARMCombinedMultipleStreamsBase
   // We are applying it to CRC32C polynomial.
   ABSL_ATTRIBUTE_ALWAYS_INLINE void Process64BytesPclmul(
       const uint8_t* p, V128* partialCRC) const {
-    V128 loopMultiplicands = V128_Load(reinterpret_cast<const V128*>(k1k2));
+    V128 loopMultiplicands =
+        V128_Load(reinterpret_cast<const V128*>(kFoldAcross512Bits));
 
     V128 partialCRC1 = partialCRC[0];
     V128 partialCRC2 = partialCRC[1];
@@ -265,53 +266,33 @@ class CRC32AcceleratedX86ARMCombinedMultipleStreamsBase
 
     // Combine 4 vectors of partial crc into a single vector.
     V128 reductionMultiplicands =
-        V128_Load(reinterpret_cast<const V128*>(k5k6));
+        V128_Load(reinterpret_cast<const V128*>(kFoldAcross256Bits));
 
     V128 low = V128_PMulLow(reductionMultiplicands, partialCRC1);
     V128 high = V128_PMulHi(reductionMultiplicands, partialCRC1);
 
     partialCRC1 = V128_Xor(low, high);
-    partialCRC1 = V128_Xor(partialCRC1, partialCRC2);
+    partialCRC1 = V128_Xor(partialCRC1, partialCRC3);
 
-    low = V128_PMulLow(reductionMultiplicands, partialCRC3);
-    high = V128_PMulHi(reductionMultiplicands, partialCRC3);
+    low = V128_PMulLow(reductionMultiplicands, partialCRC2);
+    high = V128_PMulHi(reductionMultiplicands, partialCRC2);
 
-    partialCRC3 = V128_Xor(low, high);
-    partialCRC3 = V128_Xor(partialCRC3, partialCRC4);
+    partialCRC2 = V128_Xor(low, high);
+    partialCRC2 = V128_Xor(partialCRC2, partialCRC4);
 
-    reductionMultiplicands = V128_Load(reinterpret_cast<const V128*>(k3k4));
+    reductionMultiplicands =
+        V128_Load(reinterpret_cast<const V128*>(kFoldAcross128Bits));
 
     low = V128_PMulLow(reductionMultiplicands, partialCRC1);
     high = V128_PMulHi(reductionMultiplicands, partialCRC1);
     V128 fullCRC = V128_Xor(low, high);
-    fullCRC = V128_Xor(fullCRC, partialCRC3);
+    fullCRC = V128_Xor(fullCRC, partialCRC2);
 
     // Reduce fullCRC into scalar value.
-    reductionMultiplicands = V128_Load(reinterpret_cast<const V128*>(k5k6));
-
-    V128 mask = V128_Load(reinterpret_cast<const V128*>(kMask));
-
-    V128 tmp = V128_PMul01(reductionMultiplicands, fullCRC);
-    fullCRC = V128_ShiftRight<8>(fullCRC);
-    fullCRC = V128_Xor(fullCRC, tmp);
-
-    reductionMultiplicands = V128_Load(reinterpret_cast<const V128*>(k7k0));
-
-    tmp = V128_ShiftRight<4>(fullCRC);
-    fullCRC = V128_And(fullCRC, mask);
-    fullCRC = V128_PMulLow(reductionMultiplicands, fullCRC);
-    fullCRC = V128_Xor(tmp, fullCRC);
-
-    reductionMultiplicands = V128_Load(reinterpret_cast<const V128*>(kPoly));
-
-    tmp = V128_And(fullCRC, mask);
-    tmp = V128_PMul01(reductionMultiplicands, tmp);
-    tmp = V128_And(tmp, mask);
-    tmp = V128_PMulLow(reductionMultiplicands, tmp);
-
-    fullCRC = V128_Xor(tmp, fullCRC);
-
-    return static_cast<uint64_t>(V128_Extract32<1>(fullCRC));
+    uint32_t crc = 0;
+    crc = CRC32_u64(crc, V128_Extract64<0>(fullCRC));
+    crc = CRC32_u64(crc, V128_Extract64<1>(fullCRC));
+    return crc;
   }
 
   // Update crc with 64 bytes of data from p.
@@ -325,15 +306,23 @@ class CRC32AcceleratedX86ARMCombinedMultipleStreamsBase
     return crc;
   }
 
-  // Generated by crc32c_x86_test --crc32c_generate_constants=true
-  // and verified against constants in linux kernel for S390:
-  // https://github.com/torvalds/linux/blob/master/arch/s390/crypto/crc32le-vx.S
-  alignas(16) static constexpr uint64_t k1k2[2] = {0x0740eef02, 0x09e4addf8};
-  alignas(16) static constexpr uint64_t k3k4[2] = {0x1384aa63a, 0x0ba4fc28e};
-  alignas(16) static constexpr uint64_t k5k6[2] = {0x0f20c0dfe, 0x14cd00bd6};
-  alignas(16) static constexpr uint64_t k7k0[2] = {0x0dd45aab8, 0x000000000};
-  alignas(16) static constexpr uint64_t kPoly[2] = {0x105ec76f0, 0x0dea713f1};
-  alignas(16) static constexpr uint32_t kMask[4] = {~0u, 0u, ~0u, 0u};
+  // Constants generated by './scripts/gen-crc-consts.py x86_pclmul
+  // crc32_lsb_0x82f63b78' from the Linux kernel.
+  alignas(16) static constexpr uint64_t kFoldAcross512Bits[2] = {
+      // (x^543 mod G) * x^32
+      0x00000000740eef02,
+      // (x^479 mod G) * x^32
+      0x000000009e4addf8};
+  alignas(16) static constexpr uint64_t kFoldAcross256Bits[2] = {
+      // (x^287 mod G) * x^32
+      0x000000003da6d0cb,
+      // (x^223 mod G) * x^32
+      0x00000000ba4fc28e};
+  alignas(16) static constexpr uint64_t kFoldAcross128Bits[2] = {
+      // (x^159 mod G) * x^32
+      0x00000000f20c0dfe,
+      // (x^95 mod G) * x^32
+      0x00000000493c7d27};
 
   // Medium runs of bytes are broken into groups of kGroupsSmall blocks of same
   // size. Each group is CRCed in parallel then combined at the end of the
@@ -345,24 +334,6 @@ class CRC32AcceleratedX86ARMCombinedMultipleStreamsBase
   static constexpr size_t kMaxStreams = 3;
 };
 
-#ifdef ABSL_INTERNAL_NEED_REDUNDANT_CONSTEXPR_DECL
-alignas(16) constexpr uint64_t
-    CRC32AcceleratedX86ARMCombinedMultipleStreamsBase::k1k2[2];
-alignas(16) constexpr uint64_t
-    CRC32AcceleratedX86ARMCombinedMultipleStreamsBase::k3k4[2];
-alignas(16) constexpr uint64_t
-    CRC32AcceleratedX86ARMCombinedMultipleStreamsBase::k5k6[2];
-alignas(16) constexpr uint64_t
-    CRC32AcceleratedX86ARMCombinedMultipleStreamsBase::k7k0[2];
-alignas(16) constexpr uint64_t
-    CRC32AcceleratedX86ARMCombinedMultipleStreamsBase::kPoly[2];
-alignas(16) constexpr uint32_t
-    CRC32AcceleratedX86ARMCombinedMultipleStreamsBase::kMask[4];
-constexpr size_t
-    CRC32AcceleratedX86ARMCombinedMultipleStreamsBase::kGroupsSmall;
-constexpr size_t CRC32AcceleratedX86ARMCombinedMultipleStreamsBase::kMaxStreams;
-#endif  // ABSL_INTERNAL_NEED_REDUNDANT_CONSTEXPR_DECL
-
 template <size_t num_crc_streams, size_t num_pclmul_streams,
           CutoffStrategy strategy>
 class CRC32AcceleratedX86ARMCombinedMultipleStreams
@@ -384,15 +355,15 @@ class CRC32AcceleratedX86ARMCombinedMultipleStreams
       length &= ~size_t{8};
     }
     if (length & 4) {
-      ABSL_INTERNAL_STEP4(l);
+      ABSL_INTERNAL_STEP4(l, p);
       length &= ~size_t{4};
     }
     if (length & 2) {
-      ABSL_INTERNAL_STEP2(l);
+      ABSL_INTERNAL_STEP2(l, p);
       length &= ~size_t{2};
     }
     if (length & 1) {
-      ABSL_INTERNAL_STEP1(l);
+      ABSL_INTERNAL_STEP1(l, p);
       length &= ~size_t{1};
     }
     if (length == 0) {
@@ -478,7 +449,7 @@ class CRC32AcceleratedX86ARMCombinedMultipleStreams
       const uint8_t* x = RoundUp<8>(p);
       // Process bytes until p is 8-byte aligned, if that isn't past the end.
       while (p != x) {
-        ABSL_INTERNAL_STEP1(l);
+        ABSL_INTERNAL_STEP1(l, p);
       }
 
       size_t bs = static_cast<size_t>(e - p) /
@@ -597,7 +568,7 @@ class CRC32AcceleratedX86ARMCombinedMultipleStreams
     }
     // Process the last few bytes
     while (p != e) {
-      ABSL_INTERNAL_STEP1(l);
+      ABSL_INTERNAL_STEP1(l, p);
     }
 
 #undef ABSL_INTERNAL_STEP8BY3

data/third_party/abseil-cpp/absl/crc/internal/non_temporal_memcpy.h

@@ -111,20 +111,31 @@ inline void *non_temporal_store_memcpy(void *__restrict dst,
 #endif  // __SSE3__ || __aarch64__ || (_MSC_VER && __AVX__)
 }
 
+// We try to force non_temporal_store_memcpy_avx to use AVX instructions
+// so that we can select it at runtime when AVX is available.
+// Clang on Windows has gnu::target but does not make AVX types like __m256i
+// available when trying to force specific functions to use AVX compiles.
+#if ABSL_HAVE_CPP_ATTRIBUTE(gnu::target) && !defined(_MSC_VER) && \
+    (defined(__x86_64__) || defined(__i386__))
+#define ABSL_INTERNAL_CAN_FORCE_AVX 1
+#endif
+
 // If the objects overlap, the behavior is undefined. Uses regular memcpy
 // instead of non-temporal memcpy if the required CPU intrinsics are unavailable
 // at compile time.
-#if ABSL_HAVE_CPP_ATTRIBUTE(gnu::target) && \
-    (defined(__x86_64__) || defined(__i386__))
+#ifdef ABSL_INTERNAL_CAN_FORCE_AVX
 [[gnu::target("avx")]]
 #endif
 inline void *non_temporal_store_memcpy_avx(void *__restrict dst,
                                            const void *__restrict src,
                                            size_t len) {
-  // This function requires AVX. For clang and gcc we compile it with AVX even
-  // if the translation unit isn't built with AVX support. This works because we
-  // only select this implementation at runtime if the CPU supports AVX.
-#if defined(__SSE3__) || (defined(_MSC_VER) && defined(__AVX__))
+  // This function requires AVX. If possible we compile it with AVX even if the
+  // translation unit isn't built with AVX support. This works because we only
+  // select this implementation at runtime if the CPU supports AVX.
+  // MSVC AVX support implies SSE3 support.
+#if ((defined(__AVX__) || defined(ABSL_INTERNAL_CAN_FORCE_AVX)) && \
+     defined(__SSE3__)) ||                                         \
+    (defined(_MSC_VER) && defined(__AVX__))
   uint8_t *d = reinterpret_cast<uint8_t *>(dst);
   const uint8_t *s = reinterpret_cast<const uint8_t *>(src);
 
@@ -170,10 +181,13 @@ inline void *non_temporal_store_memcpy_avx(void *__restrict dst,
   }
   return dst;
 #else
+  // Fallback to regular memcpy so that this function compiles.
   return memcpy(dst, src, len);
-#endif  // __SSE3__ || (_MSC_VER && __AVX__)
+#endif
 }
 
+#undef ABSL_INTERNAL_CAN_FORCE_AVX
+
 }  // namespace crc_internal
 ABSL_NAMESPACE_END
 }  // namespace absl

data/third_party/abseil-cpp/absl/debugging/internal/addresses.h

@@ -0,0 +1,57 @@
+// Copyright 2025 The Abseil Authors
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     https://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef ABSL_DEBUGGING_INTERNAL_ADDRESSES_H_
+#define ABSL_DEBUGGING_INTERNAL_ADDRESSES_H_
+
+#include <stdint.h>
+
+#include "absl/base/config.h"
+
+namespace absl {
+ABSL_NAMESPACE_BEGIN
+namespace debugging_internal {
+
+// Removes any metadata (tag bits) from the given pointer, converting it into a
+// user-readable address.
+inline uintptr_t StripPointerMetadata(uintptr_t ptr) {
+#if defined(__aarch64__)
+  // When PAC-RET (-mbranch-protection=pac-ret) is enabled, return addresses
+  // stored on the stack will be signed, which means that pointer bits outside
+  // of the virtual address range are potentially set. Since the stacktrace code
+  // is expected to return normal code pointers, this function clears those
+  // bits.
+  register uintptr_t x30 __asm__("x30") = ptr;
+  // The normal instruction for clearing PAC bits is XPACI, but for
+  // compatibility with ARM platforms that do not support pointer
+  // authentication, we use the hint space instruction XPACLRI instead. Hint
+  // space instructions behave as NOPs on unsupported platforms.
+#define ABSL_XPACLRI_HINT "hint #0x7;"
+  asm(ABSL_XPACLRI_HINT : "+r"(x30));  // asm("xpaclri" : "+r"(x30));
+#undef ABSL_XPACLRI_HINT
+  return x30;
+#else
+  return ptr;
+#endif
+}
+
+inline uintptr_t StripPointerMetadata(void* ptr) {
+  return StripPointerMetadata(reinterpret_cast<uintptr_t>(ptr));
+}
+
+}  // namespace debugging_internal
+ABSL_NAMESPACE_END
+}  // namespace absl
+
+#endif  // ABSL_DEBUGGING_INTERNAL_ADDRESSES_H_

data/third_party/abseil-cpp/absl/debugging/internal/decode_rust_punycode.cc

@@ -172,7 +172,7 @@ bool ScanNextDelta(const char*& punycode_begin, const char* const punycode_end,
 
 }  // namespace
 
-absl::Nullable<char*> DecodeRustPunycode(DecodeRustPunycodeOptions options) {
+char* absl_nullable DecodeRustPunycode(DecodeRustPunycodeOptions options) {
   const char* punycode_begin = options.punycode_begin;
   const char* const punycode_end = options.punycode_end;
   char* const out_begin = options.out_begin;

data/third_party/abseil-cpp/absl/debugging/internal/decode_rust_punycode.h

@@ -23,10 +23,10 @@ ABSL_NAMESPACE_BEGIN
 namespace debugging_internal {
 
 struct DecodeRustPunycodeOptions {
-  const char* punycode_begin;
-  const char* punycode_end;
-  char* out_begin;
-  char* out_end;
+  const char* absl_nonnull punycode_begin;
+  const char* absl_nonnull punycode_end;
+  char* absl_nonnull out_begin;
+  char* absl_nonnull out_end;
 };
 
 // Given Rust Punycode in `punycode_begin .. punycode_end`, writes the
@@ -46,7 +46,7 @@ struct DecodeRustPunycodeOptions {
 // DecodeRustPunycode is async-signal-safe with bounded runtime and a small
 // stack footprint, making it suitable for use in demangling Rust symbol names
 // from a signal handler.
-absl::Nullable<char*> DecodeRustPunycode(DecodeRustPunycodeOptions options);
+char* absl_nullable DecodeRustPunycode(DecodeRustPunycodeOptions options);
 
 }  // namespace debugging_internal
 ABSL_NAMESPACE_END