gdbflasher 1.0.0
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- checksums.yaml +7 -0
- data/.gitignore +17 -0
- data/Gemfile +3 -0
- data/LICENSE +22 -0
- data/README.md +29 -0
- data/Rakefile +2 -0
- data/bin/gdbflasher +76 -0
- data/gdbflasher.gemspec +19 -0
- data/helper_sources/Makefile +22 -0
- data/helper_sources/stm32f10xx_hd.S +115 -0
- data/helper_sources/stm32f10xx_hd.lds +25 -0
- data/helper_sources/stm32f10xx_md.S +115 -0
- data/helper_sources/stm32f10xx_md.lds +25 -0
- data/helper_sources/stm32f4xx.S +109 -0
- data/helper_sources/stm32f4xx.lds +25 -0
- data/helper_sources/stm32l1xx.S +101 -0
- data/helper_sources/stm32l1xx.lds +25 -0
- data/helpers/stm32f10xx_hd.hex +12 -0
- data/helpers/stm32f10xx_hd.sym +7 -0
- data/helpers/stm32f10xx_md.hex +12 -0
- data/helpers/stm32f10xx_md.sym +7 -0
- data/helpers/stm32f4xx.hex +13 -0
- data/helpers/stm32f4xx.sym +7 -0
- data/helpers/stm32l1xx.hex +12 -0
- data/helpers/stm32l1xx.sym +7 -0
- data/lib/gdbflasher/cortexm.rb +19 -0
- data/lib/gdbflasher/ihex.rb +189 -0
- data/lib/gdbflasher/mcu/stm32f10xx_hd.rb +17 -0
- data/lib/gdbflasher/mcu/stm32f10xx_md.rb +17 -0
- data/lib/gdbflasher/mcu/stm32f4xx.rb +25 -0
- data/lib/gdbflasher/mcu/stm32l1xx.rb +21 -0
- data/lib/gdbflasher/mcu.rb +208 -0
- data/lib/gdbflasher/server_connection.rb +334 -0
- data/lib/gdbflasher/version.rb +3 -0
- data/lib/gdbflasher.rb +21 -0
- metadata +93 -0
checksums.yaml
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---
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SHA1:
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metadata.gz: 8c61751a3541bf40a9abdd0d999dc16aa3d27ae4
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data.tar.gz: 5036ff6f4f7801d322f10d9887995c9b89ae7d36
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SHA512:
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metadata.gz: b8583513a0bc51c34277742bd786106e1b33c26aba4b80bba0a2c2e4c4161ffb27613184ccdb81112565db273fda69b6516a3e2d46914259b2ea8558ed370761
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data.tar.gz: e2c9f0b1434b6c4ce6cc6c587b97d1373da97e4cc76fa15412d483be363a40266ec85d03721c46191ca261071ee6803c017e1d180225eb2cc2b812b7047aa0d7
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data/.gitignore
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data/Gemfile
ADDED
data/LICENSE
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Copyright (c) 2012 Sergey Gridasov
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MIT License
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Permission is hereby granted, free of charge, to any person obtaining
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a copy of this software and associated documentation files (the
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"Software"), to deal in the Software without restriction, including
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without limitation the rights to use, copy, modify, merge, publish,
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distribute, sublicense, and/or sell copies of the Software, and to
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permit persons to whom the Software is furnished to do so, subject to
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the following conditions:
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The above copyright notice and this permission notice shall be
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included in all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
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LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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data/README.md
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# Gdbflasher
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TODO: Write a gem description
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## Installation
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Add this line to your application's Gemfile:
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gem 'gdbflasher'
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And then execute:
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$ bundle
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Or install it yourself as:
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$ gem install gdbflasher
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## Usage
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TODO: Write usage instructions here
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## Contributing
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1. Fork it
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2. Create your feature branch (`git checkout -b my-new-feature`)
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3. Commit your changes (`git commit -am 'Added some feature'`)
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4. Push to the branch (`git push origin my-new-feature`)
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5. Create new Pull Request
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data/Rakefile
ADDED
data/bin/gdbflasher
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#!/usr/bin/env ruby
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require "rubygems"
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require "bundler/setup"
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require "trollop"
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require "gdbflasher"
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options = Trollop::options do
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version "gdbflasher #{GdbFlasher::VERSION} (c) 2012 Sergey Gridasov"
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banner <<-EOB
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gdbflasher is a gdbserver-compatible tool for loading firmware into ARM MCUs.
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Usage: gdbserver [options] <IHEX firmware>
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where [options] are:
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EOB
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opt :server, "GDB server address", :type => :string, :default => "127.0.0.1:2331"
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opt :mcu, "MCU name. Try '--mcu=list' to get list of supported controllers.", :required => true, :type => :string
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opt :start, "Start application after programming"
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end
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if options[:mcu] == "list"
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GdbFlasher::MCU_CLASSES.each do |sym, klass|
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puts sym.to_s
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end
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exit 0
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elsif GdbFlasher::MCU_CLASSES[options[:mcu].intern].nil?
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warn "MCU #{options[:mcu]} isn't supported."
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exit 0
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elsif ARGV.count == 0
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warn "Firmware file must be specified"
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exit 1
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elsif ARGV.count > 1
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warn "Only one firmware file must be specified"
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exit 1
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end
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begin
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firmware = File.open ARGV[0], "r"
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rescue Exception => e
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warn e
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exit 1
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end
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ihex = GdbFlasher::IHex.load firmware
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firmware.close
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puts "Loaded #{ARGV[0]}:"
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ihex.segments.each do |segment|
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printf " -> %08X - %08X\n", segment.base, segment.base + segment.size - 1
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end
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connection = GdbFlasher::ServerConnection.new
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connection.connect options[:server]
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mcu = GdbFlasher::MCU_CLASSES[options[:mcu].intern].new connection
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success = mcu.program_ihex ihex
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mcu.finalize
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if options[:start] && success
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puts "Starting target application"
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connection.reset
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end
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connection.close
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if !success
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exit 1
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end
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data/gdbflasher.gemspec
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# -*- encoding: utf-8 -*-
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require File.expand_path('../lib/gdbflasher/version', __FILE__)
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Gem::Specification.new do |gem|
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gem.authors = ["Sergey Gridasov"]
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gem.email = ["grindars@gmail.com"]
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gem.description = %q{gdbflasher is a gdbserver-compatible tool for loading firmware into ARM MCUs.}
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gem.summary = %q{Retargetable flasher for ARM microcontrollers}
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gem.homepage = "https://github.com/grindars/gdbflasher"
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gem.files = `git ls-files`.split($\)
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gem.executables = gem.files.grep(%r{^bin/}).map{ |f| File.basename(f) }
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gem.test_files = gem.files.grep(%r{^(test|spec|features)/})
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gem.name = "gdbflasher"
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gem.require_paths = ["lib"]
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gem.version = GdbFlasher::VERSION
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gem.add_dependency 'trollop'
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end
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MCUS = stm32f4xx stm32l1xx stm32f10xx_hd stm32f10xx_md
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HELPERS = $(addprefix ../helpers/,$(addsuffix .hex,${MCUS}) $(addsuffix .sym,${MCUS}))
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ELVES = $(addsuffix .elf,${MCUS})
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OBJECTS = $(addsuffix .o,${MCUS})
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all: ${HELPERS}
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clean:
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rm -f ${HELPERS} ${ELVES} ${OBJECTS}
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../helpers/%.sym: %.elf
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${CROSS_COMPILE}nm -n $< | awk '$$2 == "T" || $$2 == "B" || $$2 == "A" { print $$1 " " $$3 }' > $@
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../helpers/%.hex: %.elf
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${CROSS_COMPILE}objcopy -O ihex $< $@
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%.elf: %.lds %.o
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${CROSS_COMPILE}ld -o $@ -T$^
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%.o: %.S
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${CROSS_COMPILE}as -o $@ $<
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.set PAGE_SIZE, 2048
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.set FPEC, 0x40022000
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.set FLASH_ACR, 0
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.set FLASH_KEYR, 4
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.set FLASH_OPTKEYR, 8
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.set FLASH_SR, 12
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.set FLASH_CR, 16
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.set FLASH_AR, 20
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.set FLASH_SR_EOP, 1 << 5
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.set FLASH_SR_WRPRTERR, 1 << 4
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.set FLASH_SR_PGERR, 1 << 2
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.set FLASH_SR_BSY, 1 << 0
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.set FLASH_CR_EOPIE, 1 << 12
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.set FLASH_CR_ERRIE, 1 << 10
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.set FLASH_CR_OPTWRE, 1 << 9
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.set FLASH_CR_LOCK, 1 << 7
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.set FLASH_CR_STRT, 1 << 6
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.set FLASH_CR_OPTER, 1 << 5
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.set FLASH_CR_OPTPG, 1 << 4
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.set FLASH_CR_MER, 1 << 2
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.set FLASH_CR_PER, 1 << 1
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.set FLASH_CR_PG, 1 << 0
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.globl trap
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.globl initialize
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.globl finalize
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.globl erase
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.globl program
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.globl page_buffer
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.globl PAGE_SIZE
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.arch armv7-m
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.syntax unified
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.thumb
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.text
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trap:
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nop
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initialize:
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ldr R7, =FPEC
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ldr R0, =0x45670123
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str R0, [R7, #FLASH_KEYR]
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ldr R0, =0xCDEF89AB
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str R0, [R7, #FLASH_KEYR]
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+
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bx LR
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finalize:
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mov R1, #FLASH_CR_LOCK
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str R1, [R7, #FLASH_CR]
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+
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bx LR
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60
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erase:
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61
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ldr R1, [R7, #FLASH_CR]
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62
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orr R1, #FLASH_CR_PER
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63
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str R1, [R7, #FLASH_CR]
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64
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str R0, [R7, #FLASH_AR]
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orr R1, #FLASH_CR_STRT
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str R1, [R7, #FLASH_CR]
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67
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+
|
68
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1: ldr R2, [R7, #FLASH_SR]
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69
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tst R2, #FLASH_SR_BSY
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bne 1b
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+
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72
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bic R1, #FLASH_CR_PER | FLASH_CR_STRT
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73
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str R1, [R7, #FLASH_CR]
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+
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75
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and R0, R2, #FLASH_SR_WRPRTERR | FLASH_SR_PGERR
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76
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str R2, [R7, #FLASH_SR]
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77
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+
|
78
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bx LR
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79
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+
|
80
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program:
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81
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ldr R1, [R7, #FLASH_CR]
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82
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orr R1, #FLASH_CR_PG
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83
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str R1, [R7, #FLASH_CR]
|
84
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+
|
85
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+
ldr R4, =page_buffer
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86
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mov R2, #0
|
87
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+
|
88
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+
1:
|
89
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+
ldrh R3, [R4, R2]
|
90
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strh R3, [R0, R2]
|
91
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+
|
92
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2: ldr R1, [R7, #FLASH_SR]
|
93
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tst R1, #FLASH_SR_BSY
|
94
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bne 2b
|
95
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+
|
96
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+
str R1, [R7, #FLASH_SR]
|
97
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ands R1, R1, #FLASH_SR_WRPRTERR | FLASH_SR_PGERR
|
98
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+
bne 1f
|
99
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+
|
100
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+
add R2, #2
|
101
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+
cmp R2, #PAGE_SIZE
|
102
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+
blo 1b
|
103
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1:
|
104
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+
|
105
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+
ldr R2, [R7, #FLASH_CR]
|
106
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bic R2, #FLASH_CR_PG
|
107
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str R2, [R7, #FLASH_CR]
|
108
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+
|
109
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+
mov R0, R1
|
110
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+
bx LR
|
111
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+
|
112
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+
.bss
|
113
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page_buffer:
|
114
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.fill PAGE_SIZE, 1
|
115
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+
.size page_buffer, . - page_buffer
|
@@ -0,0 +1,25 @@
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OUTPUT_FORMAT(elf32-littlearm)
|
2
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3
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MEMORY
|
4
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{
|
5
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sram : ORIGIN = 0x20000000, LENGTH = 4K
|
6
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+
}
|
7
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+
|
8
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SECTIONS
|
9
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{
|
10
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.text : {
|
11
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+
*(.text)
|
12
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+
|
13
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+
. = ALIGN(4);
|
14
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+
|
15
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+
*(.rodata)
|
16
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+
} > sram
|
17
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+
|
18
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+
. = ALIGN(4);
|
19
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+
|
20
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+
.bss : {
|
21
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+
*(.bss)
|
22
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+
} > sram
|
23
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+
|
24
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+
. = ALIGN(4);
|
25
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+
}
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@@ -0,0 +1,115 @@
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1
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.set PAGE_SIZE, 1024
|
2
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+
|
3
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.set FPEC, 0x40022000
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4
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+
|
5
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.set FLASH_ACR, 0
|
6
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.set FLASH_KEYR, 4
|
7
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+
.set FLASH_OPTKEYR, 8
|
8
|
+
.set FLASH_SR, 12
|
9
|
+
.set FLASH_CR, 16
|
10
|
+
.set FLASH_AR, 20
|
11
|
+
|
12
|
+
.set FLASH_SR_EOP, 1 << 5
|
13
|
+
.set FLASH_SR_WRPRTERR, 1 << 4
|
14
|
+
.set FLASH_SR_PGERR, 1 << 2
|
15
|
+
.set FLASH_SR_BSY, 1 << 0
|
16
|
+
|
17
|
+
.set FLASH_CR_EOPIE, 1 << 12
|
18
|
+
.set FLASH_CR_ERRIE, 1 << 10
|
19
|
+
.set FLASH_CR_OPTWRE, 1 << 9
|
20
|
+
.set FLASH_CR_LOCK, 1 << 7
|
21
|
+
.set FLASH_CR_STRT, 1 << 6
|
22
|
+
.set FLASH_CR_OPTER, 1 << 5
|
23
|
+
.set FLASH_CR_OPTPG, 1 << 4
|
24
|
+
.set FLASH_CR_MER, 1 << 2
|
25
|
+
.set FLASH_CR_PER, 1 << 1
|
26
|
+
.set FLASH_CR_PG, 1 << 0
|
27
|
+
|
28
|
+
.globl trap
|
29
|
+
.globl initialize
|
30
|
+
.globl finalize
|
31
|
+
.globl erase
|
32
|
+
.globl program
|
33
|
+
.globl page_buffer
|
34
|
+
.globl PAGE_SIZE
|
35
|
+
|
36
|
+
.arch armv7-m
|
37
|
+
.syntax unified
|
38
|
+
.thumb
|
39
|
+
.text
|
40
|
+
|
41
|
+
trap:
|
42
|
+
nop
|
43
|
+
|
44
|
+
initialize:
|
45
|
+
ldr R7, =FPEC
|
46
|
+
|
47
|
+
ldr R0, =0x45670123
|
48
|
+
str R0, [R7, #FLASH_KEYR]
|
49
|
+
ldr R0, =0xCDEF89AB
|
50
|
+
str R0, [R7, #FLASH_KEYR]
|
51
|
+
|
52
|
+
bx LR
|
53
|
+
|
54
|
+
finalize:
|
55
|
+
mov R1, #FLASH_CR_LOCK
|
56
|
+
str R1, [R7, #FLASH_CR]
|
57
|
+
|
58
|
+
bx LR
|
59
|
+
|
60
|
+
erase:
|
61
|
+
ldr R1, [R7, #FLASH_CR]
|
62
|
+
orr R1, #FLASH_CR_PER
|
63
|
+
str R1, [R7, #FLASH_CR]
|
64
|
+
str R0, [R7, #FLASH_AR]
|
65
|
+
orr R1, #FLASH_CR_STRT
|
66
|
+
str R1, [R7, #FLASH_CR]
|
67
|
+
|
68
|
+
1: ldr R2, [R7, #FLASH_SR]
|
69
|
+
tst R2, #FLASH_SR_BSY
|
70
|
+
bne 1b
|
71
|
+
|
72
|
+
bic R1, #FLASH_CR_PER | FLASH_CR_STRT
|
73
|
+
str R1, [R7, #FLASH_CR]
|
74
|
+
|
75
|
+
and R0, R2, #FLASH_SR_WRPRTERR | FLASH_SR_PGERR
|
76
|
+
str R2, [R7, #FLASH_SR]
|
77
|
+
|
78
|
+
bx LR
|
79
|
+
|
80
|
+
program:
|
81
|
+
ldr R1, [R7, #FLASH_CR]
|
82
|
+
orr R1, #FLASH_CR_PG
|
83
|
+
str R1, [R7, #FLASH_CR]
|
84
|
+
|
85
|
+
ldr R4, =page_buffer
|
86
|
+
mov R2, #0
|
87
|
+
|
88
|
+
1:
|
89
|
+
ldrh R3, [R4, R2]
|
90
|
+
strh R3, [R0, R2]
|
91
|
+
|
92
|
+
2: ldr R1, [R7, #FLASH_SR]
|
93
|
+
tst R1, #FLASH_SR_BSY
|
94
|
+
bne 2b
|
95
|
+
|
96
|
+
str R1, [R7, #FLASH_SR]
|
97
|
+
ands R1, R1, #FLASH_SR_WRPRTERR | FLASH_SR_PGERR
|
98
|
+
bne 1f
|
99
|
+
|
100
|
+
add R2, #2
|
101
|
+
cmp R2, #PAGE_SIZE
|
102
|
+
blo 1b
|
103
|
+
1:
|
104
|
+
|
105
|
+
ldr R2, [R7, #FLASH_CR]
|
106
|
+
bic R2, #FLASH_CR_PG
|
107
|
+
str R2, [R7, #FLASH_CR]
|
108
|
+
|
109
|
+
mov R0, R1
|
110
|
+
bx LR
|
111
|
+
|
112
|
+
.bss
|
113
|
+
page_buffer:
|
114
|
+
.fill PAGE_SIZE, 1
|
115
|
+
.size page_buffer, . - page_buffer
|
@@ -0,0 +1,25 @@
|
|
1
|
+
OUTPUT_FORMAT(elf32-littlearm)
|
2
|
+
|
3
|
+
MEMORY
|
4
|
+
{
|
5
|
+
sram : ORIGIN = 0x20000000, LENGTH = 4K
|
6
|
+
}
|
7
|
+
|
8
|
+
SECTIONS
|
9
|
+
{
|
10
|
+
.text : {
|
11
|
+
*(.text)
|
12
|
+
|
13
|
+
. = ALIGN(4);
|
14
|
+
|
15
|
+
*(.rodata)
|
16
|
+
} > sram
|
17
|
+
|
18
|
+
. = ALIGN(4);
|
19
|
+
|
20
|
+
.bss : {
|
21
|
+
*(.bss)
|
22
|
+
} > sram
|
23
|
+
|
24
|
+
. = ALIGN(4);
|
25
|
+
}
|
@@ -0,0 +1,109 @@
|
|
1
|
+
.set PAGE_SIZE, 16 * 1024
|
2
|
+
|
3
|
+
.set FLASH_BASE, 0x40023C00
|
4
|
+
|
5
|
+
.set FLASH_ACR, 0x00
|
6
|
+
.set FLASH_KEYR, 0x04
|
7
|
+
.set FLASH_OPTKEYR, 0x08
|
8
|
+
.set FLASH_SR, 0x0C
|
9
|
+
.set FLASH_CR, 0x10
|
10
|
+
.set FLASH_OPTCR, 0x14
|
11
|
+
|
12
|
+
.globl trap
|
13
|
+
.globl initialize
|
14
|
+
.globl finalize
|
15
|
+
.globl erase
|
16
|
+
.globl program
|
17
|
+
.globl page_buffer
|
18
|
+
.globl PAGE_SIZE
|
19
|
+
|
20
|
+
.arch armv7-m
|
21
|
+
.syntax unified
|
22
|
+
.thumb
|
23
|
+
.text
|
24
|
+
|
25
|
+
trap:
|
26
|
+
nop
|
27
|
+
|
28
|
+
initialize:
|
29
|
+
ldr R7, =FLASH_BASE
|
30
|
+
|
31
|
+
ldr R0, =0x45670123
|
32
|
+
str R0, [R7, #FLASH_KEYR]
|
33
|
+
ldr R0, =0xCDEF89AB
|
34
|
+
str R0, [R7, #FLASH_KEYR]
|
35
|
+
|
36
|
+
bx LR
|
37
|
+
|
38
|
+
finalize:
|
39
|
+
mov R0, #1 << 31
|
40
|
+
|
41
|
+
str R0, [R7, #FLASH_CR]
|
42
|
+
bx LR
|
43
|
+
|
44
|
+
erase:
|
45
|
+
ldr R1, [R7, #FLASH_SR]
|
46
|
+
tst R1, #1 << 16
|
47
|
+
bne erase
|
48
|
+
|
49
|
+
mov R1, #0xF0
|
50
|
+
str R1, [R7, #FLASH_SR]
|
51
|
+
|
52
|
+
ldr R2, =0x202
|
53
|
+
lsl R1, R0, #3
|
54
|
+
orr R1, R2
|
55
|
+
str R1, [R7, #FLASH_CR]
|
56
|
+
orr R1, #1 << 16
|
57
|
+
str R1, [R7, #FLASH_CR]
|
58
|
+
|
59
|
+
1:ldr R0, [R7, #FLASH_SR]
|
60
|
+
tst R0, #1 << 16
|
61
|
+
bne 1b
|
62
|
+
|
63
|
+
and R0, #0xF0
|
64
|
+
|
65
|
+
mov R1, #0
|
66
|
+
str R1, [R7, #FLASH_CR]
|
67
|
+
|
68
|
+
bx LR
|
69
|
+
|
70
|
+
program:
|
71
|
+
ldr R1, [R7, #FLASH_SR]
|
72
|
+
tst R1, #1 << 16
|
73
|
+
bne program
|
74
|
+
|
75
|
+
ldr R1, =0x201
|
76
|
+
str R1, [R7, #FLASH_CR]
|
77
|
+
|
78
|
+
mov R1, #0xF0
|
79
|
+
str R1, [R7, #FLASH_SR]
|
80
|
+
|
81
|
+
ldr R4, =page_buffer
|
82
|
+
mov R2, #0
|
83
|
+
|
84
|
+
1:
|
85
|
+
ldr R3, [R4, R2]
|
86
|
+
str R3, [R0, R2]
|
87
|
+
|
88
|
+
2:ldr R1, [R7, #FLASH_SR]
|
89
|
+
tst R1, #1 << 16
|
90
|
+
bne 2b
|
91
|
+
|
92
|
+
ands R1, #0xF0
|
93
|
+
bne 1f
|
94
|
+
|
95
|
+
add R2, #4
|
96
|
+
cmp R2, #PAGE_SIZE
|
97
|
+
blo 1b
|
98
|
+
|
99
|
+
1:
|
100
|
+
mov R0, R1
|
101
|
+
mov R1, #0
|
102
|
+
str R1, [R7, #FLASH_CR]
|
103
|
+
|
104
|
+
bx LR
|
105
|
+
|
106
|
+
.bss
|
107
|
+
page_buffer:
|
108
|
+
.fill PAGE_SIZE, 1
|
109
|
+
.size page_buffer, . - page_buffer
|
@@ -0,0 +1,25 @@
|
|
1
|
+
OUTPUT_FORMAT(elf32-littlearm)
|
2
|
+
|
3
|
+
MEMORY
|
4
|
+
{
|
5
|
+
sram : ORIGIN = 0x20000000, LENGTH = 192K
|
6
|
+
}
|
7
|
+
|
8
|
+
SECTIONS
|
9
|
+
{
|
10
|
+
.text : {
|
11
|
+
*(.text)
|
12
|
+
|
13
|
+
. = ALIGN(4);
|
14
|
+
|
15
|
+
*(.rodata)
|
16
|
+
} > sram
|
17
|
+
|
18
|
+
. = ALIGN(4);
|
19
|
+
|
20
|
+
.bss : {
|
21
|
+
*(.bss)
|
22
|
+
} > sram
|
23
|
+
|
24
|
+
. = ALIGN(4);
|
25
|
+
}
|