ffi-udis86 0.1.0

Sign up to get free protection for your applications and to get access to all the features.
@@ -0,0 +1,36 @@
1
+ require 'ffi'
2
+
3
+ module FFI
4
+ module UDis86
5
+ class OperandPointer < FFI::Struct
6
+
7
+ layout :segment, :uint16,
8
+ :offset, :uint32
9
+
10
+ #
11
+ # Returns the pointer segment.
12
+ #
13
+ # @return [Integer]
14
+ # The pointer segment.
15
+ #
16
+ def segment
17
+ self[:segment]
18
+ end
19
+
20
+ alias seg segment
21
+
22
+ #
23
+ # Returns the offset within the segment of the pointer.
24
+ #
25
+ # @return [Integer]
26
+ # The offset within the segment.
27
+ #
28
+ def offset
29
+ self[:offset]
30
+ end
31
+
32
+ alias off offset
33
+
34
+ end
35
+ end
36
+ end
@@ -0,0 +1,136 @@
1
+ require 'udis86/operand_pointer'
2
+
3
+ require 'ffi'
4
+
5
+ module FFI
6
+ module UDis86
7
+ class OperandValue < FFI::Union
8
+
9
+ layout :sbyte, :int8,
10
+ :ubyte, :uint8,
11
+ :sword, :int16,
12
+ :uword, :uint16,
13
+ :sdword, :int32,
14
+ :udword, :uint32,
15
+ :sqword, :int64,
16
+ :uqword, :uint64,
17
+ :ptr, OperandPointer
18
+
19
+ #
20
+ # The signed byte value of the operand.
21
+ #
22
+ # @return [Integer]
23
+ # The signed byte value.
24
+ #
25
+ def sbyte
26
+ self[:sbyte]
27
+ end
28
+
29
+ alias char sbyte
30
+ alias signed_byte sbyte
31
+
32
+ #
33
+ # The unsigned byte value of the operand.
34
+ #
35
+ # @return [Integer]
36
+ # The unsigned byte value.
37
+ #
38
+ def ubyte
39
+ self[:ubyte]
40
+ end
41
+
42
+ alias byte ubyte
43
+ alias unsigned_byte ubyte
44
+
45
+ #
46
+ # The signed word value of the operand.
47
+ #
48
+ # @return [Integer]
49
+ # The signed word value.
50
+ #
51
+ def sword
52
+ self[:sword]
53
+ end
54
+
55
+ alias signed_word sword
56
+
57
+ #
58
+ # The unsigned word value of the operand.
59
+ #
60
+ # @return [Integer]
61
+ # The unsigned word value.
62
+ #
63
+ def uword
64
+ self[:uword]
65
+ end
66
+
67
+ alias word uword
68
+ alias unsigned_word uword
69
+
70
+ #
71
+ # The signed double-word value of the operand.
72
+ #
73
+ # @return [Integer]
74
+ # The signed double-word value.
75
+ #
76
+ def sdword
77
+ self[:sdword]
78
+ end
79
+
80
+ alias signed_double_word sdword
81
+
82
+ #
83
+ # The unsigned double-word value of the operand.
84
+ #
85
+ # @return [Integer]
86
+ # The unsigned double-word value.
87
+ #
88
+ def udword
89
+ self[:udword]
90
+ end
91
+
92
+ alias double_word udword
93
+ alias unsigned_double_word udword
94
+
95
+ #
96
+ # The signed quad-word value of the operand.
97
+ #
98
+ # @return [Integer]
99
+ # The signed quad-word value.
100
+ #
101
+ def sqword
102
+ self[:sqword]
103
+ end
104
+
105
+ alias signed_quad_word sqword
106
+
107
+ #
108
+ # The unsigned quad-word value of the operand.
109
+ #
110
+ # @return [Integer]
111
+ # The unsigned quad-word value.
112
+ #
113
+ def uqword
114
+ self[:uqword]
115
+ end
116
+
117
+ alias quad_word uqword
118
+ alias unsigned_quad_word uqword
119
+
120
+ #
121
+ # The pointer value of the operand.
122
+ #
123
+ # @return [OperandPointer]
124
+ # The pointer value.
125
+ #
126
+ def ptr
127
+ self[:ptr]
128
+ end
129
+
130
+ alias pointer ptr
131
+
132
+ alias to_i signed_quad_word
133
+
134
+ end
135
+ end
136
+ end
@@ -0,0 +1,942 @@
1
+ require 'ffi'
2
+
3
+ module FFI
4
+ module UDis86
5
+ extend FFI::Library
6
+
7
+ typedef :uint, :size_t
8
+
9
+ # Disassembly modes
10
+ MODES = [
11
+ 16,
12
+ 32,
13
+ 64
14
+ ]
15
+
16
+ # Supported vendors
17
+ VENDORS = [:amd, :intel]
18
+
19
+ enum :ud_mnemonic_code, [
20
+ :ud_i3dnow,
21
+ :ud_iaaa,
22
+ :ud_iaad,
23
+ :ud_iaam,
24
+ :ud_iaas,
25
+ :ud_iadc,
26
+ :ud_iadd,
27
+ :ud_iaddpd,
28
+ :ud_iaddps,
29
+ :ud_iaddsd,
30
+ :ud_iaddss,
31
+ :ud_iaddsubpd,
32
+ :ud_iaddsubps,
33
+ :ud_iand,
34
+ :ud_iandpd,
35
+ :ud_iandps,
36
+ :ud_iandnpd,
37
+ :ud_iandnps,
38
+ :ud_iarpl,
39
+ :ud_imovsxd,
40
+ :ud_ibound,
41
+ :ud_ibsf,
42
+ :ud_ibsr,
43
+ :ud_ibswap,
44
+ :ud_ibt,
45
+ :ud_ibtc,
46
+ :ud_ibtr,
47
+ :ud_ibts,
48
+ :ud_icall,
49
+ :ud_icbw,
50
+ :ud_icwde,
51
+ :ud_icdqe,
52
+ :ud_iclc,
53
+ :ud_icld,
54
+ :ud_iclflush,
55
+ :ud_iclgi,
56
+ :ud_icli,
57
+ :ud_iclts,
58
+ :ud_icmc,
59
+ :ud_icmovo,
60
+ :ud_icmovno,
61
+ :ud_icmovb,
62
+ :ud_icmovae,
63
+ :ud_icmovz,
64
+ :ud_icmovnz,
65
+ :ud_icmovbe,
66
+ :ud_icmova,
67
+ :ud_icmovs,
68
+ :ud_icmovns,
69
+ :ud_icmovp,
70
+ :ud_icmovnp,
71
+ :ud_icmovl,
72
+ :ud_icmovge,
73
+ :ud_icmovle,
74
+ :ud_icmovg,
75
+ :ud_icmp,
76
+ :ud_icmppd,
77
+ :ud_icmpps,
78
+ :ud_icmpsb,
79
+ :ud_icmpsw,
80
+ :ud_icmpsd,
81
+ :ud_icmpsq,
82
+ :ud_icmpss,
83
+ :ud_icmpxchg,
84
+ :ud_icmpxchg8b,
85
+ :ud_icomisd,
86
+ :ud_icomiss,
87
+ :ud_icpuid,
88
+ :ud_icvtdq2pd,
89
+ :ud_icvtdq2ps,
90
+ :ud_icvtpd2dq,
91
+ :ud_icvtpd2pi,
92
+ :ud_icvtpd2ps,
93
+ :ud_icvtpi2ps,
94
+ :ud_icvtpi2pd,
95
+ :ud_icvtps2dq,
96
+ :ud_icvtps2pi,
97
+ :ud_icvtps2pd,
98
+ :ud_icvtsd2si,
99
+ :ud_icvtsd2ss,
100
+ :ud_icvtsi2ss,
101
+ :ud_icvtss2si,
102
+ :ud_icvtss2sd,
103
+ :ud_icvttpd2pi,
104
+ :ud_icvttpd2dq,
105
+ :ud_icvttps2dq,
106
+ :ud_icvttps2pi,
107
+ :ud_icvttsd2si,
108
+ :ud_icvtsi2sd,
109
+ :ud_icvttss2si,
110
+ :ud_icwd,
111
+ :ud_icdq,
112
+ :ud_icqo,
113
+ :ud_idaa,
114
+ :ud_idas,
115
+ :ud_idec,
116
+ :ud_idiv,
117
+ :ud_idivpd,
118
+ :ud_idivps,
119
+ :ud_idivsd,
120
+ :ud_idivss,
121
+ :ud_iemms,
122
+ :ud_ienter,
123
+ :ud_if2xm1,
124
+ :ud_ifabs,
125
+ :ud_ifadd,
126
+ :ud_ifaddp,
127
+ :ud_ifbld,
128
+ :ud_ifbstp,
129
+ :ud_ifchs,
130
+ :ud_ifclex,
131
+ :ud_ifcmovb,
132
+ :ud_ifcmove,
133
+ :ud_ifcmovbe,
134
+ :ud_ifcmovu,
135
+ :ud_ifcmovnb,
136
+ :ud_ifcmovne,
137
+ :ud_ifcmovnbe,
138
+ :ud_ifcmovnu,
139
+ :ud_ifucomi,
140
+ :ud_ifcom,
141
+ :ud_ifcom2,
142
+ :ud_ifcomp3,
143
+ :ud_ifcomi,
144
+ :ud_ifucomip,
145
+ :ud_ifcomip,
146
+ :ud_ifcomp,
147
+ :ud_ifcomp5,
148
+ :ud_ifcompp,
149
+ :ud_ifcos,
150
+ :ud_ifdecstp,
151
+ :ud_ifdiv,
152
+ :ud_ifdivp,
153
+ :ud_ifdivr,
154
+ :ud_ifdivrp,
155
+ :ud_ifemms,
156
+ :ud_iffree,
157
+ :ud_iffreep,
158
+ :ud_ificom,
159
+ :ud_ificomp,
160
+ :ud_ifild,
161
+ :ud_ifncstp,
162
+ :ud_ifninit,
163
+ :ud_ifiadd,
164
+ :ud_ifidivr,
165
+ :ud_ifidiv,
166
+ :ud_ifisub,
167
+ :ud_ifisubr,
168
+ :ud_ifist,
169
+ :ud_ifistp,
170
+ :ud_ifisttp,
171
+ :ud_ifld,
172
+ :ud_ifld1,
173
+ :ud_ifldl2t,
174
+ :ud_ifldl2e,
175
+ :ud_ifldlpi,
176
+ :ud_ifldlg2,
177
+ :ud_ifldln2,
178
+ :ud_ifldz,
179
+ :ud_ifldcw,
180
+ :ud_ifldenv,
181
+ :ud_ifmul,
182
+ :ud_ifmulp,
183
+ :ud_ifimul,
184
+ :ud_ifnop,
185
+ :ud_ifpatan,
186
+ :ud_ifprem,
187
+ :ud_ifprem1,
188
+ :ud_ifptan,
189
+ :ud_ifrndint,
190
+ :ud_ifrstor,
191
+ :ud_ifnsave,
192
+ :ud_ifscale,
193
+ :ud_ifsin,
194
+ :ud_ifsincos,
195
+ :ud_ifsqrt,
196
+ :ud_ifstp,
197
+ :ud_ifstp1,
198
+ :ud_ifstp8,
199
+ :ud_ifstp9,
200
+ :ud_ifst,
201
+ :ud_ifnstcw,
202
+ :ud_ifnstenv,
203
+ :ud_ifnstsw,
204
+ :ud_ifsub,
205
+ :ud_ifsubp,
206
+ :ud_ifsubr,
207
+ :ud_ifsubrp,
208
+ :ud_iftst,
209
+ :ud_ifucom,
210
+ :ud_ifucomp,
211
+ :ud_ifucompp,
212
+ :ud_ifxam,
213
+ :ud_ifxch,
214
+ :ud_ifxch4,
215
+ :ud_ifxch7,
216
+ :ud_ifxrstor,
217
+ :ud_ifxsave,
218
+ :ud_ifpxtract,
219
+ :ud_ifyl2x,
220
+ :ud_ifyl2xp1,
221
+ :ud_ihaddpd,
222
+ :ud_ihaddps,
223
+ :ud_ihlt,
224
+ :ud_ihsubpd,
225
+ :ud_ihsubps,
226
+ :ud_iidiv,
227
+ :ud_iin,
228
+ :ud_iimul,
229
+ :ud_iinc,
230
+ :ud_iinsb,
231
+ :ud_iinsw,
232
+ :ud_iinsd,
233
+ :ud_iint1,
234
+ :ud_iint3,
235
+ :ud_iint,
236
+ :ud_iinto,
237
+ :ud_iinvd,
238
+ :ud_iinvlpg,
239
+ :ud_iinvlpga,
240
+ :ud_iiretw,
241
+ :ud_iiretd,
242
+ :ud_iiretq,
243
+ :ud_ijo,
244
+ :ud_ijno,
245
+ :ud_ijb,
246
+ :ud_ijae,
247
+ :ud_ijz,
248
+ :ud_ijnz,
249
+ :ud_ijbe,
250
+ :ud_ija,
251
+ :ud_ijs,
252
+ :ud_ijns,
253
+ :ud_ijp,
254
+ :ud_ijnp,
255
+ :ud_ijl,
256
+ :ud_ijge,
257
+ :ud_ijle,
258
+ :ud_ijg,
259
+ :ud_ijcxz,
260
+ :ud_ijecxz,
261
+ :ud_ijrcxz,
262
+ :ud_ijmp,
263
+ :ud_ilahf,
264
+ :ud_ilar,
265
+ :ud_ilddqu,
266
+ :ud_ildmxcsr,
267
+ :ud_ilds,
268
+ :ud_ilea,
269
+ :ud_iles,
270
+ :ud_ilfs,
271
+ :ud_ilgs,
272
+ :ud_ilidt,
273
+ :ud_ilss,
274
+ :ud_ileave,
275
+ :ud_ilfence,
276
+ :ud_ilgdt,
277
+ :ud_illdt,
278
+ :ud_ilmsw,
279
+ :ud_ilock,
280
+ :ud_ilodsb,
281
+ :ud_ilodsw,
282
+ :ud_ilodsd,
283
+ :ud_ilodsq,
284
+ :ud_iloopnz,
285
+ :ud_iloope,
286
+ :ud_iloop,
287
+ :ud_ilsl,
288
+ :ud_iltr,
289
+ :ud_imaskmovq,
290
+ :ud_imaxpd,
291
+ :ud_imaxps,
292
+ :ud_imaxsd,
293
+ :ud_imaxss,
294
+ :ud_imfence,
295
+ :ud_iminpd,
296
+ :ud_iminps,
297
+ :ud_iminsd,
298
+ :ud_iminss,
299
+ :ud_imonitor,
300
+ :ud_imov,
301
+ :ud_imovapd,
302
+ :ud_imovaps,
303
+ :ud_imovd,
304
+ :ud_imovddup,
305
+ :ud_imovdqa,
306
+ :ud_imovdqu,
307
+ :ud_imovdq2q,
308
+ :ud_imovhpd,
309
+ :ud_imovhps,
310
+ :ud_imovlhps,
311
+ :ud_imovlpd,
312
+ :ud_imovlps,
313
+ :ud_imovhlps,
314
+ :ud_imovmskpd,
315
+ :ud_imovmskps,
316
+ :ud_imovntdq,
317
+ :ud_imovnti,
318
+ :ud_imovntpd,
319
+ :ud_imovntps,
320
+ :ud_imovntq,
321
+ :ud_imovq,
322
+ :ud_imovqa,
323
+ :ud_imovq2dq,
324
+ :ud_imovsb,
325
+ :ud_imovsw,
326
+ :ud_imovsd,
327
+ :ud_imovsq,
328
+ :ud_imovsldup,
329
+ :ud_imovshdup,
330
+ :ud_imovss,
331
+ :ud_imovsx,
332
+ :ud_imovupd,
333
+ :ud_imovups,
334
+ :ud_imovzx,
335
+ :ud_imul,
336
+ :ud_imulpd,
337
+ :ud_imulps,
338
+ :ud_imulsd,
339
+ :ud_imulss,
340
+ :ud_imwait,
341
+ :ud_ineg,
342
+ :ud_inop,
343
+ :ud_inot,
344
+ :ud_ior,
345
+ :ud_iorpd,
346
+ :ud_iorps,
347
+ :ud_iout,
348
+ :ud_ioutsb,
349
+ :ud_ioutsw,
350
+ :ud_ioutsd,
351
+ :ud_ioutsq,
352
+ :ud_ipacksswb,
353
+ :ud_ipackssdw,
354
+ :ud_ipackuswb,
355
+ :ud_ipaddb,
356
+ :ud_ipaddw,
357
+ :ud_ipaddq,
358
+ :ud_ipaddsb,
359
+ :ud_ipaddsw,
360
+ :ud_ipaddusb,
361
+ :ud_ipaddusw,
362
+ :ud_ipand,
363
+ :ud_ipandn,
364
+ :ud_ipause,
365
+ :ud_ipavgb,
366
+ :ud_ipavgw,
367
+ :ud_ipcmpeqb,
368
+ :ud_ipcmpeqw,
369
+ :ud_ipcmpeqd,
370
+ :ud_ipcmpgtb,
371
+ :ud_ipcmpgtw,
372
+ :ud_ipcmpgtd,
373
+ :ud_ipextrw,
374
+ :ud_ipinsrw,
375
+ :ud_ipmaddwd,
376
+ :ud_ipmaxsw,
377
+ :ud_ipmaxub,
378
+ :ud_ipminsw,
379
+ :ud_ipminub,
380
+ :ud_ipmovmskb,
381
+ :ud_ipmulhuw,
382
+ :ud_ipmulhw,
383
+ :ud_ipmullw,
384
+ :ud_ipmuludq,
385
+ :ud_ipop,
386
+ :ud_ipopa,
387
+ :ud_ipopad,
388
+ :ud_ipopfw,
389
+ :ud_ipopfd,
390
+ :ud_ipopfq,
391
+ :ud_ipor,
392
+ :ud_iprefetch,
393
+ :ud_iprefetchnta,
394
+ :ud_iprefetcht0,
395
+ :ud_iprefetcht1,
396
+ :ud_iprefetcht2,
397
+ :ud_ipsadbw,
398
+ :ud_ipshufd,
399
+ :ud_ipshufhw,
400
+ :ud_ipshuflw,
401
+ :ud_ipshufw,
402
+ :ud_ipslldq,
403
+ :ud_ipsllw,
404
+ :ud_ipslld,
405
+ :ud_ipsllq,
406
+ :ud_ipsraw,
407
+ :ud_ipsrad,
408
+ :ud_ipsrlw,
409
+ :ud_ipsrld,
410
+ :ud_ipsrlq,
411
+ :ud_ipsrldq,
412
+ :ud_ipsubb,
413
+ :ud_ipsubw,
414
+ :ud_ipsubd,
415
+ :ud_ipsubq,
416
+ :ud_ipsubsb,
417
+ :ud_ipsubsw,
418
+ :ud_ipsubusb,
419
+ :ud_ipsubusw,
420
+ :ud_ipunpckhbw,
421
+ :ud_ipunpckhwd,
422
+ :ud_ipunpckhdq,
423
+ :ud_ipunpckhqdq,
424
+ :ud_ipunpcklbw,
425
+ :ud_ipunpcklwd,
426
+ :ud_ipunpckldq,
427
+ :ud_ipunpcklqdq,
428
+ :ud_ipi2fw,
429
+ :ud_ipi2fd,
430
+ :ud_ipf2iw,
431
+ :ud_ipf2id,
432
+ :ud_ipfnacc,
433
+ :ud_ipfpnacc,
434
+ :ud_ipfcmpge,
435
+ :ud_ipfmin,
436
+ :ud_ipfrcp,
437
+ :ud_ipfrsqrt,
438
+ :ud_ipfsub,
439
+ :ud_ipfadd,
440
+ :ud_ipfcmpgt,
441
+ :ud_ipfmax,
442
+ :ud_ipfrcpit1,
443
+ :ud_ipfrspit1,
444
+ :ud_ipfsubr,
445
+ :ud_ipfacc,
446
+ :ud_ipfcmpeq,
447
+ :ud_ipfmul,
448
+ :ud_ipfrcpit2,
449
+ :ud_ipmulhrw,
450
+ :ud_ipswapd,
451
+ :ud_ipavgusb,
452
+ :ud_ipush,
453
+ :ud_ipusha,
454
+ :ud_ipushad,
455
+ :ud_ipushfw,
456
+ :ud_ipushfd,
457
+ :ud_ipushfq,
458
+ :ud_ipxor,
459
+ :ud_ircl,
460
+ :ud_ircr,
461
+ :ud_irol,
462
+ :ud_iror,
463
+ :ud_ircpps,
464
+ :ud_ircpss,
465
+ :ud_irdmsr,
466
+ :ud_irdpmc,
467
+ :ud_irdtsc,
468
+ :ud_irdtscp,
469
+ :ud_irepne,
470
+ :ud_irep,
471
+ :ud_iret,
472
+ :ud_iretf,
473
+ :ud_irsm,
474
+ :ud_irsqrtps,
475
+ :ud_irsqrtss,
476
+ :ud_isahf,
477
+ :ud_isal,
478
+ :ud_isalc,
479
+ :ud_isar,
480
+ :ud_ishl,
481
+ :ud_ishr,
482
+ :ud_isbb,
483
+ :ud_iscasb,
484
+ :ud_iscasw,
485
+ :ud_iscasd,
486
+ :ud_iscasq,
487
+ :ud_iseto,
488
+ :ud_isetno,
489
+ :ud_isetb,
490
+ :ud_isetnb,
491
+ :ud_isetz,
492
+ :ud_isetnz,
493
+ :ud_isetbe,
494
+ :ud_iseta,
495
+ :ud_isets,
496
+ :ud_isetns,
497
+ :ud_isetp,
498
+ :ud_isetnp,
499
+ :ud_isetl,
500
+ :ud_isetge,
501
+ :ud_isetle,
502
+ :ud_isetg,
503
+ :ud_isfence,
504
+ :ud_isgdt,
505
+ :ud_ishld,
506
+ :ud_ishrd,
507
+ :ud_ishufpd,
508
+ :ud_ishufps,
509
+ :ud_isidt,
510
+ :ud_isldt,
511
+ :ud_ismsw,
512
+ :ud_isqrtps,
513
+ :ud_isqrtpd,
514
+ :ud_isqrtsd,
515
+ :ud_isqrtss,
516
+ :ud_istc,
517
+ :ud_istd,
518
+ :ud_istgi,
519
+ :ud_isti,
520
+ :ud_iskinit,
521
+ :ud_istmxcsr,
522
+ :ud_istosb,
523
+ :ud_istosw,
524
+ :ud_istosd,
525
+ :ud_istosq,
526
+ :ud_istr,
527
+ :ud_isub,
528
+ :ud_isubpd,
529
+ :ud_isubps,
530
+ :ud_isubsd,
531
+ :ud_isubss,
532
+ :ud_iswapgs,
533
+ :ud_isyscall,
534
+ :ud_isysenter,
535
+ :ud_isysexit,
536
+ :ud_isysret,
537
+ :ud_itest,
538
+ :ud_iucomisd,
539
+ :ud_iucomiss,
540
+ :ud_iud2,
541
+ :ud_iunpckhpd,
542
+ :ud_iunpckhps,
543
+ :ud_iunpcklps,
544
+ :ud_iunpcklpd,
545
+ :ud_iverr,
546
+ :ud_iverw,
547
+ :ud_ivmcall,
548
+ :ud_ivmclear,
549
+ :ud_ivmxon,
550
+ :ud_ivmptrld,
551
+ :ud_ivmptrst,
552
+ :ud_ivmresume,
553
+ :ud_ivmxoff,
554
+ :ud_ivmrun,
555
+ :ud_ivmmcall,
556
+ :ud_ivmload,
557
+ :ud_ivmsave,
558
+ :ud_iwait,
559
+ :ud_iwbinvd,
560
+ :ud_iwrmsr,
561
+ :ud_ixadd,
562
+ :ud_ixchg,
563
+ :ud_ixlatb,
564
+ :ud_ixor,
565
+ :ud_ixorpd,
566
+ :ud_ixorps,
567
+ :ud_idb,
568
+ :ud_iinvalid,
569
+ :ud_id3vil,
570
+ :ud_ina,
571
+ :ud_igrp_reg,
572
+ :ud_igrp_rm,
573
+ :ud_igrp_vendor,
574
+ :ud_igrp_x87,
575
+ :ud_igrp_mode,
576
+ :ud_igrp_osize,
577
+ :ud_igrp_asize,
578
+ :ud_igrp_mod,
579
+ :ud_inone,
580
+ ]
581
+
582
+ enum :ud_type, [
583
+ :ud_none,
584
+ #
585
+ # 8 bit GRPs
586
+ #
587
+ :ud_r_al,
588
+ :ud_r_cl,
589
+ :ud_r_dl,
590
+ :ud_r_bl,
591
+ :ud_r_ah,
592
+ :ud_r_ch,
593
+ :ud_r_dh,
594
+ :ud_r_bh,
595
+ :ud_r_spl,
596
+ :ud_r_bpl,
597
+ :ud_r_sil,
598
+ :ud_r_dil,
599
+ :ud_r_r8b,
600
+ :ud_r_r9b,
601
+ :ud_r_r10b,
602
+ :ud_r_r11b,
603
+ :ud_r_r12b,
604
+ :ud_r_r13b,
605
+ :ud_r_r14b,
606
+ :ud_r_r15b,
607
+ #
608
+ # 16 bit GRPs
609
+ #
610
+ :ud_r_ax,
611
+ :ud_r_cx,
612
+ :ud_r_dx,
613
+ :ud_r_bx,
614
+ :ud_r_sp,
615
+ :ud_r_bp,
616
+ :ud_r_si,
617
+ :ud_r_di,
618
+ :ud_r_r8w,
619
+ :ud_r_r9w,
620
+ :ud_r_r10w,
621
+ :ud_r_r11w,
622
+ :ud_r_r12w,
623
+ :ud_r_r13w,
624
+ :ud_r_r14w,
625
+ :ud_r_r15w,
626
+ #
627
+ # 32 bit GRPs
628
+ #
629
+ :ud_r_eax,
630
+ :ud_r_ecx,
631
+ :ud_r_edx,
632
+ :ud_r_ebx,
633
+ :ud_r_esp,
634
+ :ud_r_ebp,
635
+ :ud_r_esi,
636
+ :ud_r_edi,
637
+ :ud_r_r8d,
638
+ :ud_r_r9d,
639
+ :ud_r_r10d,
640
+ :ud_r_r11d,
641
+ :ud_r_r12d,
642
+ :ud_r_r13d,
643
+ :ud_r_r14d,
644
+ :ud_r_r15d,
645
+ #
646
+ # 64 bit GRPs
647
+ #
648
+ :ud_r_rax,
649
+ :ud_r_rcx,
650
+ :ud_r_rdx,
651
+ :ud_r_rbx,
652
+ :ud_r_rsp,
653
+ :ud_r_rbp,
654
+ :ud_r_rsi,
655
+ :ud_r_rdi,
656
+ :ud_r_r8,
657
+ :ud_r_r9,
658
+ :ud_r_r10,
659
+ :ud_r_r11,
660
+ :ud_r_r12,
661
+ :ud_r_r13,
662
+ :ud_r_r14,
663
+ :ud_r_r15,
664
+ #
665
+ # Segments registers
666
+ #
667
+ :ud_r_es,
668
+ :ud_r_cs,
669
+ :ud_r_ss,
670
+ :ud_r_ds,
671
+ :ud_r_fs,
672
+ :ud_r_gs,
673
+ #
674
+ # Control registers
675
+ #
676
+ :ud_r_cr0,
677
+ :ud_r_cr1,
678
+ :ud_r_cr2,
679
+ :ud_r_cr3,
680
+ :ud_r_cr4,
681
+ :ud_r_cr5,
682
+ :ud_r_cr6,
683
+ :ud_r_cr7,
684
+ :ud_r_cr8,
685
+ :ud_r_cr9,
686
+ :ud_r_cr10,
687
+ :ud_r_cr11,
688
+ :ud_r_cr12,
689
+ :ud_r_cr13,
690
+ :ud_r_cr14,
691
+ :ud_r_cr15,
692
+ #
693
+ # Debug registers
694
+ #
695
+ :ud_r_dr0,
696
+ :ud_r_dr1,
697
+ :ud_r_dr2,
698
+ :ud_r_dr3,
699
+ :ud_r_dr4,
700
+ :ud_r_dr5,
701
+ :ud_r_dr6,
702
+ :ud_r_dr7,
703
+ :ud_r_dr8,
704
+ :ud_r_dr9,
705
+ :ud_r_dr10,
706
+ :ud_r_dr11,
707
+ :ud_r_dr12,
708
+ :ud_r_dr13,
709
+ :ud_r_dr14,
710
+ :ud_r_dr15,
711
+ #
712
+ # MMX registers
713
+ #
714
+ :ud_r_mm0,
715
+ :ud_r_mm1,
716
+ :ud_r_mm2,
717
+ :ud_r_mm3,
718
+ :ud_r_mm4,
719
+ :ud_r_mm5,
720
+ :ud_r_mm6,
721
+ :ud_r_mm7,
722
+ #
723
+ # x87 registers
724
+ #
725
+ :ud_r_st0,
726
+ :ud_r_st1,
727
+ :ud_r_st2,
728
+ :ud_r_st3,
729
+ :ud_r_st4,
730
+ :ud_r_st5,
731
+ :ud_r_st6,
732
+ :ud_r_st7,
733
+ #
734
+ # Extended multimedia registers
735
+ #
736
+ :ud_r_xmm0,
737
+ :ud_r_xmm1,
738
+ :ud_r_xmm2,
739
+ :ud_r_xmm3,
740
+ :ud_r_xmm4,
741
+ :ud_r_xmm5,
742
+ :ud_r_xmm6,
743
+ :ud_r_xmm7,
744
+ :ud_r_xmm8,
745
+ :ud_r_xmm9,
746
+ :ud_r_xmm10,
747
+ :ud_r_xmm11,
748
+ :ud_r_xmm12,
749
+ :ud_r_xmm13,
750
+ :ud_r_xmm14,
751
+ :ud_r_xmm15,
752
+ :ud_r_rip,
753
+ #
754
+ # Operand types
755
+ #
756
+ :ud_op_reg,
757
+ :ud_op_mem,
758
+ :ud_op_ptr,
759
+ :ud_op_imm,
760
+ :ud_op_jimm,
761
+ :ud_op_const
762
+ ]
763
+
764
+ REGS = {
765
+ :ud_r_al => :al,
766
+ :ud_r_cl => :cl,
767
+ :ud_r_dl => :dl,
768
+ :ud_r_bl => :bl,
769
+ :ud_r_ah => :ah,
770
+ :ud_r_ch => :ch,
771
+ :ud_r_dh => :dh,
772
+ :ud_r_bh => :bh,
773
+ :ud_r_spl => :spl,
774
+ :ud_r_bpl => :bpl,
775
+ :ud_r_sil => :sil,
776
+ :ud_r_dil => :dil,
777
+ :ud_r_r8b => :r8b,
778
+ :ud_r_r9b => :r9b,
779
+ :ud_r_r10b => :r10b,
780
+ :ud_r_r11b => :r11b,
781
+ :ud_r_r12b => :r12b,
782
+ :ud_r_r13b => :r13b,
783
+ :ud_r_r14b => :r14b,
784
+ :ud_r_r15b => :r15b,
785
+ #
786
+ # 16 bit GRPs
787
+ #
788
+ :ud_r_ax => :ax,
789
+ :ud_r_cx => :cx,
790
+ :ud_r_dx => :dx,
791
+ :ud_r_bx => :bx,
792
+ :ud_r_sp => :sp,
793
+ :ud_r_bp => :bp,
794
+ :ud_r_si => :si,
795
+ :ud_r_di => :di,
796
+ :ud_r_r8w => :r8w,
797
+ :ud_r_r9w => :r9w,
798
+ :ud_r_r10w => :r10w,
799
+ :ud_r_r11w => :r11w,
800
+ :ud_r_r12w => :r12w,
801
+ :ud_r_r13w => :r13w,
802
+ :ud_r_r14w => :r14w,
803
+ :ud_r_r15w => :r15w,
804
+ #
805
+ # 32 bit GRPs
806
+ #
807
+ :ud_r_eax => :eax,
808
+ :ud_r_ecx => :ecx,
809
+ :ud_r_edx => :edx,
810
+ :ud_r_ebx => :ebx,
811
+ :ud_r_esp => :esp,
812
+ :ud_r_ebp => :ebp,
813
+ :ud_r_esi => :esi,
814
+ :ud_r_edi => :edi,
815
+ :ud_r_r8d => :r8d,
816
+ :ud_r_r9d => :r9d,
817
+ :ud_r_r10d => :r10d,
818
+ :ud_r_r11d => :r11d,
819
+ :ud_r_r12d => :r12d,
820
+ :ud_r_r13d => :r13d,
821
+ :ud_r_r14d => :r14d,
822
+ :ud_r_r15d => :r15d,
823
+ #
824
+ # 64 bit GRPs
825
+ #
826
+ :ud_r_rax => :rax,
827
+ :ud_r_rcx => :rcx,
828
+ :ud_r_rdx => :rdx,
829
+ :ud_r_rbx => :rbx,
830
+ :ud_r_rsp => :rsp,
831
+ :ud_r_rbp => :rbp,
832
+ :ud_r_rsi => :rsi,
833
+ :ud_r_rdi => :rdi,
834
+ :ud_r_r8 => :r8,
835
+ :ud_r_r9 => :r9,
836
+ :ud_r_r10 => :r10,
837
+ :ud_r_r11 => :r11,
838
+ :ud_r_r12 => :r12,
839
+ :ud_r_r13 => :r13,
840
+ :ud_r_r14 => :r14,
841
+ :ud_r_r15 => :r15,
842
+ #
843
+ # Segments registers
844
+ #
845
+ :ud_r_es => :es,
846
+ :ud_r_cs => :cs,
847
+ :ud_r_ss => :ss,
848
+ :ud_r_ds => :ds,
849
+ :ud_r_fs => :fs,
850
+ :ud_r_gs => :gs,
851
+ #
852
+ # Control registers
853
+ #
854
+ :ud_r_cr0 => :cr0,
855
+ :ud_r_cr1 => :cr1,
856
+ :ud_r_cr2 => :cr2,
857
+ :ud_r_cr3 => :cr3,
858
+ :ud_r_cr4 => :cr4,
859
+ :ud_r_cr5 => :cr5,
860
+ :ud_r_cr6 => :cr6,
861
+ :ud_r_cr7 => :cr7,
862
+ :ud_r_cr8 => :cr8,
863
+ :ud_r_cr9 => :cr9,
864
+ :ud_r_cr10 => :cr10,
865
+ :ud_r_cr11 => :cr11,
866
+ :ud_r_cr12 => :cr12,
867
+ :ud_r_cr13 => :cr13,
868
+ :ud_r_cr14 => :cr14,
869
+ :ud_r_cr15 => :cr15,
870
+ #
871
+ # Debug registers
872
+ #
873
+ :ud_r_dr0 => :dr0,
874
+ :ud_r_dr1 => :dr1,
875
+ :ud_r_dr2 => :dr2,
876
+ :ud_r_dr3 => :dr3,
877
+ :ud_r_dr4 => :dr4,
878
+ :ud_r_dr5 => :dr5,
879
+ :ud_r_dr6 => :dr6,
880
+ :ud_r_dr7 => :dr7,
881
+ :ud_r_dr8 => :dr8,
882
+ :ud_r_dr9 => :dr9,
883
+ :ud_r_dr10 => :dr10,
884
+ :ud_r_dr11 => :dr11,
885
+ :ud_r_dr12 => :dr12,
886
+ :ud_r_dr13 => :dr13,
887
+ :ud_r_dr14 => :dr14,
888
+ :ud_r_dr15 => :dr15,
889
+ #
890
+ # MMX registers
891
+ #
892
+ :ud_r_mm0 => :mm0,
893
+ :ud_r_mm1 => :mm1,
894
+ :ud_r_mm2 => :mm2,
895
+ :ud_r_mm3 => :mm3,
896
+ :ud_r_mm4 => :mm4,
897
+ :ud_r_mm5 => :mm5,
898
+ :ud_r_mm6 => :mm6,
899
+ :ud_r_mm7 => :mm7,
900
+ #
901
+ # x87 registers
902
+ #
903
+ :ud_r_st0 => :st0,
904
+ :ud_r_st1 => :st1,
905
+ :ud_r_st2 => :st2,
906
+ :ud_r_st3 => :st3,
907
+ :ud_r_st4 => :st4,
908
+ :ud_r_st5 => :st5,
909
+ :ud_r_st6 => :st6,
910
+ :ud_r_st7 => :st7,
911
+ #
912
+ # Extended multimedia registers
913
+ #
914
+ :ud_r_xmm0 => :xmm0,
915
+ :ud_r_xmm1 => :xmm1,
916
+ :ud_r_xmm2 => :xmm2,
917
+ :ud_r_xmm3 => :xmm3,
918
+ :ud_r_xmm4 => :xmm4,
919
+ :ud_r_xmm5 => :xmm5,
920
+ :ud_r_xmm6 => :xmm6,
921
+ :ud_r_xmm7 => :xmm7,
922
+ :ud_r_xmm8 => :xmm8,
923
+ :ud_r_xmm9 => :xmm9,
924
+ :ud_r_xmm10 => :xmm10,
925
+ :ud_r_xmm11 => :xmm11,
926
+ :ud_r_xmm12 => :xmm12,
927
+ :ud_r_xmm13 => :xmm13,
928
+ :ud_r_xmm14 => :xmm14,
929
+ :ud_r_xmm15 => :xmm15,
930
+ :ud_r_rip => :rip,
931
+ }
932
+
933
+ # Syntaxes
934
+ SYNTAX = {
935
+ :att => :ud_translate_att,
936
+ :intel => :ud_translate_intel
937
+ }
938
+
939
+ callback :ud_input_callback, [:pointer], :int
940
+ callback :ud_translator_callback, [:pointer], :void
941
+ end
942
+ end