faiss 0.6.3 → 0.6.4

data/vendor/faiss/faiss/index_factory.cpp

@@ -385,7 +385,7 @@ IndexIVF* parse_IndexIVF(
     }
     if (match("FlatPanorama([0-9]+)?(_([0-9]+))?")) {
         int nlevels = mres_to_int(sm[1], 8); // default to 8 levels
-        int bs = mres_to_int(sm[3], 128);
+        int bs = mres_to_int(sm[3], Panorama::kDefaultBatchSize);
         return new IndexIVFFlatPanorama(
                 get_q(), d, nlist, nlevels, mt, own_il, bs);
     }
@@ -575,6 +575,13 @@ IndexHNSW* parse_IndexHNSW(
     if (match(sq_pattern)) {
         return new IndexHNSWSQ(d, sq_types[sm[1].str()], hnsw_M, mt);
     }
+    // Keep the bare RaBitQ token consistent with Flat and IVF: it means 1 bit.
+    // Use an explicit width such as RaBitQ4 to enable staged refinement.
+    if (match("RaBitQ([1-9])?")) {
+        // the capture is the bare digit, so no substr offset here
+        int nb_bits = mres_to_int(sm[1], 1);
+        return new IndexHNSWRaBitQ(d, hnsw_M, nb_bits, mt);
+    }
     if (match("([0-9]+)\\+PQ([0-9]+)?")) {
         int ncent = mres_to_int(sm[1]);
         int pq_m = mres_to_int(sm[2]);

data/vendor/faiss/faiss/invlists/InvertedLists.cpp

@@ -440,8 +440,11 @@ void ArrayInvertedListsPanorama::resize(size_t list_no, size_t new_size) {
 const uint8_t* ArrayInvertedListsPanorama::get_single_code(
         size_t list_no,
         size_t offset) const {
-    assert(list_no < nlist);
-    assert(offset < ids[list_no].size());
+    // Throw rather than assert: Panorama::reconstruct takes an unsized
+    // pointer, so these are the only bounds available and they must hold
+    // in opt builds too.
+    FAISS_THROW_IF_NOT(list_no < nlist);
+    FAISS_THROW_IF_NOT(offset < ids[list_no].size());
 
     uint8_t* recons_buffer = new uint8_t[code_size];
 
@@ -669,10 +672,10 @@ namespace {
 int translate_list_no(const VStackInvertedLists* vil, idx_t list_no) {
     FAISS_THROW_IF_NOT(
             list_no >= 0 && static_cast<size_t>(list_no) < vil->nlist);
-    int i0 = 0, i1 = vil->ils.size();
+    size_t i0 = 0, i1 = vil->ils.size();
     const idx_t* cumsz = vil->cumsz.data();
     while (i0 + 1 < i1) {
-        int imed = (i0 + i1) / 2;
+        size_t imed = i0 + (i1 - i0) / 2;
         if (list_no >= cumsz[imed]) {
             i0 = imed;
         } else {

data/vendor/faiss/faiss/invlists/OnDiskInvertedLists.cpp

@@ -11,6 +11,7 @@
 
 #include <pthread.h>
 
+#include <memory>
 #include <unordered_set>
 
 #include <sys/mman.h>
@@ -714,12 +715,17 @@ void OnDiskInvertedListsIOHook::write(const InvertedLists* ils, IOWriter* f)
 
 InvertedLists* OnDiskInvertedListsIOHook::read(IOReader* f, int io_flags)
         const {
-    OnDiskInvertedLists* od = new OnDiskInvertedLists();
+    auto od = std::make_unique<OnDiskInvertedLists>();
     od->read_only = io_flags & IO_FLAG_READ_ONLY;
     READ1(od->nlist);
     READ1(od->code_size);
     // this is a POD object
     READVECTOR(od->lists);
+    FAISS_THROW_IF_NOT_FMT(
+            od->lists.size() == od->nlist,
+            "OnDisk inverted lists: read %zu lists for nlist %zu",
+            od->lists.size(),
+            od->nlist);
     {
         std::vector<OnDiskInvertedLists::Slot> v;
         READVECTOR(v);
@@ -759,7 +765,7 @@ InvertedLists* OnDiskInvertedListsIOHook::read(IOReader* f, int io_flags)
     if (!(io_flags & IO_FLAG_SKIP_IVF_DATA)) {
         od->do_mmap();
     }
-    return od;
+    return od.release();
 }
 
 /** read from a ArrayInvertedLists into this invertedlist type */
@@ -769,7 +775,7 @@ InvertedLists* OnDiskInvertedListsIOHook::read_ArrayInvertedLists(
         size_t nlist,
         size_t code_size,
         const std::vector<size_t>& sizes) const {
-    auto ails = new OnDiskInvertedLists();
+    auto ails = std::make_unique<OnDiskInvertedLists>();
     ails->nlist = nlist;
     ails->code_size = code_size;
     ails->read_only = true;
@@ -819,7 +825,7 @@ InvertedLists* OnDiskInvertedListsIOHook::read_ArrayInvertedLists(
     // resume normal reading of file
     fseek(fdesc, o, SEEK_SET);
 
-    return ails;
+    return ails.release();
 }
 
 } // namespace faiss

data/vendor/faiss/faiss/svs/IndexSVSVamana.cpp

@@ -67,11 +67,13 @@ IndexSVSVamana::IndexSVSVamana(
         size_t degree,
         MetricType metric,
         SVSStorageKind storage,
-        bool is_static)
+        bool is_static,
+        bool store_vectors)
         : Index(d, metric),
           graph_max_degree{degree},
           is_static{is_static},
-          storage_kind{storage} {
+          storage_kind{storage},
+          store_vectors{store_vectors} {
     prune_to = graph_max_degree < 4 ? graph_max_degree : graph_max_degree - 4;
     alpha = metric == METRIC_L2 ? 1.2f : 0.95f;
 
@@ -124,6 +126,14 @@ IndexSVSVamana::~IndexSVSVamana() {
 }
 
 void IndexSVSVamana::add(idx_t n, const float* x) {
+    // Opting out after data has been added would leave stored_vectors
+    // misaligned with the ids in the index, so release it instead of growing.
+    if (!store_vectors && stored_vectors_valid) {
+        stored_vectors.clear();
+        stored_vectors.shrink_to_fit();
+        stored_vectors_valid = false;
+    }
+
     if (is_static) {
         FAISS_THROW_IF_MSG(
                 impl,
@@ -167,7 +177,8 @@ void IndexSVSVamana::reconstruct(idx_t key, float* recons) const {
     FAISS_THROW_IF_NOT_MSG(
             stored_vectors_valid && !stored_vectors.empty(),
             "IndexSVSVamana::reconstruct: stored_vectors unavailable "
-            "(invalidated by remove_ids or not restored after deserialization)");
+            "(store_vectors disabled, invalidated by remove_ids, or not "
+            "restored after deserialization)");
     std::memcpy(recons, stored_vectors.data() + key * d, sizeof(float) * d);
 }
 
@@ -187,7 +198,8 @@ void IndexSVSVamana::reset() {
         }
     }
     stored_vectors.clear();
-    stored_vectors_valid = true;
+    stored_vectors.shrink_to_fit();
+    stored_vectors_valid = store_vectors;
     mmap_owner.reset(); // Release the memory mapping
     is_trained = false;
     ntotal = 0;

data/vendor/faiss/faiss/svs/IndexSVSVamana.h

@@ -111,7 +111,8 @@ struct IndexSVSVamana : Index {
             size_t degree,
             MetricType metric = METRIC_L2,
             SVSStorageKind storage = SVSStorageKind::SVS_FP32,
-            bool is_static = false);
+            bool is_static = false,
+            bool store_vectors = true);
 
     ~IndexSVSVamana() override;
 
@@ -164,6 +165,12 @@ struct IndexSVSVamana : Index {
     std::vector<float> stored_vectors;
     bool stored_vectors_valid{true};
 
+    // Set to false before the first add() to skip the stored_vectors copy,
+    // saving ntotal * d * 4 bytes at the cost of reconstruct() support and
+    // hence of use as an IVF coarse quantizer. Clearing it after vectors have
+    // been added drops the copy, which can no longer be aligned with the ids.
+    bool store_vectors{true};
+
    protected:
     /* Initializes the implementation. For static indexes the data is consumed
        at build time; for dynamic indexes n/x are ignored and add() populates

data/vendor/faiss/faiss/svs/IndexSVSVamanaLVQ.cpp

@@ -34,7 +34,9 @@ IndexSVSVamanaLVQ::IndexSVSVamanaLVQ(
         size_t degree,
         MetricType metric,
         SVSStorageKind storage,
-        bool is_static)
-        : IndexSVSVamana(d, degree, metric, storage, is_static) {}
+        bool is_static,
+        bool store_vectors)
+        : IndexSVSVamana(d, degree, metric, storage, is_static, store_vectors) {
+}
 
 } // namespace faiss

data/vendor/faiss/faiss/svs/IndexSVSVamanaLVQ.h

@@ -35,7 +35,8 @@ struct IndexSVSVamanaLVQ : IndexSVSVamana {
             size_t degree,
             MetricType metric = METRIC_L2,
             SVSStorageKind storage = SVSStorageKind::SVS_LVQ4x0,
-            bool is_static = false);
+            bool is_static = false,
+            bool store_vectors = true);
 
     ~IndexSVSVamanaLVQ() override = default;
 };

data/vendor/faiss/faiss/svs/IndexSVSVamanaLeanVec.cpp

@@ -44,8 +44,15 @@ IndexSVSVamanaLeanVec::IndexSVSVamanaLeanVec(
         MetricType metric,
         size_t leanvec_dims,
         SVSStorageKind storage_kind,
-        bool is_static)
-        : IndexSVSVamana(d, degree, metric, storage_kind, is_static) {
+        bool is_static,
+        bool store_vectors)
+        : IndexSVSVamana(
+                  d,
+                  degree,
+                  metric,
+                  storage_kind,
+                  is_static,
+                  store_vectors) {
     is_trained = false;
     leanvec_d = leanvec_dims == 0 ? d / 2 : leanvec_dims;
 }

data/vendor/faiss/faiss/svs/IndexSVSVamanaLeanVec.h

@@ -36,7 +36,8 @@ struct IndexSVSVamanaLeanVec : IndexSVSVamana {
             MetricType metric = METRIC_L2,
             size_t leanvec_dims = 0,
             SVSStorageKind storage = SVSStorageKind::SVS_LeanVec4x4,
-            bool is_static = false);
+            bool is_static = false,
+            bool store_vectors = true);
 
     ~IndexSVSVamanaLeanVec() override;
 

data/vendor/faiss/faiss/utils/distances.cpp

@@ -541,17 +541,19 @@ void exhaustive_L2sqr_blas<Top1BlockResultHandler<CMax<float, int64_t>>>(
         return;
     }
 
-    with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_A1>([&]<SIMDLevel SL>() {
-        if constexpr (
-                SL == SIMDLevel::AVX2 || SL == SIMDLevel::AVX512 ||
-                SL == SIMDLevel::ARM_SVE) {
-            exhaustive_L2sqr_blas_cmax<SL>(x, y, d, nx, ny, res, y_norms);
-        } else {
-            exhaustive_L2sqr_blas_default_impl<
-                    Top1BlockResultHandler<CMax<float, int64_t>>>(
-                    x, y, d, nx, ny, res, y_norms);
-        }
-    });
+    with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_BASE_WITH_SVE>(
+            [&]<SIMDLevel SL>() {
+                if constexpr (
+                        SL == SIMDLevel::AVX2 || SL == SIMDLevel::AVX512 ||
+                        SL == SIMDLevel::ARM_SVE) {
+                    exhaustive_L2sqr_blas_cmax<SL>(
+                            x, y, d, nx, ny, res, y_norms);
+                } else {
+                    exhaustive_L2sqr_blas_default_impl<
+                            Top1BlockResultHandler<CMax<float, int64_t>>>(
+                            x, y, d, nx, ny, res, y_norms);
+                }
+            });
 }
 
 struct Run_search_inner_product {
@@ -563,7 +565,11 @@ struct Run_search_inner_product {
            size_t d,
            size_t nx,
            size_t ny) {
-        if (res.sel ||
+        // ny == 0 goes to the sequential path: it guards only on nx, so its
+        // per-query begin()/end() still runs and each handler writes its own
+        // neutral distance and -1 label. The BLAS path instead returns early
+        // on ny == 0, before the handler is initialized.
+        if (res.sel || ny == 0 ||
             nx * d < static_cast<size_t>(distance_compute_blas_threshold)) {
             exhaustive_inner_product_seq(x, y, d, nx, ny, res);
         } else {
@@ -582,7 +588,8 @@ struct Run_search_L2sqr {
            size_t nx,
            size_t ny,
            const float* y_norm2) {
-        if (res.sel ||
+        // See the note on ny == 0 in Run_search_inner_product.
+        if (res.sel || ny == 0 ||
             nx * d < static_cast<size_t>(distance_compute_blas_threshold)) {
             exhaustive_L2sqr_seq(x, y, d, nx, ny, res);
         } else {

data/vendor/faiss/faiss/utils/distances_dispatch.h

@@ -29,22 +29,22 @@
 namespace faiss {
 
 inline float fvec_L1_dispatch(const float* x, const float* y, size_t d) {
-    return with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_A1>(
+    return with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_BASE_WITH_SVE>(
             [&]<SIMDLevel SL>() { return fvec_L1<SL>(x, y, d); });
 }
 
 inline float fvec_Linf_dispatch(const float* x, const float* y, size_t d) {
-    return with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_A1>(
+    return with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_BASE_WITH_SVE>(
             [&]<SIMDLevel SL>() { return fvec_Linf<SL>(x, y, d); });
 }
 
 inline float fvec_norm_L2sqr_dispatch(const float* x, size_t d) {
-    return with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_A1>(
+    return with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_BASE_WITH_SVE>(
             [&]<SIMDLevel SL>() { return fvec_norm_L2sqr<SL>(x, d); });
 }
 
 inline float fvec_L2sqr_dispatch(const float* x, const float* y, size_t d) {
-    return with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_A1>(
+    return with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_BASE_WITH_SVE>(
             [&]<SIMDLevel SL>() { return fvec_L2sqr<SL>(x, y, d); });
 }
 
@@ -52,7 +52,7 @@ inline float fvec_inner_product_dispatch(
         const float* x,
         const float* y,
         size_t d) {
-    return with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_A1>(
+    return with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_BASE_WITH_SVE>(
             [&]<SIMDLevel SL>() { return fvec_inner_product<SL>(x, y, d); });
 }
 
@@ -67,10 +67,11 @@ inline void fvec_inner_product_batch_4_dispatch(
         float& dis1,
         float& dis2,
         float& dis3) {
-    with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_A1>([&]<SIMDLevel SL>() {
-        fvec_inner_product_batch_4<SL>(
-                x, y0, y1, y2, y3, d, dis0, dis1, dis2, dis3);
-    });
+    with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_BASE_WITH_SVE>(
+            [&]<SIMDLevel SL>() {
+                fvec_inner_product_batch_4<SL>(
+                        x, y0, y1, y2, y3, d, dis0, dis1, dis2, dis3);
+            });
 }
 
 inline void fvec_L2sqr_batch_4_dispatch(
@@ -84,9 +85,11 @@ inline void fvec_L2sqr_batch_4_dispatch(
         float& dis1,
         float& dis2,
         float& dis3) {
-    with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_A1>([&]<SIMDLevel SL>() {
-        fvec_L2sqr_batch_4<SL>(x, y0, y1, y2, y3, d, dis0, dis1, dis2, dis3);
-    });
+    with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_BASE_WITH_SVE>(
+            [&]<SIMDLevel SL>() {
+                fvec_L2sqr_batch_4<SL>(
+                        x, y0, y1, y2, y3, d, dis0, dis1, dis2, dis3);
+            });
 }
 
 inline void fvec_L2sqr_ny_transposed_dispatch(
@@ -97,9 +100,11 @@ inline void fvec_L2sqr_ny_transposed_dispatch(
         size_t d,
         size_t d_offset,
         size_t ny) {
-    with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_A1>([&]<SIMDLevel SL>() {
-        fvec_L2sqr_ny_transposed<SL>(dis, x, y, y_sqlen, d, d_offset, ny);
-    });
+    with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_BASE_WITH_SVE>(
+            [&]<SIMDLevel SL>() {
+                fvec_L2sqr_ny_transposed<SL>(
+                        dis, x, y, y_sqlen, d, d_offset, ny);
+            });
 }
 
 inline void fvec_inner_products_ny_dispatch(
@@ -108,9 +113,10 @@ inline void fvec_inner_products_ny_dispatch(
         const float* y,
         size_t d,
         size_t ny) {
-    with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_A1>([&]<SIMDLevel SL>() {
-        fvec_inner_products_ny<SL>(ip, x, y, d, ny);
-    });
+    with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_BASE_WITH_SVE>(
+            [&]<SIMDLevel SL>() {
+                fvec_inner_products_ny<SL>(ip, x, y, d, ny);
+            });
 }
 
 inline void fvec_L2sqr_ny_dispatch(
@@ -119,7 +125,7 @@ inline void fvec_L2sqr_ny_dispatch(
         const float* y,
         size_t d,
         size_t ny) {
-    with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_A1>(
+    with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_BASE_WITH_SVE>(
             [&]<SIMDLevel SL>() { fvec_L2sqr_ny<SL>(dis, x, y, d, ny); });
 }
 
@@ -129,7 +135,7 @@ inline size_t fvec_L2sqr_ny_nearest_dispatch(
         const float* y,
         size_t d,
         size_t ny) {
-    return with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_A1>(
+    return with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_BASE_WITH_SVE>(
             [&]<SIMDLevel SL>() {
                 return fvec_L2sqr_ny_nearest<SL>(
                         distances_tmp_buffer, x, y, d, ny);
@@ -144,7 +150,7 @@ inline size_t fvec_L2sqr_ny_nearest_y_transposed_dispatch(
         size_t d,
         size_t d_offset,
         size_t ny) {
-    return with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_A1>(
+    return with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_BASE_WITH_SVE>(
             [&]<SIMDLevel SL>() {
                 return fvec_L2sqr_ny_nearest_y_transposed<SL>(
                         distances_tmp_buffer, x, y, y_sqlen, d, d_offset, ny);
@@ -157,7 +163,7 @@ inline void fvec_madd_dispatch(
         float bf,
         const float* b,
         float* c) {
-    with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_A1>(
+    with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_BASE_WITH_SVE>(
             [&]<SIMDLevel SL>() { fvec_madd<SL>(n, a, bf, b, c); });
 }
 
@@ -167,7 +173,7 @@ inline int fvec_madd_and_argmin_dispatch(
         float bf,
         const float* b,
         float* c) {
-    return with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_A1>(
+    return with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_BASE_WITH_SVE>(
             [&]<SIMDLevel SL>() {
                 return fvec_madd_and_argmin<SL>(n, a, bf, b, c);
             });
@@ -241,7 +247,7 @@ auto with_VectorDistance(
         if constexpr (!has_simd) {
             return call.template operator()<SIMDLevel::NONE>();
         } else {
-            return with_simd_level(call);
+            return with_simd_level_with_sve(call);
         }
     };
     return with_metric_type(metric, dispatch_metric);

data/vendor/faiss/faiss/utils/distances_fused/distances_fused.cpp

@@ -51,7 +51,7 @@ bool exhaustive_L2sqr_fused_cmax(
         return true;
     }
 
-    return with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_A0>(
+    return with_selected_simd_levels<AVAILABLE_SIMD_LEVELS_BASE>(
             [&]<SIMDLevel SL>() {
                 return exhaustive_L2sqr_fused_cmax<SL>(
                         x, y, d, nx, ny, res, y_norms);

data/vendor/faiss/faiss/utils/hamming.cpp

@@ -146,8 +146,14 @@ void hammings(
         size_t nb,
         size_t ncodes,
         hamdis_t* __restrict dis) {
-    with_simd_level_a0_spr([&]<SIMDLevel SL>() {
-        hammings_fixSL<SL>(a, b, na, nb, ncodes, dis);
+    with_simd_level_with_vpopcnt([&]<SIMDLevel SL>() {
+        // Ragged sizes have their own kernel; keeping it out of
+        // hammings_fixSL() leaves the word-level paths untouched.
+        if (ncodes % 8 != 0) {
+            hammings_ragged_fixSL<SL>(a, b, na, nb, ncodes, dis);
+        } else {
+            hammings_fixSL<SL>(a, b, na, nb, ncodes, dis);
+        }
     });
 }
 
@@ -170,7 +176,7 @@ void hammings_knn_hc(
         int order,
         ApproxTopK_mode_t approx_topk_mode,
         const faiss::IDSelector* sel) {
-    with_simd_level_a0_spr([&]<SIMDLevel SL>() {
+    with_simd_level_with_vpopcnt([&]<SIMDLevel SL>() {
         hammings_knn_hc_fixSL<SL>(
                 ha, a, b, nb, ncodes, order, approx_topk_mode, sel);
     });
@@ -186,7 +192,7 @@ void hammings_knn_mc(
         int32_t* __restrict distances,
         int64_t* __restrict labels,
         const faiss::IDSelector* sel) {
-    with_simd_level_a0_spr([&]<SIMDLevel SL>() {
+    with_simd_level_with_vpopcnt([&]<SIMDLevel SL>() {
         hammings_knn_mc_fixSL<SL>(
                 a, b, na, nb, k, ncodes, distances, labels, sel);
     });
@@ -201,7 +207,7 @@ void hamming_range_search(
         size_t code_size,
         RangeSearchResult* result,
         const faiss::IDSelector* sel) {
-    with_simd_level_a0_spr([&]<SIMDLevel SL>() {
+    with_simd_level_with_vpopcnt([&]<SIMDLevel SL>() {
         hamming_range_search_fixSL<SL>(
                 a, b, na, nb, radius, code_size, result, sel);
     });
@@ -215,7 +221,7 @@ void hamming_count_thres(
         hamdis_t ht,
         size_t ncodes,
         size_t* nptr) {
-    with_simd_level_a0_spr([&]<SIMDLevel SL>() {
+    with_simd_level_with_vpopcnt([&]<SIMDLevel SL>() {
         hamming_count_thres_fixSL<SL>(bs1, bs2, n1, n2, ht, ncodes, nptr);
     });
 }
@@ -226,7 +232,7 @@ void crosshamming_count_thres(
         hamdis_t ht,
         size_t ncodes,
         size_t* nptr) {
-    with_simd_level_a0_spr([&]<SIMDLevel SL>() {
+    with_simd_level_with_vpopcnt([&]<SIMDLevel SL>() {
         crosshamming_count_thres_fixSL<SL>(dbs, n, ht, ncodes, nptr);
     });
 }
@@ -240,7 +246,7 @@ size_t match_hamming_thres(
         size_t ncodes,
         int64_t* idx,
         hamdis_t* dis) {
-    return with_simd_level_a0_spr([&]<SIMDLevel SL>() -> size_t {
+    return with_simd_level_with_vpopcnt([&]<SIMDLevel SL>() -> size_t {
         return match_hamming_thres_fixSL<SL>(
                 bs1, bs2, n1, n2, ht, ncodes, idx, dis);
     });
@@ -253,7 +259,7 @@ void generalized_hammings_knn_hc(
         size_t nb,
         size_t code_size,
         int ordered) {
-    with_simd_level_a0_spr([&]<SIMDLevel SL>() {
+    with_simd_level_with_vpopcnt([&]<SIMDLevel SL>() {
         generalized_hammings_knn_hc_fixSL<SL>(ha, a, b, nb, code_size, ordered);
     });
 }

data/vendor/faiss/faiss/utils/hamming.h

@@ -111,7 +111,7 @@ FAISS_API extern size_t hamming_batch_size;
  *
  * @param  a             size na * nbytespercode
  * @param  b             size nb * nbytespercode
- * @param  nbytespercode should be multiple of 8
+ * @param  nbytespercode any size; multiples of 8 take a faster kernel
  * @param  dis           output distances, size na * nb
  */
 void hammings(
@@ -327,6 +327,15 @@ void hamming_range_search_fixSL(
         RangeSearchResult* result,
         const IDSelector* sel);
 
+template <SIMDLevel SL>
+void hammings_ragged_fixSL(
+        const uint8_t* a,
+        const uint8_t* b,
+        size_t na,
+        size_t nb,
+        size_t ncodes,
+        hamdis_t* dis);
+
 template <SIMDLevel SL>
 void hammings_fixSL(
         const uint8_t* a,

data/vendor/faiss/faiss/utils/hamming_distance/common.h

@@ -210,12 +210,23 @@ inline void hammings_impl(
         size_t n2,
         hamdis_t* __restrict dis) {
     size_t i, j;
-    const size_t nwords = nbits / 64;
+    constexpr size_t nwords = nbits / 64;
     for (i = 0; i < n1; i++) {
         const uint64_t* __restrict bs1_ = bs1 + i * nwords;
         hamdis_t* __restrict dis_ = dis + i * n2;
-        for (j = 0; j < n2; j++) {
-            dis_[j] = hamming<nbits>(bs1_, bs2 + j * nwords);
+        if constexpr (nwords >= 4) {
+            // Wide codes are quicker one candidate at a time; otherwise the
+            // compiler batches candidates and must gather scattered bytes.
+#if defined(__clang__)
+#pragma clang loop vectorize(disable)
+#endif
+            for (j = 0; j < n2; j++) {
+                dis_[j] = hamming<nbits>(bs1_, bs2 + j * nwords);
+            }
+        } else {
+            for (j = 0; j < n2; j++) {
+                dis_[j] = hamming<nbits>(bs1_, bs2 + j * nwords);
+            }
         }
     }
 }

data/vendor/faiss/faiss/utils/hamming_distance/hamming_avx512_vpopcnt.cpp

@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) Meta Platforms, Inc. and affiliates.
+ *
+ * This source code is licensed under the MIT license found in the
+ * LICENSE file in the root directory of this source tree.
+ */
+
+#ifdef COMPILE_SIMD_AVX512_VPOPCNT
+
+#define THE_SIMD_LEVEL SIMDLevel::AVX512_VPOPCNT
+#include <faiss/utils/hamming_distance/hamming_computer-avx512_vpopcnt.h>
+#include <faiss/utils/hamming_distance/hamming_impl.h>
+
+// Must follow the computer specializations above.
+// clang-format off
+// NOLINTNEXTLINE(facebook-hte-InlineHeader)
+#include <faiss/impl/binary_hamming/IndexBinaryIVF_impl.h>
+// clang-format on
+
+// Fails the build if the batch path stops being selected for this computer.
+static_assert(faiss::has_hamming_batch<
+              faiss::HammingComputer20_tpl<faiss::SIMDLevel::AVX512_VPOPCNT>>);
+
+#endif // COMPILE_SIMD_AVX512_VPOPCNT

data/vendor/faiss/faiss/utils/hamming_distance/hamming_computer-avx512.h

@@ -12,7 +12,7 @@
 // Types without custom AVX512 code inherit from the NONE specializations
 // in hamming_computer-generic.h. HammingComputer64 and
 // HammingComputerDefault use scalar popcount here; the VPOPCNTDQ fast
-// path lives in hamming_computer-avx512_spr.h (AVX512_SPR level).
+// path lives in hamming_computer-avx512_vpopcnt.h (AVX512_VPOPCNT level).
 // GenHammingComputer classes leverage SSE/AVX2 intrinsics.
 
 #include <cassert>