epaper 0.1.0 → 0.1.1

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@@ -0,0 +1,362 @@
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+ /*****************************************************************************
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+ * | File : dev_hardware_SPI.c
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+ * | Author : Waveshare team
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+ * | Function : Read and write /dev/SPI, hardware SPI
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+ * | Info :
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+ *----------------
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+ * | This version: V1.0
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+ * | Date : 2019-06-26
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+ * | Info : Basic version
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+ *
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+ #
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+ # Permission is hereby granted, free of charge, to any person obtaining a copy
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+ # of this software and associated documnetation files (the "Software"), to deal
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+ # in the Software without restriction, including without limitation the rights
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+ # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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+ # copies of the Software, and to permit persons to whom the Software is
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+ # furished to do so, subject to the following conditions:
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+ #
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+ # The above copyright notice and this permission notice shall be included in
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+ # all copies or substantial portions of the Software.
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+ #
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+ # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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+ # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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+ # FITNESS OR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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+ # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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+ # LIABILITY WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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+ # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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+ # THE SOFTWARE.
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+ #
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+ ******************************************************************************/
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+ #include "dev_hardware_SPI.h"
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+
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+
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+ #include <stdlib.h>
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+ #include <stdio.h>
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+
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+ #include <stdint.h>
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+ #include <unistd.h>
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+ #include <stdio.h>
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+ #include <stdlib.h>
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+ #include <getopt.h>
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+ #include <fcntl.h>
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+ #include <sys/ioctl.h>
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+ #include <linux/types.h>
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+ #include <linux/spi/spidev.h>
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+
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+ HARDWARE_SPI hardware_SPI;
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+
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+ static uint8_t bits = 8;
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+
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+ #define SPI_CS_HIGH 0x04 //Chip select high
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+ #define SPI_LSB_FIRST 0x08 //LSB
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+ #define SPI_3WIRE 0x10 //3-wire mode SI and SO same line
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+ #define SPI_LOOP 0x20 //Loopback mode
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+ #define SPI_NO_CS 0x40 //A single device occupies one SPI bus, so there is no chip select
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+ #define SPI_READY 0x80 //Slave pull low to stop data transmission
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+
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+ struct spi_ioc_transfer tr;
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+
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+
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+ /******************************************************************************
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+ function: SPI port initialization
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+ parameter:
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+ SPI_device : Device name
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+ Info:
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+ /dev/spidev0.0
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+ /dev/spidev0.1
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+ ******************************************************************************/
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+ void DEV_HARDWARE_SPI_begin(char *SPI_device)
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+ {
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+ //device
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+ int ret = 0;
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+ if((hardware_SPI.fd = open(SPI_device, O_RDWR )) < 0) {
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+ perror("Failed to open SPI device.\n");
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+ DEV_HARDWARE_SPI_Debug("Failed to open SPI device\r\n");
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+ exit(1);
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+ } else {
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+ DEV_HARDWARE_SPI_Debug("open : %s\r\n", SPI_device);
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+ }
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+ hardware_SPI.mode = 0;
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+
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+ ret = ioctl(hardware_SPI.fd, SPI_IOC_WR_BITS_PER_WORD, &bits);
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+ if (ret == -1) {
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+ DEV_HARDWARE_SPI_Debug("can't set bits per word\r\n");
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+ }
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+
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+ ret = ioctl(hardware_SPI.fd, SPI_IOC_RD_BITS_PER_WORD, &bits);
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+ if (ret == -1) {
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+ DEV_HARDWARE_SPI_Debug("can't get bits per word\r\n");
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+ }
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+ tr.bits_per_word = bits;
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+
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+ DEV_HARDWARE_SPI_Mode(SPI_MODE_0);
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+ DEV_HARDWARE_SPI_ChipSelect(SPI_CS_Mode_LOW);
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+ DEV_HARDWARE_SPI_SetBitOrder(SPI_BIT_ORDER_LSBFIRST);
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+ DEV_HARDWARE_SPI_setSpeed(20000000);
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+ DEV_HARDWARE_SPI_SetDataInterval(0);
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+ }
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+
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+ void DEV_HARDWARE_SPI_beginSet(char *SPI_device, SPIMode mode, uint32_t speed)
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+ {
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+ //device
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+ int ret = 0;
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+ hardware_SPI.mode = 0;
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+ if((hardware_SPI.fd = open(SPI_device, O_RDWR )) < 0) {
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+ perror("Failed to open SPI device.\n");
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+ exit(1);
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+ } else {
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+ DEV_HARDWARE_SPI_Debug("open : %s\r\n", SPI_device);
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+ }
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+
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+ ret = ioctl(hardware_SPI.fd, SPI_IOC_WR_BITS_PER_WORD, &bits);
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+ if (ret == -1)
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+ DEV_HARDWARE_SPI_Debug("can't set bits per word\r\n");
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+
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+ ret = ioctl(hardware_SPI.fd, SPI_IOC_RD_BITS_PER_WORD, &bits);
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+ if (ret == -1)
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+ DEV_HARDWARE_SPI_Debug("can't get bits per word\r\n");
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+
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+ DEV_HARDWARE_SPI_Mode(mode);
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+ DEV_HARDWARE_SPI_ChipSelect(SPI_CS_Mode_LOW);
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+ DEV_HARDWARE_SPI_setSpeed(speed);
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+ DEV_HARDWARE_SPI_SetDataInterval(0);
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+ }
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+
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+
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+ /******************************************************************************
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+ function: SPI device End
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+ parameter:
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+ Info:
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+ ******************************************************************************/
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+ void DEV_HARDWARE_SPI_end(void)
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+ {
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+ hardware_SPI.mode = 0;
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+ if (close(hardware_SPI.fd) != 0){
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+ DEV_HARDWARE_SPI_Debug("Failed to close SPI device\r\n");
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+ perror("Failed to close SPI device.\n");
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+ }
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+ }
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+
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+ /******************************************************************************
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+ function: Set SPI speed
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+ parameter:
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+ Info: Return 1 success
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+ Return -1 failed
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+ ******************************************************************************/
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+ int DEV_HARDWARE_SPI_setSpeed(uint32_t speed)
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+ {
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+ uint32_t speed1 = hardware_SPI.speed;
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+
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+ hardware_SPI.speed = speed;
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+
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+ //Write speed
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+ if (ioctl(hardware_SPI.fd, SPI_IOC_WR_MAX_SPEED_HZ, &speed) == -1) {
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+ DEV_HARDWARE_SPI_Debug("can't set max speed hz\r\n");
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+ hardware_SPI.speed = speed1;//Setting failure rate unchanged
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+ return -1;
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+ }
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+
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+ //Read the speed of just writing
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+ if (ioctl(hardware_SPI.fd, SPI_IOC_RD_MAX_SPEED_HZ, &speed) == -1) {
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+ DEV_HARDWARE_SPI_Debug("can't get max speed hz\r\n");
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+ hardware_SPI.speed = speed1;//Setting failure rate unchanged
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+ return -1;
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+ }
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+ hardware_SPI.speed = speed;
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+ tr.speed_hz = hardware_SPI.speed;
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+ return 1;
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+ }
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+
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+ /******************************************************************************
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+ function: Set SPI Mode
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+ parameter:
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+ Info:
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+ SPIMode:
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+ SPI_MODE0
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+ SPI_MODE1
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+ SPI_MODE2
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+ SPI_MODE3
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+ Return :
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+ Return 1 success
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+ Return -1 failed
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+ ******************************************************************************/
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+ int DEV_HARDWARE_SPI_Mode(SPIMode mode)
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+ {
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+ hardware_SPI.mode &= 0xfC;//Clear low 2 digits
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+ hardware_SPI.mode |= mode;//Setting mode
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+
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+ //Write device
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+ if (ioctl(hardware_SPI.fd, SPI_IOC_WR_MODE, &hardware_SPI.mode) == -1) {
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+ DEV_HARDWARE_SPI_Debug("can't set spi mode\r\n");
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+ return -1;
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+ }
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+ return 1;
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+ }
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+
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+ /******************************************************************************
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+ function: Set SPI CS Enable
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+ parameter:
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+ Info:
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+ EN:
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+ DISABLE
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+ ENABLE
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+ Return :
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+ Return 1 success
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+ Return -1 failed
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+ ******************************************************************************/
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+ int DEV_HARDWARE_SPI_CSEN(SPICSEN EN)
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+ {
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+ if(EN == ENABLE){
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+ hardware_SPI.mode |= SPI_NO_CS;
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+ }else {
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+ hardware_SPI.mode &= ~SPI_NO_CS;
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+ }
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+ //Write device
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+ if (ioctl(hardware_SPI.fd, SPI_IOC_WR_MODE, &hardware_SPI.mode) == -1) {
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+ DEV_HARDWARE_SPI_Debug("can't set spi CS EN\r\n");
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+ return -1;
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+ }
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+ return 1;
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+ }
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+
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+ /******************************************************************************
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+ function: Chip Select
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+ parameter:
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+ Info:
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+ CS_Mode:
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+ SPI_CS_Mode_LOW
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+ SPI_CS_Mode_HIGH
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+ SPI_CS_Mode_NONE
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+ Return :
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+ Return 1 success
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+ Return -1 failed
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+ ******************************************************************************/
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+ int DEV_HARDWARE_SPI_ChipSelect(SPIChipSelect CS_Mode)
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+ {
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+ if(CS_Mode == SPI_CS_Mode_HIGH){
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+ hardware_SPI.mode |= SPI_CS_HIGH;
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+ hardware_SPI.mode &= ~SPI_NO_CS;
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+ DEV_HARDWARE_SPI_Debug("CS HIGH \r\n");
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+ }else if(CS_Mode == SPI_CS_Mode_LOW){
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+ hardware_SPI.mode &= ~SPI_CS_HIGH;
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+ hardware_SPI.mode &= ~SPI_NO_CS;
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+ }else if(CS_Mode == SPI_CS_Mode_NONE){
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+ hardware_SPI.mode |= SPI_NO_CS;
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+ }
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+
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+ if (ioctl(hardware_SPI.fd, SPI_IOC_WR_MODE, &hardware_SPI.mode) == -1) {
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+ DEV_HARDWARE_SPI_Debug("can't set spi mode\r\n");
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+ return -1;
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+ }
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+ return 1;
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+ }
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+
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+ /******************************************************************************
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+ function: Sets the SPI bit order
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+ parameter:
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+ Info:
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+ Order:
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+ SPI_BIT_ORDER_LSBFIRST
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+ SPI_BIT_ORDER_MSBFIRST
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+ Return :
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+ Return 1 success
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+ Return -1 failed
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+ ******************************************************************************/
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+ int DEV_HARDWARE_SPI_SetBitOrder(SPIBitOrder Order)
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+ {
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+ if(Order == SPI_BIT_ORDER_LSBFIRST){
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+ hardware_SPI.mode |= SPI_LSB_FIRST;
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+ DEV_HARDWARE_SPI_Debug("SPI_LSB_FIRST\r\n");
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+ }else if(Order == SPI_BIT_ORDER_MSBFIRST){
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+ hardware_SPI.mode &= ~SPI_LSB_FIRST;
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+ DEV_HARDWARE_SPI_Debug("SPI_MSB_FIRST\r\n");
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+ }
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+
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+ // DEV_HARDWARE_SPI_Debug("hardware_SPI.mode = 0x%02x\r\n", hardware_SPI.mode);
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+ int fd = ioctl(hardware_SPI.fd, SPI_IOC_WR_MODE, &hardware_SPI.mode);
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+ DEV_HARDWARE_SPI_Debug("fd = %d\r\n",fd);
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+ if (fd == -1) {
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+ DEV_HARDWARE_SPI_Debug("can't set spi SPI_LSB_FIRST\r\n");
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+ return -1;
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+ }
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+ return 1;
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+ }
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+
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+ /******************************************************************************
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+ function: Sets the SPI Bus Mode
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+ parameter:
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+ Info:
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+ Order:
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+ SPI_3WIRE_Mode
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+ SPI_4WIRE_Mode
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+ Return :
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+ Return 1 success
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+ Return -1 failed
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+ ******************************************************************************/
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+ int DEV_HARDWARE_SPI_SetBusMode(BusMode mode)
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+ {
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+ if(mode == SPI_3WIRE_Mode){
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+ hardware_SPI.mode |= SPI_3WIRE;
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+ }else if(mode == SPI_4WIRE_Mode){
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+ hardware_SPI.mode &= ~SPI_3WIRE;
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+ }
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+ if (ioctl(hardware_SPI.fd, SPI_IOC_WR_MODE, &hardware_SPI.mode) == -1) {
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+ DEV_HARDWARE_SPI_Debug("can't set spi mode\r\n");
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+ return -1;
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+ }
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+ return 1;
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+ }
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+
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+ /******************************************************************************
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+ function:
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+ Time interval after transmission of one byte during continuous transmission
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+ parameter:
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+ us : Interval time (us)
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+ Info:
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+ ******************************************************************************/
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+ void DEV_HARDWARE_SPI_SetDataInterval(uint16_t us)
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+ {
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+ hardware_SPI.delay = us;
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+ tr.delay_usecs = hardware_SPI.delay;
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+ }
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+
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+ /******************************************************************************
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+ function: SPI port sends one byte of data
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+ parameter:
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+ buf : Sent data
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+ Info:
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+ ******************************************************************************/
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+ uint8_t DEV_HARDWARE_SPI_TransferByte(uint8_t buf)
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+ {
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+ uint8_t rbuf[1];
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+ tr.len = 1;
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+ tr.tx_buf = (unsigned long)&buf;
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+ tr.rx_buf = (unsigned long)rbuf;
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+
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+ //ioctl Operation, transmission of data
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+ if ( ioctl(hardware_SPI.fd, SPI_IOC_MESSAGE(1), &tr) < 1 )
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+ DEV_HARDWARE_SPI_Debug("can't send spi message\r\n");
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+ return rbuf[0];
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+ }
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+
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+ /******************************************************************************
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+ function: The SPI port reads a byte
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+ parameter:
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+ Info: Return read data
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+ ******************************************************************************/
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+ int DEV_HARDWARE_SPI_Transfer(uint8_t *buf, uint32_t len)
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+ {
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+ tr.len = len;
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+ tr.tx_buf = (unsigned long)buf;
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+ tr.rx_buf = (unsigned long)buf;
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+
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+ //ioctl Operation, transmission of data
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+ if (ioctl(hardware_SPI.fd, SPI_IOC_MESSAGE(1), &tr) < 1 ){
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+ DEV_HARDWARE_SPI_Debug("can't send spi message\r\n");
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+ return -1;
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+ }
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+
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+ return 1;
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+ }
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+
@@ -0,0 +1,120 @@
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+ /*****************************************************************************
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+ * | File : dev_hardware_SPI.h
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+ * | Author : Waveshare team
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+ * | Function : Read and write /dev/SPI, hardware SPI
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+ * | Info :
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+ *----------------
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+ * | This version: V1.0
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+ * | Date : 2019-06-26
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+ * | Info : Basic version
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+ *
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+ #
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+ # Permission is hereby granted, free of charge, to any person obtaining a copy
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+ # of this software and associated documnetation files (the "Software"), to deal
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+ # in the Software without restriction, including without limitation the rights
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+ # to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
16
+ # copies of the Software, and to permit persons to whom the Software is
17
+ # furished to do so, subject to the following conditions:
18
+ #
19
+ # The above copyright notice and this permission notice shall be included in
20
+ # all copies or substantial portions of the Software.
21
+ #
22
+ # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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+ # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24
+ # FITNESS OR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
25
+ # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26
+ # LIABILITY WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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+ # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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+ # THE SOFTWARE.
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+ #
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+ ******************************************************************************/
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+ #ifndef __DEV_HARDWARE_SPI_
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+ #define __DEV_HARDWARE_SPI_
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+
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+ #include <stdint.h>
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+
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+ #define DEV_HARDWARE_SPI_DEBUG 0
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+ #if DEV_HARDWARE_SPI_DEBUG
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+ #define DEV_HARDWARE_SPI_Debug(__info,...) printf("Debug: " __info,##__VA_ARGS__)
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+ #else
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+ #define DEV_HARDWARE_SPI_Debug(__info,...)
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+ #endif
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+
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+ #define SPI_CPHA 0x01
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+ #define SPI_CPOL 0x02
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+ #define SPI_MODE_0 (0|0)
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+ #define SPI_MODE_1 (0|SPI_CPHA)
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+ #define SPI_MODE_2 (SPI_CPOL|0)
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+ #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
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+
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+ typedef enum{
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+ SPI_MODE0 = SPI_MODE_0, /*!< CPOL = 0, CPHA = 0 */
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+ SPI_MODE1 = SPI_MODE_1, /*!< CPOL = 0, CPHA = 1 */
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+ SPI_MODE2 = SPI_MODE_2, /*!< CPOL = 1, CPHA = 0 */
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+ SPI_MODE3 = SPI_MODE_3 /*!< CPOL = 1, CPHA = 1 */
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+ }SPIMode;
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+
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+ typedef enum{
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+ DISABLE = 0,
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+ ENABLE = 1
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+ }SPICSEN;
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+
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+ typedef enum{
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+ SPI_CS_Mode_LOW = 0, /*!< Chip Select 0 */
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+ SPI_CS_Mode_HIGH = 1, /*!< Chip Select 1 */
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+ SPI_CS_Mode_NONE = 3 /*!< No CS, control it yourself */
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+ }SPIChipSelect;
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+
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+ typedef enum
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+ {
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+ SPI_BIT_ORDER_LSBFIRST = 0, /*!< LSB First */
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+ SPI_BIT_ORDER_MSBFIRST = 1 /*!< MSB First */
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+ }SPIBitOrder;
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+
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+ typedef enum
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+ {
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+ SPI_3WIRE_Mode = 0,
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+ SPI_4WIRE_Mode = 1
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+ }BusMode;
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+
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+
81
+ /**
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+ * Define SPI attribute
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+ **/
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+ typedef struct SPIStruct {
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+ //GPIO
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+ uint16_t SCLK_PIN;
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+ uint16_t MOSI_PIN;
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+ uint16_t MISO_PIN;
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+
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+ uint16_t CS0_PIN;
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+ uint16_t CS1_PIN;
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+
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+
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+ uint32_t speed;
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+ uint16_t mode;
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+ uint16_t delay;
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+ int fd; //
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+ } HARDWARE_SPI;
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+
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+
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+
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+
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+ void DEV_HARDWARE_SPI_begin(char *SPI_device);
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+ void DEV_HARDWARE_SPI_beginSet(char *SPI_device, SPIMode mode, uint32_t speed);
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+ void DEV_HARDWARE_SPI_end(void);
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+
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+ int DEV_HARDWARE_SPI_setSpeed(uint32_t speed);
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+
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+ uint8_t DEV_HARDWARE_SPI_TransferByte(uint8_t buf);
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+ int DEV_HARDWARE_SPI_Transfer(uint8_t *buf, uint32_t len);
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+
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+ void DEV_HARDWARE_SPI_SetDataInterval(uint16_t us);
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+ int DEV_HARDWARE_SPI_SetBusMode(BusMode mode);
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+ int DEV_HARDWARE_SPI_SetBitOrder(SPIBitOrder Order);
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+ int DEV_HARDWARE_SPI_ChipSelect(SPIChipSelect CS_Mode);
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+ int DEV_HARDWARE_SPI_CSEN(SPICSEN EN);
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+ int DEV_HARDWARE_SPI_Mode(SPIMode mode);
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+
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+
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+ #endif
@@ -0,0 +1,97 @@
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+ /**
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+ ******************************************************************************
3
+ * @file fonts.h
4
+ * @author MCD Application Team
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+ * @version V1.0.0
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+ * @date 18-February-2014
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+ * @brief Header for fonts.c file
8
+ ******************************************************************************
9
+ * @attention
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+ *
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+ * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
12
+ *
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+ * Redistribution and use in source and binary forms, with or without modification,
14
+ * are permitted provided that the following conditions are met:
15
+ * 1. Redistributions of source code must retain the above copyright notice,
16
+ * this list of conditions and the following disclaimer.
17
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
18
+ * this list of conditions and the following disclaimer in the documentation
19
+ * and/or other materials provided with the distribution.
20
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
21
+ * may be used to endorse or promote products derived from this software
22
+ * without specific prior written permission.
23
+ *
24
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34
+ *
35
+ ******************************************************************************
36
+ */
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+
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+ /* Define to prevent recursive inclusion -------------------------------------*/
39
+ #ifndef __FONTS_H
40
+ #define __FONTS_H
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+
42
+ /*�������΢���ź�24 (32x41) */
43
+ #define MAX_HEIGHT_FONT 41
44
+ #define MAX_WIDTH_FONT 32
45
+ #define OFFSET_BITMAP
46
+
47
+ #ifdef __cplusplus
48
+ extern "C" {
49
+ #endif
50
+
51
+ /* Includes ------------------------------------------------------------------*/
52
+ #include <stdint.h>
53
+
54
+ //ASCII
55
+ typedef struct _tFont
56
+ {
57
+ const uint8_t *table;
58
+ uint16_t Width;
59
+ uint16_t Height;
60
+
61
+ } sFONT;
62
+
63
+
64
+ //GB2312
65
+ typedef struct // ������ģ���ݽṹ
66
+ {
67
+ const char index[2]; // ������������
68
+ const char matrix[MAX_HEIGHT_FONT*MAX_WIDTH_FONT/8+2]; // ����������
69
+ }CH_CN;
70
+
71
+
72
+ typedef struct
73
+ {
74
+ const CH_CN *table;
75
+ uint16_t size;
76
+ uint16_t ASCII_Width;
77
+ uint16_t Width;
78
+ uint16_t Height;
79
+
80
+ }cFONT;
81
+
82
+ extern sFONT Font24;
83
+ extern sFONT Font20;
84
+ extern sFONT Font16;
85
+ extern sFONT Font12;
86
+ extern sFONT Font8;
87
+
88
+ extern cFONT Font12CN;
89
+ extern cFONT Font24CN;
90
+ #ifdef __cplusplus
91
+ }
92
+ #endif
93
+
94
+ #endif /* __FONTS_H */
95
+
96
+
97
+ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
@@ -1,5 +1,5 @@
1
1
  # frozen_string_literal: true
2
2
 
3
3
  module Epaper
4
- VERSION = "0.1.0"
4
+ VERSION = "0.1.1"
5
5
  end
metadata CHANGED
@@ -1,7 +1,7 @@
1
1
  --- !ruby/object:Gem::Specification
2
2
  name: epaper
3
3
  version: !ruby/object:Gem::Version
4
- version: 0.1.0
4
+ version: 0.1.1
5
5
  platform: ruby
6
6
  authors:
7
7
  - HeroProtagonist
@@ -55,9 +55,21 @@ files:
55
55
  - Rakefile
56
56
  - bin/console
57
57
  - bin/setup
58
+ - ext/epaper/DEV_Config.c
59
+ - ext/epaper/DEV_Config.h
60
+ - ext/epaper/Debug.h
61
+ - ext/epaper/EPD_7in5_V2.c
62
+ - ext/epaper/EPD_7in5_V2.h
63
+ - ext/epaper/GUI_Paint.c
64
+ - ext/epaper/GUI_Paint.h
65
+ - ext/epaper/RPI_sysfs_gpio.c
66
+ - ext/epaper/RPI_sysfs_gpio.h
67
+ - ext/epaper/dev_hardware_SPI.c
68
+ - ext/epaper/dev_hardware_SPI.h
58
69
  - ext/epaper/epaper.c
59
70
  - ext/epaper/epaper.h
60
71
  - ext/epaper/extconf.rb
72
+ - ext/epaper/fonts.h
61
73
  - lib/epaper.rb
62
74
  - lib/epaper/version.rb
63
75
  - waveshare_fetcher.rb