elftools 1.3.0 → 2.0.0

data/lib/elftools/constants/machine_names.rb

@@ -0,0 +1,246 @@
+# frozen_string_literal: true
+
+require 'elftools/constants/machine'
+
+# This file is generated by `bundle exec rake gen:constants`, do not edit it.
+# Source: https://sourceware.org/cgit/binutils-gdb/tree/include/elf
+
+module ELFTools
+  module Constants
+    module EM
+      # Name of each machine, see {ELFTools::Constants::EM.mapping}.
+      # @return [Hash{Integer => String}]
+      NAMES = {
+        EM_NONE => 'No machine',
+        EM_M32 => 'AT&T WE 32100',
+        EM_SPARC => 'SUN SPARC',
+        EM_386 => 'Intel 80386',
+        EM_68K => 'Motorola m68k family',
+        EM_88K => 'Motorola m88k family',
+        EM_IAMCU => 'Intel MCU',
+        EM_860 => 'Intel 80860',
+        EM_MIPS => 'MIPS R3000',
+        EM_S370 => 'IBM System/370',
+        EM_MIPS_RS3_LE => 'MIPS R3000 little-endian (Oct 4 1999 Draft). Deprecated',
+        EM_PARISC => 'HPPA',
+        EM_VPP550 => 'Fujitsu VPP500',
+        EM_SPARC32PLUS => "Sun's \"v8plus\"",
+        EM_960 => 'Intel 80960',
+        EM_PPC => 'PowerPC',
+        EM_PPC64 => '64-bit PowerPC',
+        EM_S390 => 'IBM S/390',
+        EM_SPU => 'Sony/Toshiba/IBM SPU',
+        EM_V800 => 'NEC V800 series',
+        EM_FR20 => 'Fujitsu FR20',
+        EM_RH32 => 'TRW RH32',
+        EM_MCORE => 'Motorola M*Core',
+        EM_ARM => 'ARM',
+        EM_OLD_ALPHA => 'Digital Alpha',
+        EM_SH => 'Renesas (formerly Hitachi) / SuperH SH',
+        EM_SPARCV9 => 'SPARC v9 64-bit',
+        EM_TRICORE => 'Siemens Tricore embedded processor',
+        EM_ARC => 'ARC Cores',
+        EM_H8_300 => 'Renesas (formerly Hitachi) H8/300',
+        EM_H8_300H => 'Renesas (formerly Hitachi) H8/300H',
+        EM_H8S => 'Renesas (formerly Hitachi) H8S',
+        EM_H8_500 => 'Renesas (formerly Hitachi) H8/500',
+        EM_IA_64 => 'Intel IA-64 Processor',
+        EM_MIPS_X => 'Stanford MIPS-X',
+        EM_COLDFIRE => 'Motorola Coldfire',
+        EM_68HC12 => 'Motorola M68HC12',
+        EM_MMA => 'Fujitsu Multimedia Accelerator',
+        EM_PCP => 'Siemens PCP',
+        EM_NCPU => 'Sony nCPU embedded RISC processor',
+        EM_NDR1 => 'Denso NDR1 microprocessor',
+        EM_STARCORE => 'Motorola Star*Core processor',
+        EM_ME16 => 'Toyota ME16 processor',
+        EM_ST100 => 'STMicroelectronics ST100 processor',
+        EM_TINYJ => 'Advanced Logic Corp. TinyJ embedded processor',
+        EM_X86_64 => 'Advanced Micro Devices X86-64 processor',
+        EM_PDSP => 'Sony DSP Processor',
+        EM_PDP10 => 'Digital Equipment Corp. PDP-10',
+        EM_PDP11 => 'Digital Equipment Corp. PDP-11',
+        EM_FX66 => 'Siemens FX66 microcontroller',
+        EM_ST9PLUS => 'STMicroelectronics ST9+ 8/16 bit microcontroller',
+        EM_ST7 => 'STMicroelectronics ST7 8-bit microcontroller',
+        EM_68HC16 => 'Motorola MC68HC16 Microcontroller',
+        EM_68HC11 => 'Motorola MC68HC11 Microcontroller',
+        EM_68HC08 => 'Motorola MC68HC08 Microcontroller',
+        EM_68HC05 => 'Motorola MC68HC05 Microcontroller',
+        EM_SVX => 'Silicon Graphics SVx',
+        EM_ST19 => 'STMicroelectronics ST19 8-bit cpu',
+        EM_VAX => 'Digital VAX',
+        EM_CRIS => 'Axis Communications 32-bit embedded processor',
+        EM_JAVELIN => 'Infineon Technologies 32-bit embedded cpu',
+        EM_FIREPATH => 'Element 14 64-bit DSP processor',
+        EM_ZSP => "LSI Logic's 16-bit DSP processor",
+        EM_MMIX => "Donald Knuth's educational 64-bit processor",
+        EM_HUANY => "Harvard's machine-independent format",
+        EM_PRISM => 'SiTera Prism',
+        EM_AVR => 'Atmel AVR 8-bit microcontroller',
+        EM_FR30 => 'Fujitsu FR30',
+        EM_D10V => 'Mitsubishi D10V',
+        EM_D30V => 'Mitsubishi D30V',
+        EM_V850 => 'Renesas V850 (formerly NEC V850)',
+        EM_M32R => 'Renesas M32R (formerly Mitsubishi M32R)',
+        EM_MN10300 => 'Matsushita MN10300',
+        EM_MN10200 => 'Matsushita MN10200',
+        EM_PJ => 'picoJava',
+        EM_OR1K => 'OpenRISC 1000 32-bit embedded processor',
+        EM_ARC_COMPACT => 'ARC International ARCompact processor',
+        EM_XTENSA => 'Tensilica Xtensa Architecture',
+        EM_VIDEOCORE => 'Alphamosaic VideoCore processor',
+        EM_TMM_GPP => 'Thompson Multimedia General Purpose Processor',
+        EM_NS32K => 'National Semiconductor 32000 series',
+        EM_TPC => 'Tenor Network TPC processor',
+        EM_SNP1K => 'Trebia SNP 1000 processor',
+        EM_ST200 => 'STMicroelectronics ST200 microcontroller',
+        EM_IP2K => 'Ubicom IP2022 micro controller',
+        EM_MAX => 'MAX Processor',
+        EM_CR => 'National Semiconductor CompactRISC',
+        EM_F2MC16 => 'Fujitsu F2MC16',
+        EM_MSP430 => 'TI msp430 micro controller',
+        EM_BLACKFIN => 'ADI Blackfin',
+        EM_SE_C33 => 'S1C33 Family of Seiko Epson processors',
+        EM_SEP => 'Sharp embedded microprocessor',
+        EM_ARCA => 'Arca RISC Microprocessor',
+        EM_UNICORE => 'Microprocessor series from PKU-Unity Ltd. and MPRC of Peking University',
+        EM_EXCESS => 'eXcess: 16/32/64-bit configurable embedded CPU',
+        EM_DXP => 'Icera Semiconductor Inc. Deep Execution Processor',
+        EM_ALTERA_NIOS2 => 'Altera Nios II soft-core processor',
+        EM_CRX => 'National Semiconductor CRX',
+        EM_XGATE => 'Motorola XGATE embedded processor',
+        EM_C166 => 'Infineon C16x/XC16x processor',
+        EM_M16C => 'Renesas M16C series microprocessors',
+        EM_DSPIC30F => 'Microchip Technology dsPIC30F Digital Signal Controller',
+        EM_CE => 'Freescale Communication Engine RISC core',
+        EM_M32C => 'Renesas M32C series microprocessors',
+        EM_TSK3000 => 'Altium TSK3000 core',
+        EM_RS08 => 'Freescale RS08 embedded processor',
+        EM_ECOG2 => 'Cyan Technology eCOG2 microprocessor',
+        EM_SCORE7 => 'Sunplus S+core7 RISC processor',
+        EM_DSP24 => 'New Japan Radio (NJR) 24-bit DSP Processor',
+        EM_VIDEOCORE3 => 'Broadcom VideoCore III processor',
+        EM_LATTICEMICO32 => 'RISC processor for Lattice FPGA architecture',
+        EM_SE_C17 => 'Seiko Epson C17 family',
+        EM_TI_C6000 => 'Texas Instruments TMS320C6000 DSP family',
+        EM_TI_C2000 => 'Texas Instruments TMS320C2000 DSP family',
+        EM_TI_C5500 => 'Texas Instruments TMS320C55x DSP family',
+        EM_TI_PRU => 'Texas Instruments Programmable Realtime Unit',
+        EM_MMDSP_PLUS => 'STMicroelectronics 64bit VLIW Data Signal Processor',
+        EM_CYPRESS_M8C => 'Cypress M8C microprocessor',
+        EM_R32C => 'Renesas R32C series microprocessors',
+        EM_TRIMEDIA => 'NXP Semiconductors TriMedia architecture family',
+        EM_QDSP6 => 'QUALCOMM DSP6 Processor',
+        EM_8051 => 'Intel 8051 and variants',
+        EM_STXP7X => 'STMicroelectronics STxP7x family',
+        EM_NDS32 => 'Andes Technology compact code size embedded RISC processor family',
+        EM_ECOG1 => 'Cyan Technology eCOG1X family',
+        EM_MAXQ30 => 'Dallas Semiconductor MAXQ30 Core Micro-controllers',
+        EM_XIMO16 => 'New Japan Radio (NJR) 16-bit DSP Processor',
+        EM_MANIK => 'M2000 Reconfigurable RISC Microprocessor',
+        EM_CRAYNV2 => 'Cray Inc. NV2 vector architecture',
+        EM_RX => 'Renesas RX family',
+        EM_METAG => 'Imagination Technologies Meta processor architecture',
+        EM_MCST_ELBRUS => 'MCST Elbrus general purpose hardware architecture',
+        EM_ECOG16 => 'Cyan Technology eCOG16 family',
+        EM_CR16 => 'National Semiconductor CompactRISC 16-bit processor',
+        EM_ETPU => 'Freescale Extended Time Processing Unit',
+        EM_SLE9X => 'Infineon Technologies SLE9X core',
+        EM_L1OM => 'Intel L1OM',
+        EM_K1OM => 'Intel K1OM',
+        EM_INTEL182 => 'Reserved by Intel',
+        EM_AARCH64 => 'ARM 64-bit architecture',
+        EM_ARM184 => 'Reserved by ARM',
+        EM_AVR32 => 'Atmel Corporation 32-bit microprocessor family',
+        EM_STM8 => 'STMicroeletronics STM8 8-bit microcontroller',
+        EM_TILE64 => 'Tilera TILE64 multicore architecture family',
+        EM_TILEPRO => 'Tilera TILEPro multicore architecture family',
+        EM_MICROBLAZE => 'Xilinx MicroBlaze 32-bit RISC soft processor core',
+        EM_CUDA => 'NVIDIA CUDA architecture',
+        EM_TILEGX => 'Tilera TILE-Gx multicore architecture family',
+        EM_CLOUDSHIELD => 'CloudShield architecture family',
+        EM_COREA_1ST => 'KIPO-KAIST Core-A 1st generation processor family',
+        EM_COREA_2ND => 'KIPO-KAIST Core-A 2nd generation processor family',
+        EM_ARC_COMPACT2 => 'Synopsys ARCompact V2',
+        EM_OPEN8 => 'Open8 8-bit RISC soft processor core',
+        EM_RL78 => 'Renesas RL78 family',
+        EM_VIDEOCORE5 => 'Broadcom VideoCore V processor',
+        EM_78K0R => 'Renesas 78K0R',
+        EM_56800EX => 'Freescale 56800EX Digital Signal Controller (DSC)',
+        EM_BA1 => 'Beyond BA1 CPU architecture',
+        EM_BA2 => 'Beyond BA2 CPU architecture',
+        EM_XCORE => 'XMOS xCORE processor family',
+        EM_MCHP_PIC => 'Microchip 8-bit PIC(r) family',
+        EM_INTELGT => 'Intel Graphics Technology',
+        EM_INTEL206 => 'Reserved by Intel',
+        EM_INTEL207 => 'Reserved by Intel',
+        EM_INTEL208 => 'Reserved by Intel',
+        EM_INTEL209 => 'Reserved by Intel',
+        EM_KM32 => 'KM211 KM32 32-bit processor',
+        EM_KMX32 => 'KM211 KMX32 32-bit processor',
+        EM_KMX16 => 'KM211 KMX16 16-bit processor',
+        EM_KMX8 => 'KM211 KMX8 8-bit processor',
+        EM_KVARC => 'KM211 KVARC processor',
+        EM_CDP => 'Paneve CDP architecture family',
+        EM_COGE => 'Cognitive Smart Memory Processor',
+        EM_COOL => 'Bluechip Systems CoolEngine',
+        EM_NORC => 'Nanoradio Optimized RISC',
+        EM_CSR_KALIMBA => 'CSR Kalimba architecture family',
+        EM_Z80 => 'Zilog Z80',
+        EM_VISIUM => 'Controls and Data Services VISIUMcore processor',
+        EM_FT32 => 'FTDI Chip FT32 high performance 32-bit RISC architecture',
+        EM_MOXIE => 'Moxie processor family',
+        EM_AMDGPU => 'AMD GPU architecture',
+        EM_RISCV => 'RISC-V',
+        EM_LANAI => 'Lanai 32-bit processor',
+        EM_CEVA => 'CEVA Processor Architecture Family',
+        EM_CEVA_X2 => 'CEVA X2 Processor Family',
+        EM_BPF => 'Linux BPF - in-kernel virtual machine',
+        EM_GRAPHCORE_IPU => 'Graphcore Intelligent Processing Unit',
+        EM_IMG1 => 'Imagination Technologies',
+        EM_NFP => 'Netronome Flow Processor',
+        EM_VE => 'NEC Vector Engine',
+        EM_CSKY => 'C-SKY processor family',
+        EM_ARC_COMPACT3_64 => 'Synopsys ARCv2.3 64-bit',
+        EM_MCS6502 => 'MOS Technology MCS 6502 processor',
+        EM_ARC_COMPACT3 => 'Synopsys ARCv2.3 32-bit',
+        EM_KVX => 'Kalray VLIW core of the MPPA processor family',
+        EM_65816 => 'WDC 65816/65C816',
+        EM_LOONGARCH => 'LoongArch',
+        EM_KF32 => 'ChipON KungFu32',
+        EM_U16_U8CORE => 'LAPIS nX-U16/U8',
+        EM_TACHYUM => 'Tachyum',
+        EM_56800EF => 'NXP 56800EF Digital Signal Controller (DSC)',
+        EM_AVR_OLD => 'AVR magic number. Written in the absense of an ABI',
+        EM_MSP430_OLD => 'MSP430 magic number. Written in the absense of everything',
+        EM_ADAPTEVA_EPIPHANY => "Adapteva's Epiphany architecture",
+        EM_MT => 'Morpho MT. Written in the absense of an ABI',
+        EM_CYGNUS_FR30 => 'FR30 magic number - no EABI available',
+        EM_WEBASSEMBLY => 'Unofficial value for Web Assembly binaries, as used by LLVM',
+        EM_XC16X => 'Infineon Technologies 16-bit microcontroller with C166-V2 core',
+        EM_S12Z => 'Freescale S12Z. The Freescale toolchain generates elf files with this value',
+        EM_CYGNUS_FRV => 'FRV magic number - no EABI available??',
+        EM_DLX => 'DLX magic number. Written in the absense of an ABI',
+        EM_CYGNUS_D10V => 'D10V backend magic number. Written in the absence of an ABI',
+        EM_CYGNUS_D30V => 'D30V backend magic number. Written in the absence of an ABI',
+        EM_IP2K_OLD => 'Ubicom IP2xxx; Written in the absense of an ABI',
+        EM_CYGNUS_POWERPC => 'Cygnus PowerPC ELF backend. Written in the absence of an ABI',
+        EM_ALPHA => 'Alpha backend magic number. Written in the absence of an ABI',
+        EM_CYGNUS_M32R => 'Cygnus M32R ELF backend. Written in the absence of an ABI',
+        EM_CYGNUS_V850 => 'V850 backend magic number. Written in the absense of an ABI',
+        EM_S390_OLD => 'old S/390 backend magic number. Written in the absence of an ABI',
+        EM_XTENSA_OLD => 'Old, unofficial value for Xtensa',
+        EM_XSTORMY16 => 'Sanyo XStormy16 CPU core',
+        EM_MICROBLAZE_OLD => 'Old MicroBlaze',
+        EM_CYGNUS_MN10300 => 'mn10200 and mn10300 backend magic numbers. Written in the absense of an ABI',
+        EM_CYGNUS_MN10200 => 'mn10200 and mn10300 backend magic numbers. Written in the absense of an ABI',
+        EM_CYGNUS_MEP => 'Toshiba MeP',
+        EM_M32C_OLD => 'Renesas M32C and M16C',
+        EM_IQ2000 => 'Vitesse IQ2000',
+        EM_NIOS32 => 'NIOS magic number - no EABI available',
+        EM_MOXIE_OLD => 'Old, unofficial value for Moxie'
+      }.freeze
+    end
+  end
+end

data/lib/elftools/constants/relocation/aarch64.rb

@@ -0,0 +1,213 @@
+# frozen_string_literal: true
+
+# This file is generated by `bundle exec rake gen:constants`, do not edit it.
+# Source: https://sourceware.org/cgit/binutils-gdb/tree/include/elf
+
+module ELFTools
+  module Constants
+    module R
+      # Relocation types of AARCH64.
+      module AARCH64
+        R_AARCH64_NONE                            = 0 # No reloc
+        R_AARCH64_P32_ABS32                       = 1 # :nodoc:
+        R_AARCH64_P32_ABS16                       = 2 # :nodoc:
+        R_AARCH64_P32_PREL32                      = 3 # :nodoc:
+        R_AARCH64_P32_PREL16                      = 4 # :nodoc:
+        R_AARCH64_P32_MOVW_UABS_G0                = 5 # :nodoc:
+        R_AARCH64_P32_MOVW_UABS_G0_NC             = 6 # :nodoc:
+        R_AARCH64_P32_MOVW_UABS_G1                = 7 # :nodoc:
+        R_AARCH64_P32_MOVW_SABS_G0                = 8 # :nodoc:
+        R_AARCH64_P32_LD_PREL_LO19                = 9 # :nodoc:
+        R_AARCH64_P32_ADR_PREL_LO21               = 10 # :nodoc:
+        R_AARCH64_P32_ADR_PREL_PG_HI21            = 11 # :nodoc:
+        R_AARCH64_P32_ADD_ABS_LO12_NC             = 12 # :nodoc:
+        R_AARCH64_P32_LDST8_ABS_LO12_NC           = 13 # :nodoc:
+        R_AARCH64_P32_LDST16_ABS_LO12_NC          = 14 # :nodoc:
+        R_AARCH64_P32_LDST32_ABS_LO12_NC          = 15 # :nodoc:
+        R_AARCH64_P32_LDST64_ABS_LO12_NC          = 16 # :nodoc:
+        R_AARCH64_P32_LDST128_ABS_LO12_NC         = 17 # :nodoc:
+        R_AARCH64_P32_TSTBR14                     = 18 # :nodoc:
+        R_AARCH64_P32_CONDBR19                    = 19 # :nodoc:
+        R_AARCH64_P32_JUMP26                      = 20 # :nodoc:
+        R_AARCH64_P32_CALL26                      = 21 # :nodoc:
+        R_AARCH64_P32_MOVW_PREL_G0                = 22 # :nodoc:
+        R_AARCH64_P32_MOVW_PREL_G0_NC             = 23 # :nodoc:
+        R_AARCH64_P32_MOVW_PREL_G1                = 24 # :nodoc:
+        R_AARCH64_P32_GOT_LD_PREL19               = 25 # :nodoc:
+        R_AARCH64_P32_ADR_GOT_PAGE                = 26 # :nodoc:
+        R_AARCH64_P32_LD32_GOT_LO12_NC            = 27 # :nodoc:
+        R_AARCH64_P32_LD32_GOTPAGE_LO14           = 28 # :nodoc:
+        R_AARCH64_P32_TLSGD_ADR_PREL21            = 80 # :nodoc:
+        R_AARCH64_P32_TLSGD_ADR_PAGE21            = 81 # :nodoc:
+        R_AARCH64_P32_TLSGD_ADD_LO12_NC           = 82 # :nodoc:
+        R_AARCH64_P32_TLSLD_ADR_PREL21            = 83 # :nodoc:
+        R_AARCH64_P32_TLSLD_ADR_PAGE21            = 84 # :nodoc:
+        R_AARCH64_P32_TLSLD_ADD_LO12_NC           = 85 # :nodoc:
+        R_AARCH64_P32_TLSLD_MOVW_DTPREL_G1        = 87 # :nodoc:
+        R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0        = 88 # :nodoc:
+        R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0_NC     = 89 # :nodoc:
+        R_AARCH64_P32_TLSLD_ADD_DTPREL_HI12       = 90 # :nodoc:
+        R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12       = 91 # :nodoc:
+        R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12_NC    = 92 # :nodoc:
+        R_AARCH64_P32_TLSIE_ADR_GOTTPREL_PAGE21   = 103 # :nodoc:
+        R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC = 104 # :nodoc:
+        R_AARCH64_P32_TLSIE_LD_GOTTPREL_PREL19    = 105 # :nodoc:
+        R_AARCH64_P32_TLSLE_MOVW_TPREL_G1         = 106 # :nodoc:
+        R_AARCH64_P32_TLSLE_MOVW_TPREL_G0         = 107 # :nodoc:
+        R_AARCH64_P32_TLSLE_MOVW_TPREL_G0_NC      = 108 # :nodoc:
+        R_AARCH64_P32_TLSLE_ADD_TPREL_HI12        = 109 # :nodoc:
+        R_AARCH64_P32_TLSLE_ADD_TPREL_LO12        = 110 # :nodoc:
+        R_AARCH64_P32_TLSLE_ADD_TPREL_LO12_NC     = 111 # :nodoc:
+        R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12      = 112 # :nodoc:
+        R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC   = 113 # :nodoc:
+        R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12     = 114 # :nodoc:
+        R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC  = 115 # :nodoc:
+        R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12     = 116 # :nodoc:
+        R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC  = 117 # :nodoc:
+        R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12     = 118 # :nodoc:
+        R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC  = 119 # :nodoc:
+        R_AARCH64_P32_TLSDESC_LD_PREL19           = 122 # :nodoc:
+        R_AARCH64_P32_TLSDESC_ADR_PREL21          = 123 # :nodoc:
+        R_AARCH64_P32_TLSDESC_ADR_PAGE21          = 124 # :nodoc:
+        R_AARCH64_P32_TLSDESC_LD32_LO12_NC        = 125 # :nodoc:
+        R_AARCH64_P32_TLSDESC_ADD_LO12_NC         = 126 # :nodoc:
+        R_AARCH64_P32_TLSDESC_CALL                = 127 # :nodoc:
+        R_AARCH64_P32_COPY                        = 180 # :nodoc:
+        R_AARCH64_P32_GLOB_DAT                    = 181 # :nodoc:
+        R_AARCH64_P32_JUMP_SLOT                   = 182 # :nodoc:
+        R_AARCH64_P32_RELATIVE                    = 183 # :nodoc:
+        R_AARCH64_P32_TLS_DTPMOD                  = 184 # :nodoc:
+        R_AARCH64_P32_TLS_DTPREL                  = 185 # :nodoc:
+        R_AARCH64_P32_TLS_TPREL                   = 186 # :nodoc:
+        R_AARCH64_P32_TLSDESC                     = 187 # :nodoc:
+        R_AARCH64_P32_IRELATIVE                   = 188 # :nodoc:
+        R_AARCH64_NULL                            = 256 # No reloc
+        R_AARCH64_ABS64                           = 257 # :nodoc:
+        R_AARCH64_ABS32                           = 258 # :nodoc:
+        R_AARCH64_ABS16                           = 259 # :nodoc:
+        R_AARCH64_PREL64                          = 260 # :nodoc:
+        R_AARCH64_PREL32                          = 261 # :nodoc:
+        R_AARCH64_PREL16                          = 262 # :nodoc:
+        R_AARCH64_MOVW_UABS_G0                    = 263 # :nodoc:
+        R_AARCH64_MOVW_UABS_G0_NC                 = 264 # :nodoc:
+        R_AARCH64_MOVW_UABS_G1                    = 265 # :nodoc:
+        R_AARCH64_MOVW_UABS_G1_NC                 = 266 # :nodoc:
+        R_AARCH64_MOVW_UABS_G2                    = 267 # :nodoc:
+        R_AARCH64_MOVW_UABS_G2_NC                 = 268 # :nodoc:
+        R_AARCH64_MOVW_UABS_G3                    = 269 # :nodoc:
+        R_AARCH64_MOVW_SABS_G0                    = 270 # :nodoc:
+        R_AARCH64_MOVW_SABS_G1                    = 271 # :nodoc:
+        R_AARCH64_MOVW_SABS_G2                    = 272 # :nodoc:
+        R_AARCH64_LD_PREL_LO19                    = 273 # :nodoc:
+        R_AARCH64_ADR_PREL_LO21                   = 274 # :nodoc:
+        R_AARCH64_ADR_PREL_PG_HI21                = 275 # :nodoc:
+        R_AARCH64_ADR_PREL_PG_HI21_NC             = 276 # :nodoc:
+        R_AARCH64_ADD_ABS_LO12_NC                 = 277 # :nodoc:
+        R_AARCH64_LDST8_ABS_LO12_NC               = 278 # :nodoc:
+        R_AARCH64_TSTBR14                         = 279 # :nodoc:
+        R_AARCH64_CONDBR19                        = 280 # :nodoc:
+        R_AARCH64_JUMP26                          = 282 # :nodoc:
+        R_AARCH64_CALL26                          = 283 # :nodoc:
+        R_AARCH64_LDST16_ABS_LO12_NC              = 284 # :nodoc:
+        R_AARCH64_LDST32_ABS_LO12_NC              = 285 # :nodoc:
+        R_AARCH64_LDST64_ABS_LO12_NC              = 286 # :nodoc:
+        R_AARCH64_MOVW_PREL_G0                    = 287 # :nodoc:
+        R_AARCH64_MOVW_PREL_G0_NC                 = 288 # :nodoc:
+        R_AARCH64_MOVW_PREL_G1                    = 289 # :nodoc:
+        R_AARCH64_MOVW_PREL_G1_NC                 = 290 # :nodoc:
+        R_AARCH64_MOVW_PREL_G2                    = 291 # :nodoc:
+        R_AARCH64_MOVW_PREL_G2_NC                 = 292 # :nodoc:
+        R_AARCH64_MOVW_PREL_G3                    = 293 # :nodoc:
+        R_AARCH64_LDST128_ABS_LO12_NC             = 299 # :nodoc:
+        R_AARCH64_MOVW_GOTOFF_G0                  = 300 # :nodoc:
+        R_AARCH64_MOVW_GOTOFF_G0_NC               = 301 # :nodoc:
+        R_AARCH64_MOVW_GOTOFF_G1                  = 302 # :nodoc:
+        R_AARCH64_MOVW_GOTOFF_G1_NC               = 303 # :nodoc:
+        R_AARCH64_MOVW_GOTOFF_G2                  = 304 # :nodoc:
+        R_AARCH64_MOVW_GOTOFF_G2_NC               = 305 # :nodoc:
+        R_AARCH64_MOVW_GOTOFF_G3                  = 306 # :nodoc:
+        R_AARCH64_GOTREL64                        = 307 # :nodoc:
+        R_AARCH64_GOTREL32                        = 308 # :nodoc:
+        R_AARCH64_GOT_LD_PREL19                   = 309 # :nodoc:
+        R_AARCH64_LD64_GOTOFF_LO15                = 310 # :nodoc:
+        R_AARCH64_ADR_GOT_PAGE                    = 311 # :nodoc:
+        R_AARCH64_LD64_GOT_LO12_NC                = 312 # :nodoc:
+        R_AARCH64_LD64_GOTPAGE_LO15               = 313 # :nodoc:
+        R_AARCH64_TLSGD_ADR_PREL21                = 512 # :nodoc:
+        R_AARCH64_TLSGD_ADR_PAGE21                = 513 # :nodoc:
+        R_AARCH64_TLSGD_ADD_LO12_NC               = 514 # :nodoc:
+        R_AARCH64_TLSGD_MOVW_G1                   = 515 # :nodoc:
+        R_AARCH64_TLSGD_MOVW_G0_NC                = 516 # :nodoc:
+        R_AARCH64_TLSLD_ADR_PREL21                = 517 # :nodoc:
+        R_AARCH64_TLSLD_ADR_PAGE21                = 518 # :nodoc:
+        R_AARCH64_TLSLD_ADD_LO12_NC               = 519 # :nodoc:
+        R_AARCH64_TLSLD_MOVW_G1                   = 520 # :nodoc:
+        R_AARCH64_TLSLD_MOVW_G0_NC                = 521 # :nodoc:
+        R_AARCH64_TLSLD_LD_PREL19                 = 522 # :nodoc:
+        R_AARCH64_TLSLD_MOVW_DTPREL_G2            = 523 # :nodoc:
+        R_AARCH64_TLSLD_MOVW_DTPREL_G1            = 524 # :nodoc:
+        R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC         = 525 # :nodoc:
+        R_AARCH64_TLSLD_MOVW_DTPREL_G0            = 526 # :nodoc:
+        R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC         = 527 # :nodoc:
+        R_AARCH64_TLSLD_ADD_DTPREL_HI12           = 528 # :nodoc:
+        R_AARCH64_TLSLD_ADD_DTPREL_LO12           = 529 # :nodoc:
+        R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC        = 530 # :nodoc:
+        R_AARCH64_TLSLD_LDST8_DTPREL_LO12         = 531 # :nodoc:
+        R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC      = 532 # :nodoc:
+        R_AARCH64_TLSLD_LDST16_DTPREL_LO12        = 533 # :nodoc:
+        R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC     = 534 # :nodoc:
+        R_AARCH64_TLSLD_LDST32_DTPREL_LO12        = 535 # :nodoc:
+        R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC     = 536 # :nodoc:
+        R_AARCH64_TLSLD_LDST64_DTPREL_LO12        = 537 # :nodoc:
+        R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC     = 538 # :nodoc:
+        R_AARCH64_TLSIE_MOVW_GOTTPREL_G1          = 539 # :nodoc:
+        R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC       = 540 # :nodoc:
+        R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21       = 541 # :nodoc:
+        R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC     = 542 # :nodoc:
+        R_AARCH64_TLSIE_LD_GOTTPREL_PREL19        = 543 # :nodoc:
+        R_AARCH64_TLSLE_MOVW_TPREL_G2             = 544 # :nodoc:
+        R_AARCH64_TLSLE_MOVW_TPREL_G1             = 545 # :nodoc:
+        R_AARCH64_TLSLE_MOVW_TPREL_G1_NC          = 546 # :nodoc:
+        R_AARCH64_TLSLE_MOVW_TPREL_G0             = 547 # :nodoc:
+        R_AARCH64_TLSLE_MOVW_TPREL_G0_NC          = 548 # :nodoc:
+        R_AARCH64_TLSLE_ADD_TPREL_HI12            = 549 # :nodoc:
+        R_AARCH64_TLSLE_ADD_TPREL_LO12            = 550 # :nodoc:
+        R_AARCH64_TLSLE_ADD_TPREL_LO12_NC         = 551 # :nodoc:
+        R_AARCH64_TLSLE_LDST8_TPREL_LO12          = 552 # :nodoc:
+        R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC       = 553 # :nodoc:
+        R_AARCH64_TLSLE_LDST16_TPREL_LO12         = 554 # :nodoc:
+        R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC      = 555 # :nodoc:
+        R_AARCH64_TLSLE_LDST32_TPREL_LO12         = 556 # :nodoc:
+        R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC      = 557 # :nodoc:
+        R_AARCH64_TLSLE_LDST64_TPREL_LO12         = 558 # :nodoc:
+        R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC      = 559 # :nodoc:
+        R_AARCH64_TLSDESC_LD_PREL19               = 560 # :nodoc:
+        R_AARCH64_TLSDESC_ADR_PREL21              = 561 # :nodoc:
+        R_AARCH64_TLSDESC_ADR_PAGE21              = 562 # :nodoc:
+        R_AARCH64_TLSDESC_LD64_LO12               = 563 # :nodoc:
+        R_AARCH64_TLSDESC_ADD_LO12                = 564 # :nodoc:
+        R_AARCH64_TLSDESC_OFF_G1                  = 565 # :nodoc:
+        R_AARCH64_TLSDESC_OFF_G0_NC               = 566 # :nodoc:
+        R_AARCH64_TLSDESC_LDR                     = 567 # :nodoc:
+        R_AARCH64_TLSDESC_ADD                     = 568 # :nodoc:
+        R_AARCH64_TLSDESC_CALL                    = 569 # :nodoc:
+        R_AARCH64_TLSLE_LDST128_TPREL_LO12        = 570 # :nodoc:
+        R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC     = 571 # :nodoc:
+        R_AARCH64_TLSLD_LDST128_DTPREL_LO12       = 572 # :nodoc:
+        R_AARCH64_TLSLD_LDST128_DTPREL_LO12_NC    = 573 # :nodoc:
+        R_AARCH64_COPY                            = 1024 # :nodoc:
+        R_AARCH64_GLOB_DAT                        = 1025 # :nodoc:
+        R_AARCH64_JUMP_SLOT                       = 1026 # :nodoc:
+        R_AARCH64_RELATIVE                        = 1027 # :nodoc:
+        R_AARCH64_TLS_DTPMOD                      = 1028 # :nodoc:
+        R_AARCH64_TLS_DTPMOD64                    = 1028 # :nodoc:
+        R_AARCH64_TLS_DTPREL                      = 1029 # :nodoc:
+        R_AARCH64_TLS_DTPREL64                    = 1029 # :nodoc:
+        R_AARCH64_TLS_TPREL                       = 1030 # :nodoc:
+        R_AARCH64_TLS_TPREL64                     = 1030 # :nodoc:
+        R_AARCH64_TLSDESC                         = 1031 # :nodoc:
+        R_AARCH64_IRELATIVE                       = 1032 # :nodoc:
+      end
+    end
+  end
+end

data/lib/elftools/constants/relocation/alpha.rb

@@ -0,0 +1,47 @@
+# frozen_string_literal: true
+
+# This file is generated by `bundle exec rake gen:constants`, do not edit it.
+# Source: https://sourceware.org/cgit/binutils-gdb/tree/include/elf
+
+module ELFTools
+  module Constants
+    module R
+      # Relocation types of ALPHA.
+      module ALPHA
+        R_ALPHA_NONE      = 0 # No reloc
+        R_ALPHA_REFLONG   = 1 # Direct 32 bit
+        R_ALPHA_REFQUAD   = 2 # Direct 64 bit
+        R_ALPHA_GPREL32   = 3 # GP relative 32 bit
+        R_ALPHA_LITERAL   = 4 # GP relative 16 bit w/optimization
+        R_ALPHA_LITUSE    = 5 # Optimization hint for LITERAL
+        R_ALPHA_GPDISP    = 6 # Add displacement to GP
+        R_ALPHA_BRADDR    = 7 # PC+4 relative 23 bit shifted
+        R_ALPHA_HINT      = 8 # PC+4 relative 16 bit shifted
+        R_ALPHA_SREL16    = 9 # PC relative 16 bit
+        R_ALPHA_SREL32    = 10 # PC relative 32 bit
+        R_ALPHA_SREL64    = 11 # PC relative 64 bit
+        R_ALPHA_GPRELHIGH = 17 # GP relative 32 bit, high 16 bits
+        R_ALPHA_GPRELLOW  = 18 # GP relative 32 bit, low 16 bits
+        R_ALPHA_GPREL16   = 19 # GP relative 16 bit
+        R_ALPHA_COPY      = 24 # Copy symbol at runtime
+        R_ALPHA_GLOB_DAT  = 25 # Create GOT entry
+        R_ALPHA_JMP_SLOT  = 26 # Create PLT entry
+        R_ALPHA_RELATIVE  = 27 # Adjust by program base
+        R_ALPHA_BRSGP     = 28 # :nodoc:
+        R_ALPHA_TLSGD     = 29 # :nodoc:
+        R_ALPHA_TLSLDM    = 30 # :nodoc:
+        R_ALPHA_DTPMOD64  = 31 # :nodoc:
+        R_ALPHA_GOTDTPREL = 32 # :nodoc:
+        R_ALPHA_DTPREL64  = 33 # :nodoc:
+        R_ALPHA_DTPRELHI  = 34 # :nodoc:
+        R_ALPHA_DTPRELLO  = 35 # :nodoc:
+        R_ALPHA_DTPREL16  = 36 # :nodoc:
+        R_ALPHA_GOTTPREL  = 37 # :nodoc:
+        R_ALPHA_TPREL64   = 38 # :nodoc:
+        R_ALPHA_TPRELHI   = 39 # :nodoc:
+        R_ALPHA_TPRELLO   = 40 # :nodoc:
+        R_ALPHA_TPREL16   = 41 # :nodoc:
+      end
+    end
+  end
+end

data/lib/elftools/constants/relocation/amdgpu.rb

@@ -0,0 +1,28 @@
+# frozen_string_literal: true
+
+# This file is generated by `bundle exec rake gen:constants`, do not edit it.
+# Source: https://sourceware.org/cgit/binutils-gdb/tree/include/elf
+
+module ELFTools
+  module Constants
+    module R
+      # Relocation types of AMDGPU.
+      module AMDGPU
+        R_AMDGPU_NONE          = 0 # :nodoc:
+        R_AMDGPU_ABS32_LO      = 1 # :nodoc:
+        R_AMDGPU_ABS32_HI      = 2 # :nodoc:
+        R_AMDGPU_ABS64         = 3 # :nodoc:
+        R_AMDGPU_REL32         = 4 # :nodoc:
+        R_AMDGPU_REL64         = 5 # :nodoc:
+        R_AMDGPU_ABS32         = 6 # :nodoc:
+        R_AMDGPU_GOTPCREL      = 7 # :nodoc:
+        R_AMDGPU_GOTPCREL32_LO = 8 # :nodoc:
+        R_AMDGPU_GOTPCREL32_HI = 9 # :nodoc:
+        R_AMDGPU_REL32_LO      = 10 # :nodoc:
+        R_AMDGPU_REL32_HI      = 11 # :nodoc:
+        R_AMDGPU_RELATIVE64    = 13 # :nodoc:
+        R_AMDGPU_REL16         = 16 # :nodoc:
+      end
+    end
+  end
+end