ecic 0.3.0 → 0.4.0

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@@ -1,7 +1,7 @@
1
1
  PATH
2
2
  remote: .
3
3
  specs:
4
- ecic (0.3.0)
4
+ ecic (0.4.0)
5
5
  activesupport (~> 5.2)
6
6
  colorize (~> 0.8)
7
7
  rake (~> 12.3)
data/README.md CHANGED
@@ -64,9 +64,9 @@ To see the full list of options for the `ecic generate library` command, run `ec
64
64
 
65
65
  ### Create new RTL file
66
66
 
67
- Creating a **new** RTL design can be done with the `ecic generate design` command. For VHDL designs, this command will generate both the component, entity and architecture and for SystemVerilog it will create a module. If you already have existing RTL design files you wish to add to the project, you should use the `ecic add design` command instead, see the 'Add existing RTL files' section.
67
+ Creating a **new** RTL design can be done with the `ecic generate design` command. For VHDL designs, this command will generate both the component, entity and architecture and for SystemVerilog it will create a module. If you already have existing RTL design files you wish to add to the project, you should use the `ecic add design` command instead, see the `Add existing RTL files` section.
68
68
 
69
- The type of RTL design (VHDL or Verilog) to create is controlled by a `--type=vhdl|verilog` option and defaults to the value defined by the `config.generator.library.type.default` setting in the `./src/config/ecic.rb` configuratinon file.
69
+ The type of RTL design (VHDL or Verilog) to create is controlled by a `--type=vhdl|sv` option and defaults to the value defined by the `config.generator.library.type.default` setting in the `./src/config/ecic.rb` configuratinon file.
70
70
 
71
71
  The `ecic generate design` command can be called from any directory within your project. To see the full list of options for the `ecic generate design` command, run `ecic generate help design`.
72
72
 
@@ -82,17 +82,19 @@ When creating a new VHDL design, you will be given the option to also create and
82
82
 
83
83
  The following VHDL files will be created (relative to the project root folder):
84
84
 
85
- ./src/design/my_lib/my_design1-pkg-comp.vhd # Component definition
85
+ ./src/design/my_lib/my_design1-pkg_types.vhd # Types and constants definition package (optional)
86
+ ./src/design/my_lib/my_design1-pkg_comp.vhd # Component definition
86
87
  ./src/design/my_lib/my_design1-ent.vhd # Entity definition
87
- ./src/design/my_lib/my_design1-arc-rtl.vhd # RTL architecture
88
- ./src/design/my_lib/my_design1-pkg-types.vhd # Types and constants definition package (optional)
88
+ ./src/design/my_lib/my_design1-arc_rtl.vhd # RTL architecture
89
89
 
90
90
  Placing each component, entity and architecture in separate files allows a projects to be recompiled very fast when only a few files have been modified, since eg. an update that is isolated to a single RTL architecture only requires that one file to be recompiled. Splitting the entity and architecture into separate files also allows you to have multiple architectures for the save entity and choose between the architecture files at compile time without having to use `VHDL configuration` constructs.
91
91
 
92
- Should you still wish to combine eg. the entity and architecture files into one file, you can configure `ECIC` to do this by default by setting `config.generator.design.vhdl.combine` option in `./src/config/ecic.rb`:
92
+ Should you still wish to combine eg. the entity and architecture files into one file, you can configure `ECIC` to do this by default by setting the `config.generator.design.vhdl.combine` option in `./src/config/ecic.rb`, eg.:
93
93
 
94
94
  config.generator.design.vhdl.combine = 'entity + architecture'
95
95
 
96
+ This would result in a file with a `-ent-arc_rtl.vhd` extention for the file containing both the entity and architecture.
97
+
96
98
  ##### Create multiple VHDL design for the same library
97
99
 
98
100
  You can create multiple designs at the same time, and designs can be placed in subfolders within a library. For example, to create a new VHDL design called `my_design2` at the root of a library called `my_lib` and create another VHDL design called `my_design3` in a subfolder called `my_subblock`, run:
@@ -101,14 +103,14 @@ You can create multiple designs at the same time, and designs can be placed in s
101
103
 
102
104
  This will create the following VHDL files (relative to the project root folder):
103
105
 
104
- ./src/design/my_lib/my_design2-comp.pkg.vhd # Component definition
106
+ ./src/design/my_lib/my_design2-pkg_types.vhd # Types and constants definition package (optional)
107
+ ./src/design/my_lib/my_design2-pkg_comp.vhd # Component definition
105
108
  ./src/design/my_lib/my_design2-ent.vhd # Entity definition
106
- ./src/design/my_lib/my_design2-rtl_arc.vhd # RTL architecture
107
- ./src/design/my_lib/my_design2-pkg-types.vhd # Types and constants definition package (optional)
108
- ./src/design/my_lib/my_subblock/my_design3-comp-pkg.vhd # Component definition
109
+ ./src/design/my_lib/my_design2-arc_rtl.vhd # RTL architecture
110
+ ./src/design/my_lib/my_subblock/my_design3-pkg_types.vhd # Types and constants definition package (optional)
111
+ ./src/design/my_lib/my_subblock/my_design3-pkg_comp.vhd # Component definition
109
112
  ./src/design/my_lib/my_subblock/my_design3-ent.vhd # Entity definition
110
- ./src/design/my_lib/my_subblock/my_design3-rtl_arc.vhd # RTL architecture
111
- ./src/design/my_lib/my_subblock/my_design3-pkg-types.vhd # Types and constants definition package (optional)
113
+ ./src/design/my_lib/my_subblock/my_design3-arc_rtl.vhd # RTL architecture
112
114
 
113
115
  In this example the `--types-package` option is used to automatically include the `*-pkg-types.vhd` files without prompting the user with the option.
114
116
 
@@ -131,7 +133,7 @@ All generated SystemVerilog files will be added to the `sources.rb` file in the
131
133
 
132
134
  #### Omitting the --lib option
133
135
 
134
- If the `ecic generate design` command is called from within a library folder (or subfolder), the `--lib` option can be omitted, in which case the new designs will be created for that library. The files will be placed relative to the current working directory.
136
+ If the `ecic generate design` command is called from within a library folder (or subfolder) and the `--lib` option is omitted, the new designs will be created for the library in that folder.
135
137
 
136
138
  Example:
137
139
 
@@ -140,7 +142,9 @@ Example:
140
142
 
141
143
  That will generate the files as:
142
144
 
143
- ./src/design/queue_system/arbitor/statemachine-*.vhd #Path is relative to the project root folder
145
+ ./src/design/queue_system/statemachine-*.vhd #Path is relative to the project root folder
146
+
147
+ Note that even though the current working directory in this example is `arbitor`, the generated files will be placed in the `queue_system` folder, since no hierarchy is included in the design name.
144
148
 
145
149
  ## Migrating an existing project to use ECIC
146
150
 
@@ -35,11 +35,11 @@ help:
35
35
 
36
36
  script:
37
37
  short: Generate script that can be eval to setup auto-completion
38
- long: |
38
+ long: |
39
39
  To use, add the following to your ~/.bashrc or ~/.profile
40
40
 
41
41
  eval $(ecic completion script)
42
-
42
+
43
43
  generate:
44
44
  short: Generate new testbenches, RTL modules, tests etc.!
45
45
  testbench:
@@ -60,4 +60,18 @@ help:
60
60
  Example: ecic generate library lib1 lib2 lib3...
61
61
 
62
62
  This creates the given libraries in the ./src/design/ directory of
63
- your project and adds the libraries to ./src/config/libraries.rb
63
+ your project and adds the libraries to ./src/config/libraries.rb
64
+
65
+ design:
66
+ short: Create a new RTL design
67
+ long: |
68
+ Create a new VHDL/SystemVerilog design.
69
+
70
+ Example: ecic generate design --type=vhdl --library=some_lib design1 sub_block/design2
71
+
72
+ This creates the component, entity and architecture files for two designs called 'design1' and 'design2'.
73
+ An optional types and constants definition file may also be created for each design.
74
+ The files for 'design1' will be placed under 'src/design/some_lib' whereas the files for 'design2'
75
+ will be placed in 'src/design/some_lib/sub_block'.
76
+
77
+ The RTL files are automatically added to the project and the given library will be created and added as well if needed.
@@ -23,6 +23,7 @@ module Ecic
23
23
  autoload :Generate, "ecic/generate"
24
24
  autoload :Completion, "ecic/completion"
25
25
  autoload :Completer, "ecic/completer"
26
+ autoload :DesignGenerator, "ecic/design_generator"
26
27
  autoload :ProjectGenerator, "ecic/project_generator"
27
28
  autoload :LibraryGenerator, "ecic/library_generator"
28
29
  autoload :Library, "ecic/library"
@@ -83,10 +83,12 @@ module Ecic
83
83
  desc 'libraries', 'Display list of libraries in your project'
84
84
  def libraries
85
85
  root_dir = Project::root
86
- shell.error "You must be within an ECIC project before calling this command" if root_dir.nil?
87
- library_cfg_file = Project::library_cfg_file(root_dir)
88
- project = Project.new
89
- project.load_libraries(library_cfg_file)
86
+ if root_dir.nil?
87
+ shell.error "You must be within an ECIC project before calling this command"
88
+ exit(3)
89
+ end
90
+ project = Project.new(root_dir)
91
+ project.load_libraries
90
92
  say project.libraries { |lib| "#{lib.to_s}" }.join("\n")
91
93
  end
92
94
 
@@ -0,0 +1,32 @@
1
+ module Ecic
2
+
3
+ class DesignGenerator < Thor::Group
4
+ include Thor::Actions
5
+ desc 'Generate a new RTL design'
6
+
7
+ attr_writer :library_name, :design_name
8
+
9
+ def self.source_root
10
+ File.dirname(__FILE__) + '/../../templates/project'
11
+ end
12
+
13
+
14
+ # def initialize(project_root_path, lib_name)
15
+ # @destination_root = project_root_path
16
+ # @library_name = lib_name
17
+ # end
18
+
19
+ # def create_design_directory
20
+ # empty_directory "src/design/#{@library_name}/#{File.dirname(@design_name)}"
21
+ # end
22
+
23
+ def update_src_list
24
+ template("src/design/lib/pkg_types.vhd.tt", "src/design/#{@library_name}/#{@design_name}-pkg_types.vhd")
25
+ template("src/design/lib/pkg_comp.vhd.tt", "src/design/#{@library_name}/#{@design_name}-pkg_comp.vhd")
26
+ template("src/design/lib/ent.vhd.tt", "src/design/#{@library_name}/#{@design_name}-ent.vhd")
27
+ template("src/design/lib/arc_rtl.vhd.tt", "src/design/#{@library_name}/#{@design_name}-arc_rtl.vhd")
28
+ end
29
+
30
+ end
31
+
32
+ end
@@ -32,13 +32,53 @@ module Ecic
32
32
  names.each { |lib_name|
33
33
  generator = LibraryGenerator.new
34
34
  generator.destination_root = project_root_path
35
- # names.each do |lib_name|
36
- generator.library_name = lib_name
37
- generator.invoke_all
38
- # end
35
+ generator.library_name = lib_name
36
+ generator.invoke_all
39
37
  }
40
38
  end
39
+ end
40
+
41
+ #--------------------------------------------------------------------------
42
+ # design generator:
43
+ #--------------------------------------------------------------------------
44
+ desc "design NAME...", Help.text('generate')['design']['short']
45
+ long_desc Help.text('generate')['design']['long']
46
+
47
+ option :just_print, :type => :boolean, :aliases => '-n', :desc => "Don't actually run any commands; just print them."
48
+ option :type, :type => :string, :banner => 'vhdl|sv', :required => true, :desc => 'Speficy the RTL type (VHDL or Verilog/SystemVerilog)'
49
+ option :lib, :type => :string, :banner => 'LIBRARY_NAME', :required => true, :desc => 'Speficy the RTL type (VHDL or Verilog/SystemVerilog)'
50
+ def design(*names)
51
+ lib_name = options[:lib]
52
+ type = options[:type]
53
+ root_dir = Project::root
54
+ if root_dir.nil?
55
+ shell.error "You must be within an ECIC project before calling this command"
56
+ exit(1)
57
+ end
58
+ project = Project.new(root_dir)
59
+ project.load_libraries
60
+ # p project.libraries
41
61
 
62
+ unless project.libraries.any? {|l| l.name == lib_name }
63
+ if yes?("Library '#{lib_name}' does not exist. Create it?")
64
+ generator = LibraryGenerator.new
65
+ generator.destination_root = root_dir
66
+ generator.library_name = lib_name
67
+ generator.invoke_all
68
+ else
69
+ shell.error "Operation aborted!"
70
+ exit(2)
71
+ end
72
+ end
73
+ names.each { |design_name|
74
+ # shell.say "Generating '#{design_name}' design in #{lib_name} ..."
75
+ generator = DesignGenerator.new
76
+ # shell.error "DesignGenerator could not be created" if generator.nil?
77
+ generator.destination_root = root_dir
78
+ generator.library_name = lib_name
79
+ generator.design_name = design_name
80
+ generator.invoke_all
81
+ }
42
82
  end
43
83
  end
44
84
  end
@@ -2,6 +2,8 @@ module Ecic
2
2
 
3
3
  class Library
4
4
 
5
+ attr_accessor :name
6
+
5
7
  def initialize(name=nil)
6
8
  @name = name
7
9
  end
@@ -6,17 +6,14 @@ module Ecic
6
6
 
7
7
  require 'pathname'
8
8
 
9
- def initialize
9
+ def initialize(root = Project::root)
10
10
  @libraries = []
11
+ @root = root
11
12
  end
12
13
 
13
14
  SCRIPT_ECIC = File.join('src', 'config', 'ecic.rb')
14
15
  LIBRARIES_CFG_SCRIPT = File.join('src', 'config', 'libraries.rb')
15
16
 
16
- def self.library_cfg_file(root = Project::root)
17
- File.join(root, LIBRARIES_CFG_SCRIPT)
18
- end
19
-
20
17
  #Function that returns the root directory of a ECIC project
21
18
  def self.root(path = Pathname.new(Dir.pwd))
22
19
  if File.exists?(File.join(path, SCRIPT_ECIC))
@@ -26,10 +23,15 @@ module Ecic
26
23
  end
27
24
  return root(path.parent)
28
25
  end
26
+
27
+ def default_library_cfg_file
28
+ File.join(@root, LIBRARIES_CFG_SCRIPT)
29
+ end
30
+
29
31
 
30
- def load_libraries(lib_file)
32
+ def load_libraries(lib_file = default_library_cfg_file)
31
33
  if File.exists?(lib_file)
32
- puts "Reading #{lib_file}"
34
+ # puts "Reading #{lib_file}"
33
35
  eval File.read(lib_file)
34
36
  else
35
37
  raise "Could not read library definitions from #{lib_file}"
@@ -1,3 +1,3 @@
1
1
  module Ecic
2
- VERSION = "0.3.0"
2
+ VERSION = "0.4.0"
3
3
  end
metadata CHANGED
@@ -1,14 +1,14 @@
1
1
  --- !ruby/object:Gem::Specification
2
2
  name: ecic
3
3
  version: !ruby/object:Gem::Version
4
- version: 0.3.0
4
+ version: 0.4.0
5
5
  platform: ruby
6
6
  authors:
7
7
  - Torben Fox Jacobsen
8
8
  autorequire:
9
9
  bindir: exe
10
10
  cert_chain: []
11
- date: 2018-10-10 00:00:00.000000000 Z
11
+ date: 2018-10-11 00:00:00.000000000 Z
12
12
  dependencies:
13
13
  - !ruby/object:Gem::Dependency
14
14
  name: thor
@@ -140,6 +140,7 @@ files:
140
140
  - lib/ecic/completer/script.rb
141
141
  - lib/ecic/completer/script.sh
142
142
  - lib/ecic/completion.rb
143
+ - lib/ecic/design_generator.rb
143
144
  - lib/ecic/generate.rb
144
145
  - lib/ecic/help.rb
145
146
  - lib/ecic/library.rb
@@ -155,6 +156,10 @@ files:
155
156
  - templates/project/config/libraries.rb
156
157
  - templates/project/config/project.rb
157
158
  - templates/project/gitignore
159
+ - templates/project/src/design/lib/arc_rtl.vhd.tt
160
+ - templates/project/src/design/lib/ent.vhd.tt
161
+ - templates/project/src/design/lib/pkg_comp.vhd.tt
162
+ - templates/project/src/design/lib/pkg_types.vhd.tt
158
163
  - templates/project/src/design/lib/sources.rb
159
164
  homepage: https://github.com/ic-factory/ecic
160
165
  licenses: