ceedling 0.11.2 → 0.12.0
Sign up to get free protection for your applications and to get access to all the features.
- data/README.md +4 -3
- data/bin/ceedling +2 -1
- data/examples/blinky/project.yml +98 -0
- data/examples/blinky/rakefile.rb +23 -0
- data/examples/blinky/src/BlinkTask.c +21 -0
- data/examples/blinky/src/BlinkTask.h +8 -0
- data/examples/blinky/src/Configure.c +38 -0
- data/examples/blinky/src/Configure.h +6 -0
- data/examples/blinky/src/main.c +51 -0
- data/examples/blinky/src/main.h +9 -0
- data/examples/blinky/test/support/stub_interrupt.h +348 -0
- data/examples/blinky/test/support/stub_io.h +421 -0
- data/examples/blinky/test/support/stub_iom328p.h +883 -0
- data/examples/blinky/test/support/stub_sfr_defs.h +269 -0
- data/examples/blinky/test/test_BlinkTask.c +36 -0
- data/examples/blinky/test/test_Configure.c +28 -0
- data/examples/blinky/test/test_main.c +60 -0
- data/lib/ceedling/version.rb +4 -4
- data/lib/ceedling/version.rb.erb +1 -1
- data/new_project_template/vendor/ceedling/docs/CExceptionSummary.pdf +0 -0
- data/new_project_template/vendor/ceedling/vendor/c_exception/lib/CException.c +7 -3
- data/new_project_template/vendor/ceedling/vendor/c_exception/lib/CException.h +16 -0
- data/new_project_template/vendor/ceedling/vendor/c_exception/release/build.info +1 -1
- data/new_project_template/vendor/ceedling/vendor/cmock/lib/cmock_generator_plugin_callback.rb +1 -1
- data/new_project_template/vendor/ceedling/vendor/cmock/release/build.info +1 -1
- data/new_project_template/vendor/ceedling/vendor/unity/release/build.info +1 -1
- data/new_project_template/vendor/ceedling/vendor/unity/src/unity.c +18 -3
- data/new_project_template/vendor/ceedling/vendor/unity/src/unity_internals.h +3 -3
- metadata +19 -4
|
@@ -0,0 +1,421 @@
|
|
|
1
|
+
/* Copyright (c) 2002,2003,2005,2006,2007 Marek Michalkiewicz, Joerg Wunsch
|
|
2
|
+
Copyright (c) 2007 Eric B. Weddington
|
|
3
|
+
All rights reserved.
|
|
4
|
+
|
|
5
|
+
Redistribution and use in source and binary forms, with or without
|
|
6
|
+
modification, are permitted provided that the following conditions are met:
|
|
7
|
+
|
|
8
|
+
* Redistributions of source code must retain the above copyright
|
|
9
|
+
notice, this list of conditions and the following disclaimer.
|
|
10
|
+
|
|
11
|
+
* Redistributions in binary form must reproduce the above copyright
|
|
12
|
+
notice, this list of conditions and the following disclaimer in
|
|
13
|
+
the documentation and/or other materials provided with the
|
|
14
|
+
distribution.
|
|
15
|
+
|
|
16
|
+
* Neither the name of the copyright holders nor the names of
|
|
17
|
+
contributors may be used to endorse or promote products derived
|
|
18
|
+
from this software without specific prior written permission.
|
|
19
|
+
|
|
20
|
+
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
21
|
+
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
22
|
+
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
23
|
+
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
|
24
|
+
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
25
|
+
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
26
|
+
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
27
|
+
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
28
|
+
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
29
|
+
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
30
|
+
POSSIBILITY OF SUCH DAMAGE. */
|
|
31
|
+
|
|
32
|
+
/* $Id: io.h,v 1.52.2.28 2009/12/20 17:02:53 arcanum Exp $ */
|
|
33
|
+
|
|
34
|
+
/** \file */
|
|
35
|
+
/** \defgroup avr_io <avr/io.h>: AVR device-specific IO definitions
|
|
36
|
+
\code #include <avr/io.h> \endcode
|
|
37
|
+
|
|
38
|
+
This header file includes the apropriate IO definitions for the
|
|
39
|
+
device that has been specified by the <tt>-mmcu=</tt> compiler
|
|
40
|
+
command-line switch. This is done by diverting to the appropriate
|
|
41
|
+
file <tt><avr/io</tt><em>XXXX</em><tt>.h></tt> which should
|
|
42
|
+
never be included directly. Some register names common to all
|
|
43
|
+
AVR devices are defined directly within <tt><avr/common.h></tt>,
|
|
44
|
+
which is included in <tt><avr/io.h></tt>,
|
|
45
|
+
but most of the details come from the respective include file.
|
|
46
|
+
|
|
47
|
+
Note that this file always includes the following files:
|
|
48
|
+
\code
|
|
49
|
+
#include <avr/sfr_defs.h>
|
|
50
|
+
#include <avr/portpins.h>
|
|
51
|
+
#include <avr/common.h>
|
|
52
|
+
#include <avr/version.h>
|
|
53
|
+
\endcode
|
|
54
|
+
See \ref avr_sfr for more details about that header file.
|
|
55
|
+
|
|
56
|
+
Included are definitions of the IO register set and their
|
|
57
|
+
respective bit values as specified in the Atmel documentation.
|
|
58
|
+
Note that inconsistencies in naming conventions,
|
|
59
|
+
so even identical functions sometimes get different names on
|
|
60
|
+
different devices.
|
|
61
|
+
|
|
62
|
+
Also included are the specific names useable for interrupt
|
|
63
|
+
function definitions as documented
|
|
64
|
+
\ref avr_signames "here".
|
|
65
|
+
|
|
66
|
+
Finally, the following macros are defined:
|
|
67
|
+
|
|
68
|
+
- \b RAMEND
|
|
69
|
+
<br>
|
|
70
|
+
The last on-chip RAM address.
|
|
71
|
+
<br>
|
|
72
|
+
- \b XRAMEND
|
|
73
|
+
<br>
|
|
74
|
+
The last possible RAM location that is addressable. This is equal to
|
|
75
|
+
RAMEND for devices that do not allow for external RAM. For devices
|
|
76
|
+
that allow external RAM, this will be larger than RAMEND.
|
|
77
|
+
<br>
|
|
78
|
+
- \b E2END
|
|
79
|
+
<br>
|
|
80
|
+
The last EEPROM address.
|
|
81
|
+
<br>
|
|
82
|
+
- \b FLASHEND
|
|
83
|
+
<br>
|
|
84
|
+
The last byte address in the Flash program space.
|
|
85
|
+
<br>
|
|
86
|
+
- \b SPM_PAGESIZE
|
|
87
|
+
<br>
|
|
88
|
+
For devices with bootloader support, the flash pagesize
|
|
89
|
+
(in bytes) to be used for the \c SPM instruction.
|
|
90
|
+
- \b E2PAGESIZE
|
|
91
|
+
<br>
|
|
92
|
+
The size of the EEPROM page.
|
|
93
|
+
|
|
94
|
+
*/
|
|
95
|
+
|
|
96
|
+
#ifndef _AVR_IO_H_
|
|
97
|
+
#define _AVR_IO_H_
|
|
98
|
+
|
|
99
|
+
// #include <avr/sfr_defs.h>
|
|
100
|
+
#include "stub_sfr_defs.h"
|
|
101
|
+
// #if defined (__AVR_AT94K__)
|
|
102
|
+
// # include <avr/ioat94k.h>
|
|
103
|
+
// #elif defined (__AVR_AT43USB320__)
|
|
104
|
+
// # include <avr/io43u32x.h>
|
|
105
|
+
// #elif defined (__AVR_AT43USB355__)
|
|
106
|
+
// # include <avr/io43u35x.h>
|
|
107
|
+
// #elif defined (__AVR_AT76C711__)
|
|
108
|
+
// # include <avr/io76c711.h>
|
|
109
|
+
// #elif defined (__AVR_AT86RF401__)
|
|
110
|
+
// # include <avr/io86r401.h>
|
|
111
|
+
// #elif defined (__AVR_AT90PWM1__)
|
|
112
|
+
// # include <avr/io90pwm1.h>
|
|
113
|
+
// #elif defined (__AVR_AT90PWM2__)
|
|
114
|
+
// # include <avr/io90pwmx.h>
|
|
115
|
+
// #elif defined (__AVR_AT90PWM2B__)
|
|
116
|
+
// # include <avr/io90pwm2b.h>
|
|
117
|
+
// #elif defined (__AVR_AT90PWM3__)
|
|
118
|
+
// # include <avr/io90pwmx.h>
|
|
119
|
+
// #elif defined (__AVR_AT90PWM3B__)
|
|
120
|
+
// # include <avr/io90pwm3b.h>
|
|
121
|
+
// #elif defined (__AVR_AT90PWM216__)
|
|
122
|
+
// # include <avr/io90pwm216.h>
|
|
123
|
+
// #elif defined (__AVR_AT90PWM316__)
|
|
124
|
+
// # include <avr/io90pwm316.h>
|
|
125
|
+
// #elif defined (__AVR_AT90PWM81__)
|
|
126
|
+
// # include <avr/io90pwm81.h>
|
|
127
|
+
// #elif defined (__AVR_ATmega8U2__)
|
|
128
|
+
// # include <avr/iom8u2.h>
|
|
129
|
+
// #elif defined (__AVR_ATmega16M1__)
|
|
130
|
+
// # include <avr/iom16m1.h>
|
|
131
|
+
// #elif defined (__AVR_ATmega16U2__)
|
|
132
|
+
// # include <avr/iom16u2.h>
|
|
133
|
+
// #elif defined (__AVR_ATmega16U4__)
|
|
134
|
+
// # include <avr/iom16u4.h>
|
|
135
|
+
// #elif defined (__AVR_ATmega32C1__)
|
|
136
|
+
// # include <avr/iom32c1.h>
|
|
137
|
+
// #elif defined (__AVR_ATmega32M1__)
|
|
138
|
+
// # include <avr/iom32m1.h>
|
|
139
|
+
// #elif defined (__AVR_ATmega32U2__)
|
|
140
|
+
// # include <avr/iom32u2.h>
|
|
141
|
+
// #elif defined (__AVR_ATmega32U4__)
|
|
142
|
+
// # include <avr/iom32u4.h>
|
|
143
|
+
// #elif defined (__AVR_ATmega32U6__)
|
|
144
|
+
// # include <avr/iom32u6.h>
|
|
145
|
+
// #elif defined (__AVR_ATmega64C1__)
|
|
146
|
+
// # include <avr/iom64c1.h>
|
|
147
|
+
// #elif defined (__AVR_ATmega64M1__)
|
|
148
|
+
// # include <avr/iom64m1.h>
|
|
149
|
+
// #elif defined (__AVR_ATmega128__)
|
|
150
|
+
// # include <avr/iom128.h>
|
|
151
|
+
// #elif defined (__AVR_ATmega1280__)
|
|
152
|
+
// # include <avr/iom1280.h>
|
|
153
|
+
// #elif defined (__AVR_ATmega1281__)
|
|
154
|
+
// # include <avr/iom1281.h>
|
|
155
|
+
// #elif defined (__AVR_ATmega1284P__)
|
|
156
|
+
// # include <avr/iom1284p.h>
|
|
157
|
+
// #elif defined (__AVR_ATmega128RFA1__)
|
|
158
|
+
// # include <avr/iom128rfa1.h>
|
|
159
|
+
// #elif defined (__AVR_ATmega2560__)
|
|
160
|
+
// # include <avr/iom2560.h>
|
|
161
|
+
// #elif defined (__AVR_ATmega2561__)
|
|
162
|
+
// # include <avr/iom2561.h>
|
|
163
|
+
// #elif defined (__AVR_AT90CAN32__)
|
|
164
|
+
// # include <avr/iocan32.h>
|
|
165
|
+
// #elif defined (__AVR_AT90CAN64__)
|
|
166
|
+
// # include <avr/iocan64.h>
|
|
167
|
+
// #elif defined (__AVR_AT90CAN128__)
|
|
168
|
+
// # include <avr/iocan128.h>
|
|
169
|
+
// #elif defined (__AVR_AT90USB82__)
|
|
170
|
+
// # include <avr/iousb82.h>
|
|
171
|
+
// #elif defined (__AVR_AT90USB162__)
|
|
172
|
+
// # include <avr/iousb162.h>
|
|
173
|
+
// #elif defined (__AVR_AT90USB646__)
|
|
174
|
+
// # include <avr/iousb646.h>
|
|
175
|
+
// #elif defined (__AVR_AT90USB647__)
|
|
176
|
+
// # include <avr/iousb647.h>
|
|
177
|
+
// #elif defined (__AVR_AT90USB1286__)
|
|
178
|
+
// # include <avr/iousb1286.h>
|
|
179
|
+
// #elif defined (__AVR_AT90USB1287__)
|
|
180
|
+
// # include <avr/iousb1287.h>
|
|
181
|
+
// #elif defined (__AVR_ATmega64__)
|
|
182
|
+
// # include <avr/iom64.h>
|
|
183
|
+
// #elif defined (__AVR_ATmega640__)
|
|
184
|
+
// # include <avr/iom640.h>
|
|
185
|
+
// #elif defined (__AVR_ATmega644__) || defined (__AVR_ATmega644A__)
|
|
186
|
+
// # include <avr/iom644.h>
|
|
187
|
+
// #elif defined (__AVR_ATmega644P__)
|
|
188
|
+
// # include <avr/iom644p.h>
|
|
189
|
+
// #elif defined (__AVR_ATmega644PA__)
|
|
190
|
+
// # include <avr/iom644pa.h>
|
|
191
|
+
// #elif defined (__AVR_ATmega645__) || defined (__AVR_ATmega645A__) || defined (__AVR_ATmega645P__)
|
|
192
|
+
// # include <avr/iom645.h>
|
|
193
|
+
// #elif defined (__AVR_ATmega6450__) || defined (__AVR_ATmega6450A__) || defined (__AVR_ATmega6450P__)
|
|
194
|
+
// # include <avr/iom6450.h>
|
|
195
|
+
// #elif defined (__AVR_ATmega649__) || defined (__AVR_ATmega649A__)
|
|
196
|
+
// # include <avr/iom649.h>
|
|
197
|
+
// #elif defined (__AVR_ATmega6490__) || defined (__AVR_ATmega6490A__) || defined (__AVR_ATmega6490P__)
|
|
198
|
+
// # include <avr/iom6490.h>
|
|
199
|
+
// #elif defined (__AVR_ATmega649P__)
|
|
200
|
+
// # include <avr/iom649p.h>
|
|
201
|
+
// #elif defined (__AVR_ATmega64HVE__)
|
|
202
|
+
// # include <avr/iom64hve.h>
|
|
203
|
+
// #elif defined (__AVR_ATmega103__)
|
|
204
|
+
// # include <avr/iom103.h>
|
|
205
|
+
// #elif defined (__AVR_ATmega32__)
|
|
206
|
+
// # include <avr/iom32.h>
|
|
207
|
+
// #elif defined (__AVR_ATmega323__)
|
|
208
|
+
// # include <avr/iom323.h>
|
|
209
|
+
// #elif defined (__AVR_ATmega324P__) || defined (__AVR_ATmega324A__)
|
|
210
|
+
// # include <avr/iom324.h>
|
|
211
|
+
// #elif defined (__AVR_ATmega324PA__)
|
|
212
|
+
// # include <avr/iom324pa.h>
|
|
213
|
+
// #elif defined (__AVR_ATmega325__)
|
|
214
|
+
// # include <avr/iom325.h>
|
|
215
|
+
// #elif defined (__AVR_ATmega325P__)
|
|
216
|
+
// # include <avr/iom325.h>
|
|
217
|
+
// #elif defined (__AVR_ATmega3250__)
|
|
218
|
+
// # include <avr/iom3250.h>
|
|
219
|
+
// #elif defined (__AVR_ATmega3250P__)
|
|
220
|
+
// # include <avr/iom3250.h>
|
|
221
|
+
// #elif defined (__AVR_ATmega328P__) || defined (__AVR_ATmega328__)
|
|
222
|
+
// # include <avr/iom328p.h>
|
|
223
|
+
# include <stub_iom328p.h>
|
|
224
|
+
// #elif defined (__AVR_ATmega329__)
|
|
225
|
+
// # include <avr/iom329.h>
|
|
226
|
+
// #elif defined (__AVR_ATmega329P__) || defined (__AVR_ATmega329PA__)
|
|
227
|
+
// # include <avr/iom329.h>
|
|
228
|
+
// #elif defined (__AVR_ATmega3290__)
|
|
229
|
+
// # include <avr/iom3290.h>
|
|
230
|
+
// #elif defined (__AVR_ATmega3290P__)
|
|
231
|
+
// # include <avr/iom3290.h>
|
|
232
|
+
// #elif defined (__AVR_ATmega32HVB__)
|
|
233
|
+
// # include <avr/iom32hvb.h>
|
|
234
|
+
// #elif defined (__AVR_ATmega406__)
|
|
235
|
+
// # include <avr/iom406.h>
|
|
236
|
+
// #elif defined (__AVR_ATmega16__)
|
|
237
|
+
// # include <avr/iom16.h>
|
|
238
|
+
// #elif defined (__AVR_ATmega16A__)
|
|
239
|
+
// # include <avr/iom16a.h>
|
|
240
|
+
// #elif defined (__AVR_ATmega161__)
|
|
241
|
+
// # include <avr/iom161.h>
|
|
242
|
+
// #elif defined (__AVR_ATmega162__)
|
|
243
|
+
// # include <avr/iom162.h>
|
|
244
|
+
// #elif defined (__AVR_ATmega163__)
|
|
245
|
+
// # include <avr/iom163.h>
|
|
246
|
+
// #elif defined (__AVR_ATmega164P__) || defined (__AVR_ATmega164A__)
|
|
247
|
+
// # include <avr/iom164.h>
|
|
248
|
+
// #elif defined (__AVR_ATmega165__) || defined (__AVR_ATmega165A__)
|
|
249
|
+
// # include <avr/iom165.h>
|
|
250
|
+
// #elif defined (__AVR_ATmega165P__)
|
|
251
|
+
// # include <avr/iom165p.h>
|
|
252
|
+
// #elif defined (__AVR_ATmega168__) || defined (__AVR_ATmega168A__)
|
|
253
|
+
// # include <avr/iom168.h>
|
|
254
|
+
// #elif defined (__AVR_ATmega168P__)
|
|
255
|
+
// # include <avr/iom168p.h>
|
|
256
|
+
// #elif defined (__AVR_ATmega169__) || defined (__AVR_ATmega169A__)
|
|
257
|
+
// # include <avr/iom169.h>
|
|
258
|
+
// #elif defined (__AVR_ATmega169P__)
|
|
259
|
+
// # include <avr/iom169p.h>
|
|
260
|
+
// #elif defined (__AVR_ATmega169PA__)
|
|
261
|
+
// # include <avr/iom169pa.h>
|
|
262
|
+
// #elif defined (__AVR_ATmega8HVA__)
|
|
263
|
+
// # include <avr/iom8hva.h>
|
|
264
|
+
// #elif defined (__AVR_ATmega16HVA__)
|
|
265
|
+
// # include <avr/iom16hva.h>
|
|
266
|
+
// #elif defined (__AVR_ATmega16HVA2__)
|
|
267
|
+
// # include <avr/iom16hva2.h>
|
|
268
|
+
// #elif defined (__AVR_ATmega16HVB__)
|
|
269
|
+
// # include <avr/iom16hvb.h>
|
|
270
|
+
// #elif defined (__AVR_ATmega8__)
|
|
271
|
+
// # include <avr/iom8.h>
|
|
272
|
+
// #elif defined (__AVR_ATmega48__) || defined (__AVR_ATmega48A__)
|
|
273
|
+
// # include <avr/iom48.h>
|
|
274
|
+
// #elif defined (__AVR_ATmega48P__)
|
|
275
|
+
// # include <avr/iom48p.h>
|
|
276
|
+
// #elif defined (__AVR_ATmega88__) || defined (__AVR_ATmega88A__)
|
|
277
|
+
// # include <avr/iom88.h>
|
|
278
|
+
// #elif defined (__AVR_ATmega88P__)
|
|
279
|
+
// # include <avr/iom88p.h>
|
|
280
|
+
// #elif defined (__AVR_ATmega88PA__)
|
|
281
|
+
// # include <avr/iom88pa.h>
|
|
282
|
+
// #elif defined (__AVR_ATmega8515__)
|
|
283
|
+
// # include <avr/iom8515.h>
|
|
284
|
+
// #elif defined (__AVR_ATmega8535__)
|
|
285
|
+
// # include <avr/iom8535.h>
|
|
286
|
+
// #elif defined (__AVR_AT90S8535__)
|
|
287
|
+
// # include <avr/io8535.h>
|
|
288
|
+
// #elif defined (__AVR_AT90C8534__)
|
|
289
|
+
// # include <avr/io8534.h>
|
|
290
|
+
// #elif defined (__AVR_AT90S8515__)
|
|
291
|
+
// # include <avr/io8515.h>
|
|
292
|
+
// #elif defined (__AVR_AT90S4434__)
|
|
293
|
+
// # include <avr/io4434.h>
|
|
294
|
+
// #elif defined (__AVR_AT90S4433__)
|
|
295
|
+
// # include <avr/io4433.h>
|
|
296
|
+
// #elif defined (__AVR_AT90S4414__)
|
|
297
|
+
// # include <avr/io4414.h>
|
|
298
|
+
// #elif defined (__AVR_ATtiny22__)
|
|
299
|
+
// # include <avr/iotn22.h>
|
|
300
|
+
// #elif defined (__AVR_ATtiny26__)
|
|
301
|
+
// # include <avr/iotn26.h>
|
|
302
|
+
// #elif defined (__AVR_AT90S2343__)
|
|
303
|
+
// # include <avr/io2343.h>
|
|
304
|
+
// #elif defined (__AVR_AT90S2333__)
|
|
305
|
+
// # include <avr/io2333.h>
|
|
306
|
+
// #elif defined (__AVR_AT90S2323__)
|
|
307
|
+
// # include <avr/io2323.h>
|
|
308
|
+
// #elif defined (__AVR_AT90S2313__)
|
|
309
|
+
// # include <avr/io2313.h>
|
|
310
|
+
// #elif defined (__AVR_ATtiny2313__)
|
|
311
|
+
// # include <avr/iotn2313.h>
|
|
312
|
+
// #elif defined (__AVR_ATtiny2313A__)
|
|
313
|
+
// # include <avr/iotn2313a.h>
|
|
314
|
+
// #elif defined (__AVR_ATtiny13__)
|
|
315
|
+
// # include <avr/iotn13.h>
|
|
316
|
+
// #elif defined (__AVR_ATtiny13A__)
|
|
317
|
+
// # include <avr/iotn13a.h>
|
|
318
|
+
// #elif defined (__AVR_ATtiny25__)
|
|
319
|
+
// # include <avr/iotn25.h>
|
|
320
|
+
// #elif defined (__AVR_ATtiny4313__)
|
|
321
|
+
// # include <avr/iotn4313.h>
|
|
322
|
+
// #elif defined (__AVR_ATtiny45__)
|
|
323
|
+
// # include <avr/iotn45.h>
|
|
324
|
+
// #elif defined (__AVR_ATtiny85__)
|
|
325
|
+
// # include <avr/iotn85.h>
|
|
326
|
+
// #elif defined (__AVR_ATtiny24__)
|
|
327
|
+
// # include <avr/iotn24.h>
|
|
328
|
+
// #elif defined (__AVR_ATtiny24A__)
|
|
329
|
+
// # include <avr/iotn24a.h>
|
|
330
|
+
// #elif defined (__AVR_ATtiny44__)
|
|
331
|
+
// # include <avr/iotn44.h>
|
|
332
|
+
// #elif defined (__AVR_ATtiny44A__)
|
|
333
|
+
// # include <avr/iotn44a.h>
|
|
334
|
+
// #elif defined (__AVR_ATtiny84__)
|
|
335
|
+
// # include <avr/iotn84.h>
|
|
336
|
+
// #elif defined (__AVR_ATtiny261__)
|
|
337
|
+
// # include <avr/iotn261.h>
|
|
338
|
+
// #elif defined (__AVR_ATtiny261A__)
|
|
339
|
+
// # include <avr/iotn261a.h>
|
|
340
|
+
// #elif defined (__AVR_ATtiny461__)
|
|
341
|
+
// # include <avr/iotn461.h>
|
|
342
|
+
// #elif defined (__AVR_ATtiny461A__)
|
|
343
|
+
// # include <avr/iotn461a.h>
|
|
344
|
+
// #elif defined (__AVR_ATtiny861__)
|
|
345
|
+
// # include <avr/iotn861.h>
|
|
346
|
+
// #elif defined (__AVR_ATtiny861A__)
|
|
347
|
+
// # include <avr/iotn861a.h>
|
|
348
|
+
// #elif defined (__AVR_ATtiny43U__)
|
|
349
|
+
// # include <avr/iotn43u.h>
|
|
350
|
+
// #elif defined (__AVR_ATtiny48__)
|
|
351
|
+
// # include <avr/iotn48.h>
|
|
352
|
+
// #elif defined (__AVR_ATtiny88__)
|
|
353
|
+
// # include <avr/iotn88.h>
|
|
354
|
+
// #elif defined (__AVR_ATtiny87__)
|
|
355
|
+
// # include <avr/iotn87.h>
|
|
356
|
+
// #elif defined (__AVR_ATtiny167__)
|
|
357
|
+
// # include <avr/iotn167.h>
|
|
358
|
+
// #elif defined (__AVR_AT90SCR100__)
|
|
359
|
+
// # include <avr/io90scr100.h>
|
|
360
|
+
// #elif defined (__AVR_ATxmega16A4__)
|
|
361
|
+
// # include <avr/iox16a4.h>
|
|
362
|
+
// #elif defined (__AVR_ATxmega16D4__)
|
|
363
|
+
// # include <avr/iox16d4.h>
|
|
364
|
+
// #elif defined (__AVR_ATxmega32A4__)
|
|
365
|
+
// # include <avr/iox32a4.h>
|
|
366
|
+
// #elif defined (__AVR_ATxmega32D4__)
|
|
367
|
+
// # include <avr/iox32d4.h>
|
|
368
|
+
// #elif defined (__AVR_ATxmega64A1__)
|
|
369
|
+
// # include <avr/iox64a1.h>
|
|
370
|
+
// #elif defined (__AVR_ATxmega64A3__)
|
|
371
|
+
// # include <avr/iox64a3.h>
|
|
372
|
+
// #elif defined (__AVR_ATxmega64D3__)
|
|
373
|
+
// # include <avr/iox64d3.h>
|
|
374
|
+
// #elif defined (__AVR_ATxmega128A1__)
|
|
375
|
+
// # include <avr/iox128a1.h>
|
|
376
|
+
// #elif defined (__AVR_ATxmega128A3__)
|
|
377
|
+
// # include <avr/iox128a3.h>
|
|
378
|
+
// #elif defined (__AVR_ATxmega128D3__)
|
|
379
|
+
// # include <avr/iox128d3.h>
|
|
380
|
+
// #elif defined (__AVR_ATxmega192A3__)
|
|
381
|
+
// # include <avr/iox192a3.h>
|
|
382
|
+
// #elif defined (__AVR_ATxmega192D3__)
|
|
383
|
+
// # include <avr/iox192d3.h>
|
|
384
|
+
// #elif defined (__AVR_ATxmega256A3__)
|
|
385
|
+
// # include <avr/iox256a3.h>
|
|
386
|
+
// #elif defined (__AVR_ATxmega256A3B__)
|
|
387
|
+
// # include <avr/iox256a3b.h>
|
|
388
|
+
// #elif defined (__AVR_ATxmega256D3__)
|
|
389
|
+
// # include <avr/iox256d3.h>
|
|
390
|
+
// #elif defined (__AVR_ATA6289__)
|
|
391
|
+
// # include <avr/ioa6289.h>
|
|
392
|
+
// /* avr1: the following only supported for assembler programs */
|
|
393
|
+
// #elif defined (__AVR_ATtiny28__)
|
|
394
|
+
// # include <avr/iotn28.h>
|
|
395
|
+
// #elif defined (__AVR_AT90S1200__)
|
|
396
|
+
// # include <avr/io1200.h>
|
|
397
|
+
// #elif defined (__AVR_ATtiny15__)
|
|
398
|
+
// # include <avr/iotn15.h>
|
|
399
|
+
// #elif defined (__AVR_ATtiny12__)
|
|
400
|
+
// # include <avr/iotn12.h>
|
|
401
|
+
// #elif defined (__AVR_ATtiny11__)
|
|
402
|
+
// # include <avr/iotn11.h>
|
|
403
|
+
// #else
|
|
404
|
+
// # if !defined(__COMPILING_AVR_LIBC__)
|
|
405
|
+
// # warning "device type not defined"
|
|
406
|
+
// # endif
|
|
407
|
+
// #endif
|
|
408
|
+
|
|
409
|
+
// #include <avr/portpins.h>
|
|
410
|
+
|
|
411
|
+
// #include <avr/common.h>
|
|
412
|
+
|
|
413
|
+
// #include <avr/version.h>
|
|
414
|
+
|
|
415
|
+
// /* Include fuse.h after individual IO header files. */
|
|
416
|
+
// #include <avr/fuse.h>
|
|
417
|
+
|
|
418
|
+
// /* Include lock.h after individual IO header files. */
|
|
419
|
+
// #include <avr/lock.h>
|
|
420
|
+
|
|
421
|
+
#endif /* _AVR_IO_H_ */
|
|
@@ -0,0 +1,883 @@
|
|
|
1
|
+
/* Copyright (c) 2007 Atmel Corporation
|
|
2
|
+
All rights reserved.
|
|
3
|
+
|
|
4
|
+
Redistribution and use in source and binary forms, with or without
|
|
5
|
+
modification, are permitted provided that the following conditions are met:
|
|
6
|
+
|
|
7
|
+
* Redistributions of source code must retain the above copyright
|
|
8
|
+
notice, this list of conditions and the following disclaimer.
|
|
9
|
+
|
|
10
|
+
* Redistributions in binary form must reproduce the above copyright
|
|
11
|
+
notice, this list of conditions and the following disclaimer in
|
|
12
|
+
the documentation and/or other materials provided with the
|
|
13
|
+
distribution.
|
|
14
|
+
|
|
15
|
+
* Neither the name of the copyright holders nor the names of
|
|
16
|
+
contributors may be used to endorse or promote products derived
|
|
17
|
+
from this software without specific prior written permission.
|
|
18
|
+
|
|
19
|
+
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
20
|
+
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
21
|
+
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
22
|
+
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
|
23
|
+
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
24
|
+
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
25
|
+
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
26
|
+
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
27
|
+
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
28
|
+
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
29
|
+
POSSIBILITY OF SUCH DAMAGE.
|
|
30
|
+
*/
|
|
31
|
+
|
|
32
|
+
/* $Id: iom328p.h,v 1.3.2.14 2009/02/11 18:05:28 arcanum Exp $ */
|
|
33
|
+
|
|
34
|
+
/* avr/iom328p.h - definitions for ATmega328P. */
|
|
35
|
+
|
|
36
|
+
/* This file should only be included from <avr/io.h>, never directly. */
|
|
37
|
+
|
|
38
|
+
// #ifndef _AVR_IO_H_
|
|
39
|
+
// # error "Include <avr/io.h> instead of this file."
|
|
40
|
+
// #endif
|
|
41
|
+
|
|
42
|
+
// #ifndef _AVR_IOXXX_H_
|
|
43
|
+
// # define _AVR_IOXXX_H_ "iom328p.h"
|
|
44
|
+
// #else
|
|
45
|
+
// # error "Attempt to include more than one <avr/ioXXX.h> file."
|
|
46
|
+
// #endif
|
|
47
|
+
|
|
48
|
+
|
|
49
|
+
#ifndef _AVR_IOM328P_H_
|
|
50
|
+
#define _AVR_IOM328P_H_ 1
|
|
51
|
+
|
|
52
|
+
/* Registers and associated bit numbers */
|
|
53
|
+
|
|
54
|
+
// #define PINB _SFR_IO8(0x03)
|
|
55
|
+
// #define PINB0 0
|
|
56
|
+
// #define PINB1 1
|
|
57
|
+
// #define PINB2 2
|
|
58
|
+
// #define PINB3 3
|
|
59
|
+
// #define PINB4 4
|
|
60
|
+
// #define PINB5 5
|
|
61
|
+
// #define PINB6 6
|
|
62
|
+
// #define PINB7 7
|
|
63
|
+
|
|
64
|
+
// #define DDRB _SFR_IO8(0x04)
|
|
65
|
+
char DDRB;
|
|
66
|
+
#define DDB0 0
|
|
67
|
+
#define DDB1 1
|
|
68
|
+
#define DDB2 2
|
|
69
|
+
#define DDB3 3
|
|
70
|
+
#define DDB4 4
|
|
71
|
+
#define DDB5 5
|
|
72
|
+
#define DDB6 6
|
|
73
|
+
#define DDB7 7
|
|
74
|
+
|
|
75
|
+
// #define PORTB _SFR_IO8(0x05)
|
|
76
|
+
char PORTB;
|
|
77
|
+
#define PORTB0 0
|
|
78
|
+
#define PORTB1 1
|
|
79
|
+
#define PORTB2 2
|
|
80
|
+
#define PORTB3 3
|
|
81
|
+
#define PORTB4 4
|
|
82
|
+
#define PORTB5 5
|
|
83
|
+
#define PORTB6 6
|
|
84
|
+
#define PORTB7 7
|
|
85
|
+
|
|
86
|
+
// #define PINC _SFR_IO8(0x06)
|
|
87
|
+
// #define PINC0 0
|
|
88
|
+
// #define PINC1 1
|
|
89
|
+
// #define PINC2 2
|
|
90
|
+
// #define PINC3 3
|
|
91
|
+
// #define PINC4 4
|
|
92
|
+
// #define PINC5 5
|
|
93
|
+
// #define PINC6 6
|
|
94
|
+
|
|
95
|
+
// #define DDRC _SFR_IO8(0x07)
|
|
96
|
+
// #define DDC0 0
|
|
97
|
+
// #define DDC1 1
|
|
98
|
+
// #define DDC2 2
|
|
99
|
+
// #define DDC3 3
|
|
100
|
+
// #define DDC4 4
|
|
101
|
+
// #define DDC5 5
|
|
102
|
+
// #define DDC6 6
|
|
103
|
+
|
|
104
|
+
// #define PORTC _SFR_IO8(0x08)
|
|
105
|
+
// #define PORTC0 0
|
|
106
|
+
// #define PORTC1 1
|
|
107
|
+
// #define PORTC2 2
|
|
108
|
+
// #define PORTC3 3
|
|
109
|
+
// #define PORTC4 4
|
|
110
|
+
// #define PORTC5 5
|
|
111
|
+
// #define PORTC6 6
|
|
112
|
+
|
|
113
|
+
// #define PIND _SFR_IO8(0x09)
|
|
114
|
+
char PIND;
|
|
115
|
+
#define PIND0 0
|
|
116
|
+
#define PIND1 1
|
|
117
|
+
#define PIND2 2
|
|
118
|
+
#define PIND3 3
|
|
119
|
+
#define PIND4 4
|
|
120
|
+
#define PIND5 5
|
|
121
|
+
#define PIND6 6
|
|
122
|
+
#define PIND7 7
|
|
123
|
+
|
|
124
|
+
// #define DDRD _SFR_IO8(0x0A)
|
|
125
|
+
char DDRD;
|
|
126
|
+
#define DDD0 0
|
|
127
|
+
#define DDD1 1
|
|
128
|
+
#define DDD2 2
|
|
129
|
+
#define DDD3 3
|
|
130
|
+
#define DDD4 4
|
|
131
|
+
#define DDD5 5
|
|
132
|
+
#define DDD6 6
|
|
133
|
+
#define DDD7 7
|
|
134
|
+
|
|
135
|
+
// #define PORTD _SFR_IO8(0x0B)
|
|
136
|
+
char PORTD;
|
|
137
|
+
#define PORTD0 0
|
|
138
|
+
#define PORTD1 1
|
|
139
|
+
#define PORTD2 2
|
|
140
|
+
#define PORTD3 3
|
|
141
|
+
#define PORTD4 4
|
|
142
|
+
#define PORTD5 5
|
|
143
|
+
#define PORTD6 6
|
|
144
|
+
#define PORTD7 7
|
|
145
|
+
|
|
146
|
+
// #define TIFR0 _SFR_IO8(0x15)
|
|
147
|
+
// #define TOV0 0
|
|
148
|
+
// #define OCF0A 1
|
|
149
|
+
// #define OCF0B 2
|
|
150
|
+
|
|
151
|
+
// #define TIFR1 _SFR_IO8(0x16)
|
|
152
|
+
// #define TOV1 0
|
|
153
|
+
// #define OCF1A 1
|
|
154
|
+
// #define OCF1B 2
|
|
155
|
+
// #define ICF1 5
|
|
156
|
+
|
|
157
|
+
// #define TIFR2 _SFR_IO8(0x17)
|
|
158
|
+
// #define TOV2 0
|
|
159
|
+
// #define OCF2A 1
|
|
160
|
+
// #define OCF2B 2
|
|
161
|
+
|
|
162
|
+
// #define PCIFR _SFR_IO8(0x1B)
|
|
163
|
+
// #define PCIF0 0
|
|
164
|
+
// #define PCIF1 1
|
|
165
|
+
// #define PCIF2 2
|
|
166
|
+
|
|
167
|
+
// #define EIFR _SFR_IO8(0x1C)
|
|
168
|
+
// #define INTF0 0
|
|
169
|
+
// #define INTF1 1
|
|
170
|
+
|
|
171
|
+
// #define EIMSK _SFR_IO8(0x1D)
|
|
172
|
+
// #define INT0 0
|
|
173
|
+
// #define INT1 1
|
|
174
|
+
|
|
175
|
+
// #define GPIOR0 _SFR_IO8(0x1E)
|
|
176
|
+
// #define GPIOR00 0
|
|
177
|
+
// #define GPIOR01 1
|
|
178
|
+
// #define GPIOR02 2
|
|
179
|
+
// #define GPIOR03 3
|
|
180
|
+
// #define GPIOR04 4
|
|
181
|
+
// #define GPIOR05 5
|
|
182
|
+
// #define GPIOR06 6
|
|
183
|
+
// #define GPIOR07 7
|
|
184
|
+
|
|
185
|
+
// #define EECR _SFR_IO8(0x1F)
|
|
186
|
+
// #define EERE 0
|
|
187
|
+
// #define EEPE 1
|
|
188
|
+
// #define EEMPE 2
|
|
189
|
+
// #define EERIE 3
|
|
190
|
+
// #define EEPM0 4
|
|
191
|
+
// #define EEPM1 5
|
|
192
|
+
|
|
193
|
+
// #define EEDR _SFR_IO8(0x20)
|
|
194
|
+
// #define EEDR0 0
|
|
195
|
+
// #define EEDR1 1
|
|
196
|
+
// #define EEDR2 2
|
|
197
|
+
// #define EEDR3 3
|
|
198
|
+
// #define EEDR4 4
|
|
199
|
+
// #define EEDR5 5
|
|
200
|
+
// #define EEDR6 6
|
|
201
|
+
// #define EEDR7 7
|
|
202
|
+
|
|
203
|
+
// #define EEAR _SFR_IO16(0x21)
|
|
204
|
+
|
|
205
|
+
// #define EEARL _SFR_IO8(0x21)
|
|
206
|
+
// #define EEAR0 0
|
|
207
|
+
// #define EEAR1 1
|
|
208
|
+
// #define EEAR2 2
|
|
209
|
+
// #define EEAR3 3
|
|
210
|
+
// #define EEAR4 4
|
|
211
|
+
// #define EEAR5 5
|
|
212
|
+
// #define EEAR6 6
|
|
213
|
+
// #define EEAR7 7
|
|
214
|
+
|
|
215
|
+
// #define EEARH _SFR_IO8(0x22)
|
|
216
|
+
// #define EEAR8 0
|
|
217
|
+
// #define EEAR9 1
|
|
218
|
+
|
|
219
|
+
// #define _EEPROM_REG_LOCATIONS_ 1F2021
|
|
220
|
+
|
|
221
|
+
// #define GTCCR _SFR_IO8(0x23)
|
|
222
|
+
// #define PSRSYNC 0
|
|
223
|
+
// #define PSRASY 1
|
|
224
|
+
// #define TSM 7
|
|
225
|
+
|
|
226
|
+
// #define TCCR0A _SFR_IO8(0x24)
|
|
227
|
+
// #define WGM00 0
|
|
228
|
+
// #define WGM01 1
|
|
229
|
+
// #define COM0B0 4
|
|
230
|
+
// #define COM0B1 5
|
|
231
|
+
// #define COM0A0 6
|
|
232
|
+
// #define COM0A1 7
|
|
233
|
+
|
|
234
|
+
// #define TCCR0B _SFR_IO8(0x25)
|
|
235
|
+
char TCCR0B;
|
|
236
|
+
#define CS00 0
|
|
237
|
+
#define CS01 1
|
|
238
|
+
#define CS02 2
|
|
239
|
+
#define WGM02 3
|
|
240
|
+
#define FOC0B 6
|
|
241
|
+
#define FOC0A 7
|
|
242
|
+
|
|
243
|
+
// #define TCNT0 _SFR_IO8(0x26)
|
|
244
|
+
char TCNT0;
|
|
245
|
+
#define TCNT0_0 0
|
|
246
|
+
#define TCNT0_1 1
|
|
247
|
+
#define TCNT0_2 2
|
|
248
|
+
#define TCNT0_3 3
|
|
249
|
+
#define TCNT0_4 4
|
|
250
|
+
#define TCNT0_5 5
|
|
251
|
+
#define TCNT0_6 6
|
|
252
|
+
#define TCNT0_7 7
|
|
253
|
+
|
|
254
|
+
// #define OCR0A _SFR_IO8(0x27)
|
|
255
|
+
// #define OCR0A_0 0
|
|
256
|
+
// #define OCR0A_1 1
|
|
257
|
+
// #define OCR0A_2 2
|
|
258
|
+
// #define OCR0A_3 3
|
|
259
|
+
// #define OCR0A_4 4
|
|
260
|
+
// #define OCR0A_5 5
|
|
261
|
+
// #define OCR0A_6 6
|
|
262
|
+
// #define OCR0A_7 7
|
|
263
|
+
|
|
264
|
+
// #define OCR0B _SFR_IO8(0x28)
|
|
265
|
+
// #define OCR0B_0 0
|
|
266
|
+
// #define OCR0B_1 1
|
|
267
|
+
// #define OCR0B_2 2
|
|
268
|
+
// #define OCR0B_3 3
|
|
269
|
+
// #define OCR0B_4 4
|
|
270
|
+
// #define OCR0B_5 5
|
|
271
|
+
// #define OCR0B_6 6
|
|
272
|
+
// #define OCR0B_7 7
|
|
273
|
+
|
|
274
|
+
// #define GPIOR1 _SFR_IO8(0x2A)
|
|
275
|
+
// #define GPIOR10 0
|
|
276
|
+
// #define GPIOR11 1
|
|
277
|
+
// #define GPIOR12 2
|
|
278
|
+
// #define GPIOR13 3
|
|
279
|
+
// #define GPIOR14 4
|
|
280
|
+
// #define GPIOR15 5
|
|
281
|
+
// #define GPIOR16 6
|
|
282
|
+
// #define GPIOR17 7
|
|
283
|
+
|
|
284
|
+
// #define GPIOR2 _SFR_IO8(0x2B)
|
|
285
|
+
// #define GPIOR20 0
|
|
286
|
+
// #define GPIOR21 1
|
|
287
|
+
// #define GPIOR22 2
|
|
288
|
+
// #define GPIOR23 3
|
|
289
|
+
// #define GPIOR24 4
|
|
290
|
+
// #define GPIOR25 5
|
|
291
|
+
// #define GPIOR26 6
|
|
292
|
+
// #define GPIOR27 7
|
|
293
|
+
|
|
294
|
+
// #define SPCR _SFR_IO8(0x2C)
|
|
295
|
+
// #define SPR0 0
|
|
296
|
+
// #define SPR1 1
|
|
297
|
+
// #define CPHA 2
|
|
298
|
+
// #define CPOL 3
|
|
299
|
+
// #define MSTR 4
|
|
300
|
+
// #define DORD 5
|
|
301
|
+
// #define SPE 6
|
|
302
|
+
// #define SPIE 7
|
|
303
|
+
|
|
304
|
+
// #define SPSR _SFR_IO8(0x2D)
|
|
305
|
+
// #define SPI2X 0
|
|
306
|
+
// #define WCOL 6
|
|
307
|
+
// #define SPIF 7
|
|
308
|
+
|
|
309
|
+
// #define SPDR _SFR_IO8(0x2E)
|
|
310
|
+
// #define SPDR0 0
|
|
311
|
+
// #define SPDR1 1
|
|
312
|
+
// #define SPDR2 2
|
|
313
|
+
// #define SPDR3 3
|
|
314
|
+
// #define SPDR4 4
|
|
315
|
+
// #define SPDR5 5
|
|
316
|
+
// #define SPDR6 6
|
|
317
|
+
// #define SPDR7 7
|
|
318
|
+
|
|
319
|
+
// #define ACSR _SFR_IO8(0x30)
|
|
320
|
+
// #define ACIS0 0
|
|
321
|
+
// #define ACIS1 1
|
|
322
|
+
// #define ACIC 2
|
|
323
|
+
// #define ACIE 3
|
|
324
|
+
// #define ACI 4
|
|
325
|
+
// #define ACO 5
|
|
326
|
+
// #define ACBG 6
|
|
327
|
+
// #define ACD 7
|
|
328
|
+
|
|
329
|
+
// #define SMCR _SFR_IO8(0x33)
|
|
330
|
+
// #define SE 0
|
|
331
|
+
// #define SM0 1
|
|
332
|
+
// #define SM1 2
|
|
333
|
+
// #define SM2 3
|
|
334
|
+
|
|
335
|
+
// #define MCUSR _SFR_IO8(0x34)
|
|
336
|
+
// #define PORF 0
|
|
337
|
+
// #define EXTRF 1
|
|
338
|
+
// #define BORF 2
|
|
339
|
+
// #define WDRF 3
|
|
340
|
+
|
|
341
|
+
// #define MCUCR _SFR_IO8(0x35)
|
|
342
|
+
// #define IVCE 0
|
|
343
|
+
// #define IVSEL 1
|
|
344
|
+
// #define PUD 4
|
|
345
|
+
// #define BODSE 5
|
|
346
|
+
// #define BODS 6
|
|
347
|
+
|
|
348
|
+
// #define SPMCSR _SFR_IO8(0x37)
|
|
349
|
+
// #define SELFPRGEN 0
|
|
350
|
+
// #define PGERS 1
|
|
351
|
+
// #define PGWRT 2
|
|
352
|
+
// #define BLBSET 3
|
|
353
|
+
// #define RWWSRE 4
|
|
354
|
+
// #define RWWSB 6
|
|
355
|
+
// #define SPMIE 7
|
|
356
|
+
|
|
357
|
+
// #define WDTCSR _SFR_MEM8(0x60)
|
|
358
|
+
// #define WDP0 0
|
|
359
|
+
// #define WDP1 1
|
|
360
|
+
// #define WDP2 2
|
|
361
|
+
// #define WDE 3
|
|
362
|
+
// #define WDCE 4
|
|
363
|
+
// #define WDP3 5
|
|
364
|
+
// #define WDIE 6
|
|
365
|
+
// #define WDIF 7
|
|
366
|
+
|
|
367
|
+
// #define CLKPR _SFR_MEM8(0x61)
|
|
368
|
+
// #define CLKPS0 0
|
|
369
|
+
// #define CLKPS1 1
|
|
370
|
+
// #define CLKPS2 2
|
|
371
|
+
// #define CLKPS3 3
|
|
372
|
+
// #define CLKPCE 7
|
|
373
|
+
|
|
374
|
+
// #define PRR _SFR_MEM8(0x64)
|
|
375
|
+
// #define PRADC 0
|
|
376
|
+
// #define PRUSART0 1
|
|
377
|
+
// #define PRSPI 2
|
|
378
|
+
// #define PRTIM1 3
|
|
379
|
+
// #define PRTIM0 5
|
|
380
|
+
// #define PRTIM2 6
|
|
381
|
+
// #define PRTWI 7
|
|
382
|
+
|
|
383
|
+
// #define OSCCAL _SFR_MEM8(0x66)
|
|
384
|
+
// #define CAL0 0
|
|
385
|
+
// #define CAL1 1
|
|
386
|
+
// #define CAL2 2
|
|
387
|
+
// #define CAL3 3
|
|
388
|
+
// #define CAL4 4
|
|
389
|
+
// #define CAL5 5
|
|
390
|
+
// #define CAL6 6
|
|
391
|
+
// #define CAL7 7
|
|
392
|
+
|
|
393
|
+
// #define PCICR _SFR_MEM8(0x68)
|
|
394
|
+
// #define PCIE0 0
|
|
395
|
+
// #define PCIE1 1
|
|
396
|
+
// #define PCIE2 2
|
|
397
|
+
|
|
398
|
+
// #define EICRA _SFR_MEM8(0x69)
|
|
399
|
+
// #define ISC00 0
|
|
400
|
+
// #define ISC01 1
|
|
401
|
+
// #define ISC10 2
|
|
402
|
+
// #define ISC11 3
|
|
403
|
+
|
|
404
|
+
// #define PCMSK0 _SFR_MEM8(0x6B)
|
|
405
|
+
// #define PCINT0 0
|
|
406
|
+
// #define PCINT1 1
|
|
407
|
+
// #define PCINT2 2
|
|
408
|
+
// #define PCINT3 3
|
|
409
|
+
// #define PCINT4 4
|
|
410
|
+
// #define PCINT5 5
|
|
411
|
+
// #define PCINT6 6
|
|
412
|
+
// #define PCINT7 7
|
|
413
|
+
|
|
414
|
+
// #define PCMSK1 _SFR_MEM8(0x6C)
|
|
415
|
+
// #define PCINT8 0
|
|
416
|
+
// #define PCINT9 1
|
|
417
|
+
// #define PCINT10 2
|
|
418
|
+
// #define PCINT11 3
|
|
419
|
+
// #define PCINT12 4
|
|
420
|
+
// #define PCINT13 5
|
|
421
|
+
// #define PCINT14 6
|
|
422
|
+
|
|
423
|
+
// #define PCMSK2 _SFR_MEM8(0x6D)
|
|
424
|
+
// #define PCINT16 0
|
|
425
|
+
// #define PCINT17 1
|
|
426
|
+
// #define PCINT18 2
|
|
427
|
+
// #define PCINT19 3
|
|
428
|
+
// #define PCINT20 4
|
|
429
|
+
// #define PCINT21 5
|
|
430
|
+
// #define PCINT22 6
|
|
431
|
+
// #define PCINT23 7
|
|
432
|
+
|
|
433
|
+
// #define TIMSK0 _SFR_MEM8(0x6E)
|
|
434
|
+
char TIMSK0;
|
|
435
|
+
#define TOIE0 0
|
|
436
|
+
#define OCIE0A 1
|
|
437
|
+
#define OCIE0B 2
|
|
438
|
+
|
|
439
|
+
// #define TIMSK1 _SFR_MEM8(0x6F)
|
|
440
|
+
// #define TOIE1 0
|
|
441
|
+
// #define OCIE1A 1
|
|
442
|
+
// #define OCIE1B 2
|
|
443
|
+
// #define ICIE1 5
|
|
444
|
+
|
|
445
|
+
// #define TIMSK2 _SFR_MEM8(0x70)
|
|
446
|
+
// #define TOIE2 0
|
|
447
|
+
// #define OCIE2A 1
|
|
448
|
+
// #define OCIE2B 2
|
|
449
|
+
|
|
450
|
+
// #ifndef __ASSEMBLER__
|
|
451
|
+
// #define ADC _SFR_MEM16(0x78)
|
|
452
|
+
// #endif
|
|
453
|
+
// #define ADCW _SFR_MEM16(0x78)
|
|
454
|
+
|
|
455
|
+
// #define ADCL _SFR_MEM8(0x78)
|
|
456
|
+
// #define ADCL0 0
|
|
457
|
+
// #define ADCL1 1
|
|
458
|
+
// #define ADCL2 2
|
|
459
|
+
// #define ADCL3 3
|
|
460
|
+
// #define ADCL4 4
|
|
461
|
+
// #define ADCL5 5
|
|
462
|
+
// #define ADCL6 6
|
|
463
|
+
// #define ADCL7 7
|
|
464
|
+
|
|
465
|
+
// #define ADCH _SFR_MEM8(0x79)
|
|
466
|
+
// #define ADCH0 0
|
|
467
|
+
// #define ADCH1 1
|
|
468
|
+
// #define ADCH2 2
|
|
469
|
+
// #define ADCH3 3
|
|
470
|
+
// #define ADCH4 4
|
|
471
|
+
// #define ADCH5 5
|
|
472
|
+
// #define ADCH6 6
|
|
473
|
+
// #define ADCH7 7
|
|
474
|
+
|
|
475
|
+
// #define ADCSRA _SFR_MEM8(0x7A)
|
|
476
|
+
// #define ADPS0 0
|
|
477
|
+
// #define ADPS1 1
|
|
478
|
+
// #define ADPS2 2
|
|
479
|
+
// #define ADIE 3
|
|
480
|
+
// #define ADIF 4
|
|
481
|
+
// #define ADATE 5
|
|
482
|
+
// #define ADSC 6
|
|
483
|
+
// #define ADEN 7
|
|
484
|
+
|
|
485
|
+
// #define ADCSRB _SFR_MEM8(0x7B)
|
|
486
|
+
// #define ADTS0 0
|
|
487
|
+
// #define ADTS1 1
|
|
488
|
+
// #define ADTS2 2
|
|
489
|
+
// #define ACME 6
|
|
490
|
+
|
|
491
|
+
// #define ADMUX _SFR_MEM8(0x7C)
|
|
492
|
+
// #define MUX0 0
|
|
493
|
+
// #define MUX1 1
|
|
494
|
+
// #define MUX2 2
|
|
495
|
+
// #define MUX3 3
|
|
496
|
+
// #define ADLAR 5
|
|
497
|
+
// #define REFS0 6
|
|
498
|
+
// #define REFS1 7
|
|
499
|
+
|
|
500
|
+
// #define DIDR0 _SFR_MEM8(0x7E)
|
|
501
|
+
// #define ADC0D 0
|
|
502
|
+
// #define ADC1D 1
|
|
503
|
+
// #define ADC2D 2
|
|
504
|
+
// #define ADC3D 3
|
|
505
|
+
// #define ADC4D 4
|
|
506
|
+
// #define ADC5D 5
|
|
507
|
+
|
|
508
|
+
// #define DIDR1 _SFR_MEM8(0x7F)
|
|
509
|
+
// #define AIN0D 0
|
|
510
|
+
// #define AIN1D 1
|
|
511
|
+
|
|
512
|
+
// #define TCCR1A _SFR_MEM8(0x80)
|
|
513
|
+
// #define WGM10 0
|
|
514
|
+
// #define WGM11 1
|
|
515
|
+
// #define COM1B0 4
|
|
516
|
+
// #define COM1B1 5
|
|
517
|
+
// #define COM1A0 6
|
|
518
|
+
// #define COM1A1 7
|
|
519
|
+
|
|
520
|
+
// #define TCCR1B _SFR_MEM8(0x81)
|
|
521
|
+
// #define CS10 0
|
|
522
|
+
// #define CS11 1
|
|
523
|
+
// #define CS12 2
|
|
524
|
+
// #define WGM12 3
|
|
525
|
+
// #define WGM13 4
|
|
526
|
+
// #define ICES1 6
|
|
527
|
+
// #define ICNC1 7
|
|
528
|
+
|
|
529
|
+
// #define TCCR1C _SFR_MEM8(0x82)
|
|
530
|
+
// #define FOC1B 6
|
|
531
|
+
// #define FOC1A 7
|
|
532
|
+
|
|
533
|
+
// #define TCNT1 _SFR_MEM16(0x84)
|
|
534
|
+
|
|
535
|
+
// #define TCNT1L _SFR_MEM8(0x84)
|
|
536
|
+
// #define TCNT1L0 0
|
|
537
|
+
// #define TCNT1L1 1
|
|
538
|
+
// #define TCNT1L2 2
|
|
539
|
+
// #define TCNT1L3 3
|
|
540
|
+
// #define TCNT1L4 4
|
|
541
|
+
// #define TCNT1L5 5
|
|
542
|
+
// #define TCNT1L6 6
|
|
543
|
+
// #define TCNT1L7 7
|
|
544
|
+
|
|
545
|
+
// #define TCNT1H _SFR_MEM8(0x85)
|
|
546
|
+
// #define TCNT1H0 0
|
|
547
|
+
// #define TCNT1H1 1
|
|
548
|
+
// #define TCNT1H2 2
|
|
549
|
+
// #define TCNT1H3 3
|
|
550
|
+
// #define TCNT1H4 4
|
|
551
|
+
// #define TCNT1H5 5
|
|
552
|
+
// #define TCNT1H6 6
|
|
553
|
+
// #define TCNT1H7 7
|
|
554
|
+
|
|
555
|
+
// #define ICR1 _SFR_MEM16(0x86)
|
|
556
|
+
|
|
557
|
+
// #define ICR1L _SFR_MEM8(0x86)
|
|
558
|
+
// #define ICR1L0 0
|
|
559
|
+
// #define ICR1L1 1
|
|
560
|
+
// #define ICR1L2 2
|
|
561
|
+
// #define ICR1L3 3
|
|
562
|
+
// #define ICR1L4 4
|
|
563
|
+
// #define ICR1L5 5
|
|
564
|
+
// #define ICR1L6 6
|
|
565
|
+
// #define ICR1L7 7
|
|
566
|
+
|
|
567
|
+
// #define ICR1H _SFR_MEM8(0x87)
|
|
568
|
+
// #define ICR1H0 0
|
|
569
|
+
// #define ICR1H1 1
|
|
570
|
+
// #define ICR1H2 2
|
|
571
|
+
// #define ICR1H3 3
|
|
572
|
+
// #define ICR1H4 4
|
|
573
|
+
// #define ICR1H5 5
|
|
574
|
+
// #define ICR1H6 6
|
|
575
|
+
// #define ICR1H7 7
|
|
576
|
+
|
|
577
|
+
// #define OCR1A _SFR_MEM16(0x88)
|
|
578
|
+
|
|
579
|
+
// #define OCR1AL _SFR_MEM8(0x88)
|
|
580
|
+
// #define OCR1AL0 0
|
|
581
|
+
// #define OCR1AL1 1
|
|
582
|
+
// #define OCR1AL2 2
|
|
583
|
+
// #define OCR1AL3 3
|
|
584
|
+
// #define OCR1AL4 4
|
|
585
|
+
// #define OCR1AL5 5
|
|
586
|
+
// #define OCR1AL6 6
|
|
587
|
+
// #define OCR1AL7 7
|
|
588
|
+
|
|
589
|
+
// #define OCR1AH _SFR_MEM8(0x89)
|
|
590
|
+
// #define OCR1AH0 0
|
|
591
|
+
// #define OCR1AH1 1
|
|
592
|
+
// #define OCR1AH2 2
|
|
593
|
+
// #define OCR1AH3 3
|
|
594
|
+
// #define OCR1AH4 4
|
|
595
|
+
// #define OCR1AH5 5
|
|
596
|
+
// #define OCR1AH6 6
|
|
597
|
+
// #define OCR1AH7 7
|
|
598
|
+
|
|
599
|
+
// #define OCR1B _SFR_MEM16(0x8A)
|
|
600
|
+
|
|
601
|
+
// #define OCR1BL _SFR_MEM8(0x8A)
|
|
602
|
+
// #define OCR1BL0 0
|
|
603
|
+
// #define OCR1BL1 1
|
|
604
|
+
// #define OCR1BL2 2
|
|
605
|
+
// #define OCR1BL3 3
|
|
606
|
+
// #define OCR1BL4 4
|
|
607
|
+
// #define OCR1BL5 5
|
|
608
|
+
// #define OCR1BL6 6
|
|
609
|
+
// #define OCR1BL7 7
|
|
610
|
+
|
|
611
|
+
// #define OCR1BH _SFR_MEM8(0x8B)
|
|
612
|
+
// #define OCR1BH0 0
|
|
613
|
+
// #define OCR1BH1 1
|
|
614
|
+
// #define OCR1BH2 2
|
|
615
|
+
// #define OCR1BH3 3
|
|
616
|
+
// #define OCR1BH4 4
|
|
617
|
+
// #define OCR1BH5 5
|
|
618
|
+
// #define OCR1BH6 6
|
|
619
|
+
// #define OCR1BH7 7
|
|
620
|
+
|
|
621
|
+
// #define TCCR2A _SFR_MEM8(0xB0)
|
|
622
|
+
// #define WGM20 0
|
|
623
|
+
// #define WGM21 1
|
|
624
|
+
// #define COM2B0 4
|
|
625
|
+
// #define COM2B1 5
|
|
626
|
+
// #define COM2A0 6
|
|
627
|
+
// #define COM2A1 7
|
|
628
|
+
|
|
629
|
+
// #define TCCR2B _SFR_MEM8(0xB1)
|
|
630
|
+
// #define CS20 0
|
|
631
|
+
// #define CS21 1
|
|
632
|
+
// #define CS22 2
|
|
633
|
+
// #define WGM22 3
|
|
634
|
+
// #define FOC2B 6
|
|
635
|
+
// #define FOC2A 7
|
|
636
|
+
|
|
637
|
+
// #define TCNT2 _SFR_MEM8(0xB2)
|
|
638
|
+
// #define TCNT2_0 0
|
|
639
|
+
// #define TCNT2_1 1
|
|
640
|
+
// #define TCNT2_2 2
|
|
641
|
+
// #define TCNT2_3 3
|
|
642
|
+
// #define TCNT2_4 4
|
|
643
|
+
// #define TCNT2_5 5
|
|
644
|
+
// #define TCNT2_6 6
|
|
645
|
+
// #define TCNT2_7 7
|
|
646
|
+
|
|
647
|
+
// #define OCR2A _SFR_MEM8(0xB3)
|
|
648
|
+
// #define OCR2_0 0
|
|
649
|
+
// #define OCR2_1 1
|
|
650
|
+
// #define OCR2_2 2
|
|
651
|
+
// #define OCR2_3 3
|
|
652
|
+
// #define OCR2_4 4
|
|
653
|
+
// #define OCR2_5 5
|
|
654
|
+
// #define OCR2_6 6
|
|
655
|
+
// #define OCR2_7 7
|
|
656
|
+
|
|
657
|
+
// #define OCR2B _SFR_MEM8(0xB4)
|
|
658
|
+
// #define OCR2_0 0
|
|
659
|
+
// #define OCR2_1 1
|
|
660
|
+
// #define OCR2_2 2
|
|
661
|
+
// #define OCR2_3 3
|
|
662
|
+
// #define OCR2_4 4
|
|
663
|
+
// #define OCR2_5 5
|
|
664
|
+
// #define OCR2_6 6
|
|
665
|
+
// #define OCR2_7 7
|
|
666
|
+
|
|
667
|
+
// #define ASSR _SFR_MEM8(0xB6)
|
|
668
|
+
// #define TCR2BUB 0
|
|
669
|
+
// #define TCR2AUB 1
|
|
670
|
+
// #define OCR2BUB 2
|
|
671
|
+
// #define OCR2AUB 3
|
|
672
|
+
// #define TCN2UB 4
|
|
673
|
+
// #define AS2 5
|
|
674
|
+
// #define EXCLK 6
|
|
675
|
+
|
|
676
|
+
// #define TWBR _SFR_MEM8(0xB8)
|
|
677
|
+
// #define TWBR0 0
|
|
678
|
+
// #define TWBR1 1
|
|
679
|
+
// #define TWBR2 2
|
|
680
|
+
// #define TWBR3 3
|
|
681
|
+
// #define TWBR4 4
|
|
682
|
+
// #define TWBR5 5
|
|
683
|
+
// #define TWBR6 6
|
|
684
|
+
// #define TWBR7 7
|
|
685
|
+
|
|
686
|
+
// #define TWSR _SFR_MEM8(0xB9)
|
|
687
|
+
// #define TWPS0 0
|
|
688
|
+
// #define TWPS1 1
|
|
689
|
+
// #define TWS3 3
|
|
690
|
+
// #define TWS4 4
|
|
691
|
+
// #define TWS5 5
|
|
692
|
+
// #define TWS6 6
|
|
693
|
+
// #define TWS7 7
|
|
694
|
+
|
|
695
|
+
// #define TWAR _SFR_MEM8(0xBA)
|
|
696
|
+
// #define TWGCE 0
|
|
697
|
+
// #define TWA0 1
|
|
698
|
+
// #define TWA1 2
|
|
699
|
+
// #define TWA2 3
|
|
700
|
+
// #define TWA3 4
|
|
701
|
+
// #define TWA4 5
|
|
702
|
+
// #define TWA5 6
|
|
703
|
+
// #define TWA6 7
|
|
704
|
+
|
|
705
|
+
// #define TWDR _SFR_MEM8(0xBB)
|
|
706
|
+
// #define TWD0 0
|
|
707
|
+
// #define TWD1 1
|
|
708
|
+
// #define TWD2 2
|
|
709
|
+
// #define TWD3 3
|
|
710
|
+
// #define TWD4 4
|
|
711
|
+
// #define TWD5 5
|
|
712
|
+
// #define TWD6 6
|
|
713
|
+
// #define TWD7 7
|
|
714
|
+
|
|
715
|
+
// #define TWCR _SFR_MEM8(0xBC)
|
|
716
|
+
// #define TWIE 0
|
|
717
|
+
// #define TWEN 2
|
|
718
|
+
// #define TWWC 3
|
|
719
|
+
// #define TWSTO 4
|
|
720
|
+
// #define TWSTA 5
|
|
721
|
+
// #define TWEA 6
|
|
722
|
+
// #define TWINT 7
|
|
723
|
+
|
|
724
|
+
// #define TWAMR _SFR_MEM8(0xBD)
|
|
725
|
+
// #define TWAM0 0
|
|
726
|
+
// #define TWAM1 1
|
|
727
|
+
// #define TWAM2 2
|
|
728
|
+
// #define TWAM3 3
|
|
729
|
+
// #define TWAM4 4
|
|
730
|
+
// #define TWAM5 5
|
|
731
|
+
// #define TWAM6 6
|
|
732
|
+
|
|
733
|
+
// #define UCSR0A _SFR_MEM8(0xC0)
|
|
734
|
+
// #define MPCM0 0
|
|
735
|
+
// #define U2X0 1
|
|
736
|
+
// #define UPE0 2
|
|
737
|
+
// #define DOR0 3
|
|
738
|
+
// #define FE0 4
|
|
739
|
+
// #define UDRE0 5
|
|
740
|
+
// #define TXC0 6
|
|
741
|
+
// #define RXC0 7
|
|
742
|
+
|
|
743
|
+
// #define UCSR0B _SFR_MEM8(0xC1)
|
|
744
|
+
// #define TXB80 0
|
|
745
|
+
// #define RXB80 1
|
|
746
|
+
// #define UCSZ02 2
|
|
747
|
+
// #define TXEN0 3
|
|
748
|
+
// #define RXEN0 4
|
|
749
|
+
// #define UDRIE0 5
|
|
750
|
+
// #define TXCIE0 6
|
|
751
|
+
// #define RXCIE0 7
|
|
752
|
+
|
|
753
|
+
// #define UCSR0C _SFR_MEM8(0xC2)
|
|
754
|
+
// #define UCPOL0 0
|
|
755
|
+
// #define UCSZ00 1
|
|
756
|
+
// #define UCPHA0 1
|
|
757
|
+
// #define UCSZ01 2
|
|
758
|
+
// #define UDORD0 2
|
|
759
|
+
// #define USBS0 3
|
|
760
|
+
// #define UPM00 4
|
|
761
|
+
// #define UPM01 5
|
|
762
|
+
// #define UMSEL00 6
|
|
763
|
+
// #define UMSEL01 7
|
|
764
|
+
|
|
765
|
+
// #define UBRR0 _SFR_MEM16(0xC4)
|
|
766
|
+
|
|
767
|
+
// #define UBRR0L _SFR_MEM8(0xC4)
|
|
768
|
+
// #define UBRR0_0 0
|
|
769
|
+
// #define UBRR0_1 1
|
|
770
|
+
// #define UBRR0_2 2
|
|
771
|
+
// #define UBRR0_3 3
|
|
772
|
+
// #define UBRR0_4 4
|
|
773
|
+
// #define UBRR0_5 5
|
|
774
|
+
// #define UBRR0_6 6
|
|
775
|
+
// #define UBRR0_7 7
|
|
776
|
+
|
|
777
|
+
// #define UBRR0H _SFR_MEM8(0xC5)
|
|
778
|
+
// #define UBRR0_8 0
|
|
779
|
+
// #define UBRR0_9 1
|
|
780
|
+
// #define UBRR0_10 2
|
|
781
|
+
// #define UBRR0_11 3
|
|
782
|
+
|
|
783
|
+
// #define UDR0 _SFR_MEM8(0xC6)
|
|
784
|
+
// #define UDR0_0 0
|
|
785
|
+
// #define UDR0_1 1
|
|
786
|
+
// #define UDR0_2 2
|
|
787
|
+
// #define UDR0_3 3
|
|
788
|
+
// #define UDR0_4 4
|
|
789
|
+
// #define UDR0_5 5
|
|
790
|
+
// #define UDR0_6 6
|
|
791
|
+
// #define UDR0_7 7
|
|
792
|
+
|
|
793
|
+
|
|
794
|
+
|
|
795
|
+
// /* Interrupt Vectors */
|
|
796
|
+
// /* Interrupt Vector 0 is the reset vector. */
|
|
797
|
+
// #define INT0_vect _VECTOR(1) /* External Interrupt Request 0 */
|
|
798
|
+
// #define INT1_vect _VECTOR(2) /* External Interrupt Request 1 */
|
|
799
|
+
// #define PCINT0_vect _VECTOR(3) /* Pin Change Interrupt Request 0 */
|
|
800
|
+
// #define PCINT1_vect _VECTOR(4) /* Pin Change Interrupt Request 0 */
|
|
801
|
+
// #define PCINT2_vect _VECTOR(5) /* Pin Change Interrupt Request 1 */
|
|
802
|
+
// #define WDT_vect _VECTOR(6) /* Watchdog Time-out Interrupt */
|
|
803
|
+
// #define TIMER2_COMPA_vect _VECTOR(7) /* Timer/Counter2 Compare Match A */
|
|
804
|
+
// #define TIMER2_COMPB_vect _VECTOR(8) /* Timer/Counter2 Compare Match A */
|
|
805
|
+
// #define TIMER2_OVF_vect _VECTOR(9) /* Timer/Counter2 Overflow */
|
|
806
|
+
// #define TIMER1_CAPT_vect _VECTOR(10) /* Timer/Counter1 Capture Event */
|
|
807
|
+
// #define TIMER1_COMPA_vect _VECTOR(11) /* Timer/Counter1 Compare Match A */
|
|
808
|
+
// #define TIMER1_COMPB_vect _VECTOR(12) /* Timer/Counter1 Compare Match B */
|
|
809
|
+
// #define TIMER1_OVF_vect _VECTOR(13) /* Timer/Counter1 Overflow */
|
|
810
|
+
// #define TIMER0_COMPA_vect _VECTOR(14) /* TimerCounter0 Compare Match A */
|
|
811
|
+
// #define TIMER0_COMPB_vect _VECTOR(15) /* TimerCounter0 Compare Match B */
|
|
812
|
+
// #define TIMER0_OVF_vect _VECTOR(16) /* Timer/Couner0 Overflow */
|
|
813
|
+
// #define SPI_STC_vect _VECTOR(17) /* SPI Serial Transfer Complete */
|
|
814
|
+
// #define USART_RX_vect _VECTOR(18) /* USART Rx Complete */
|
|
815
|
+
// #define USART_UDRE_vect _VECTOR(19) /* USART, Data Register Empty */
|
|
816
|
+
// #define USART_TX_vect _VECTOR(20) /* USART Tx Complete */
|
|
817
|
+
// #define ADC_vect _VECTOR(21) /* ADC Conversion Complete */
|
|
818
|
+
// #define EE_READY_vect _VECTOR(22) /* EEPROM Ready */
|
|
819
|
+
// #define ANALOG_COMP_vect _VECTOR(23) /* Analog Comparator */
|
|
820
|
+
// #define TWI_vect _VECTOR(24) /* Two-wire Serial Interface */
|
|
821
|
+
// #define SPM_READY_vect _VECTOR(25) /* Store Program Memory Read */
|
|
822
|
+
|
|
823
|
+
// #define _VECTORS_SIZE (26 * 4)
|
|
824
|
+
|
|
825
|
+
|
|
826
|
+
|
|
827
|
+
// /* Constants */
|
|
828
|
+
// #define SPM_PAGESIZE 128
|
|
829
|
+
// #define RAMEND 0x8FF /* Last On-Chip SRAM Location */
|
|
830
|
+
// #define XRAMSIZE 0
|
|
831
|
+
// #define XRAMEND RAMEND
|
|
832
|
+
// #define E2END 0x3FF
|
|
833
|
+
// #define E2PAGESIZE 4
|
|
834
|
+
// #define FLASHEND 0x7FFF
|
|
835
|
+
|
|
836
|
+
|
|
837
|
+
|
|
838
|
+
// /* Fuses */
|
|
839
|
+
// #define FUSE_MEMORY_SIZE 3
|
|
840
|
+
|
|
841
|
+
// /* Low Fuse Byte */
|
|
842
|
+
// #define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */
|
|
843
|
+
// #define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */
|
|
844
|
+
// #define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */
|
|
845
|
+
// #define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */
|
|
846
|
+
// #define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */
|
|
847
|
+
// #define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */
|
|
848
|
+
// #define FUSE_CKOUT (unsigned char)~_BV(6) /* Clock output */
|
|
849
|
+
// #define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */
|
|
850
|
+
// #define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8)
|
|
851
|
+
|
|
852
|
+
// /* High Fuse Byte */
|
|
853
|
+
// #define FUSE_BODLEVEL0 (unsigned char)~_BV(0) /* Brown-out Detector trigger level */
|
|
854
|
+
// #define FUSE_BODLEVEL1 (unsigned char)~_BV(1) /* Brown-out Detector trigger level */
|
|
855
|
+
// #define FUSE_BODLEVEL2 (unsigned char)~_BV(2) /* Brown-out Detector trigger level */
|
|
856
|
+
// #define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */
|
|
857
|
+
// #define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog Timer Always On */
|
|
858
|
+
// #define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */
|
|
859
|
+
// #define FUSE_DWEN (unsigned char)~_BV(6) /* debugWIRE Enable */
|
|
860
|
+
// #define FUSE_RSTDISBL (unsigned char)~_BV(7) /* External reset disable */
|
|
861
|
+
// #define HFUSE_DEFAULT (FUSE_SPIEN)
|
|
862
|
+
|
|
863
|
+
// /* Extended Fuse Byte */
|
|
864
|
+
// #define FUSE_BOOTRST (unsigned char)~_BV(0)
|
|
865
|
+
// #define FUSE_BOOTSZ0 (unsigned char)~_BV(1)
|
|
866
|
+
// #define FUSE_BOOTSZ1 (unsigned char)~_BV(2)
|
|
867
|
+
// #define EFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1)
|
|
868
|
+
|
|
869
|
+
|
|
870
|
+
|
|
871
|
+
// /* Lock Bits */
|
|
872
|
+
// #define __LOCK_BITS_EXIST
|
|
873
|
+
// #define __BOOT_LOCK_BITS_0_EXIST
|
|
874
|
+
// #define __BOOT_LOCK_BITS_1_EXIST
|
|
875
|
+
|
|
876
|
+
|
|
877
|
+
// /* Signature */
|
|
878
|
+
// #define SIGNATURE_0 0x1E
|
|
879
|
+
// #define SIGNATURE_1 0x95
|
|
880
|
+
// #define SIGNATURE_2 0x0F
|
|
881
|
+
|
|
882
|
+
|
|
883
|
+
#endif /* _AVR_IOM328P_H_ */
|