carray 3.0.5 → 3.0.6

data/ext/carray_kernels_reduce_boolean.c

@@ -93,24 +93,516 @@ all_ki_stream_bool (VALUE arg)
       return BOOL2VAL((boolean8_t) (acc));
 }
 
+/* The walks can raise part way (a Ruby call per cell in the object
+   lane, an allocation in any lane).  Their states live in the caller's
+   frame, and ca_iter_ensure finishes them however the body leaves. */
+typedef struct {
+  ca_iter_state states[1];
+  VALUE self;
+  CArray *ca;
+  int8_t *slab_axes;
+  int8_t naxes;
+  int keep_axis;
+} all_ki_native_bool_frame;
+
 static VALUE
-all_ki_native_bool (VALUE self, CArray *ca, int8_t *slab_axes, int8_t naxes, int keep_axis)
+all_ki_native_bool_body (VALUE arg)
 {
+  all_ki_native_bool_frame *fr = (all_ki_native_bool_frame *) arg;
+  VALUE self = fr->self;
+  (void) self;
+  CArray *ca = fr->ca;
+  (void) ca;
+  int8_t *slab_axes = fr->slab_axes;
+  (void) slab_axes;
+  int8_t naxes = fr->naxes;
+  (void) naxes;
+  int keep_axis = fr->keep_axis;
+  (void) keep_axis;
+#define st (fr->states[0])
     if ( naxes == ca->ndim && ca->ndim >= 1 && !keep_axis &&
          ca->elements > 0 &&
          ca_is_lazy_view(ca) && ! ca_has_mask(ca) &&
-         ca_fast_paths_enabled() ) {
+         ca_fast_path(CA_SC_LAZY_STREAMING_REDUCE) ) {
       all_ki_stream_bool_t __ctx;
       __ctx.chunk = NULL;
       __ctx.ca    = ca;
       return ca_lazy_arena_protect(all_ki_stream_bool, ca_lazy_arena_release_held,
                                    (VALUE) &__ctx);
     }
+    /* L.1 / L.7: loop-interchange fast path with inner-tiling
+       (PROPOSAL_REDUCTION_LOOP_INTERCHANGE).
+       MEMO_REDUCTION_FASTPATH_ENTITY_ONLY_GUARD Tier 1: extend from
+       entity-only to any contig row-major buffer.  ca_attach_is_alias
+       is true for CA_OBJ_ARRAY and for CAStride-family views whose
+       composed strides are row-major contiguous (CARefer reshape,
+       contig CABlock, CAFarray, alias CAStride, ...); ca_attach then
+       exposes ca->ptr as that buffer at O(1) cost (no materialise). */
+    if ( naxes == 1
+         && slab_axes[0] != (int8_t)(ca->ndim - 1)
+         && ! ca_has_mask(ca)
+         && ca_attach_is_alias(ca)
+         && ca_fast_path(CA_SC_LOOP_INTERCHANGE) ) {
+      int8_t    __li_ax    = slab_axes[0];
+      ca_size_t __li_M     = ca->dim[__li_ax];
+      ca_size_t __li_INNER = 1;
+      for ( int8_t __k = (int8_t)(__li_ax + 1); __k < ca->ndim; __k++ ) __li_INNER *= ca->dim[__k];
+      ca_size_t __li_OUTER = 1;
+      for ( int8_t __k = 0; __k < __li_ax; __k++ ) __li_OUTER *= ca->dim[__k];
+
+      /* Threshold gate: skip when too small to amortise alloc + 2-pass overhead. */
+      if ( __li_INNER >= 64 && __li_M * __li_INNER >= 1024 ) {
+        VALUE   vout = rb_ca_new_reduced(self, slab_axes, naxes, CA_BOOLEAN, keep_axis);
+        CArray *co;
+        GetCArray(vout, co);
+        boolean8_t *op = (boolean8_t *) co->ptr;
+        ca_attach(ca);   /* window: numeric lanes only, nothing raises inside; O(1) alias attach */
+        const boolean8_t *p_root = (const boolean8_t *) ca->ptr;
+
+        /* Per-buffer stack accumulators (one per :plus state, sized
+           to L7 TILE = 512 cells regardless of INNER). */
+          boolean8_t  __li_buf_acc[512];
+
+        ca_size_t __li_plane_elems = __li_M * __li_INNER;
+        const ca_size_t __li_TILE = 512;
+        for ( ca_size_t __li_o = 0; __li_o < __li_OUTER; __li_o++ ) {
+          const boolean8_t *__li_plane = p_root + __li_o * __li_plane_elems;
+          for ( ca_size_t __li_tile = 0; __li_tile < __li_INNER; __li_tile += __li_TILE ) {
+            ca_size_t __li_tile_len = (__li_INNER - __li_tile < __li_TILE)
+                                      ? (__li_INNER - __li_tile) : __li_TILE;
+              for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                __li_buf_acc[__j] = (boolean8_t) (1);
+              }
+            for ( ca_size_t __li_i = 0; __li_i < __li_M; __li_i++ ) {
+              const boolean8_t *__li_row = __li_plane + __li_i * __li_INNER + __li_tile;
+              _Pragma("omp simd")
+              for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                boolean8_t v = __li_row[__j];
+                __li_buf_acc[__j] &= v;
+                (void) v;
+              }
+            }
+
+            for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+              op[__li_o * __li_INNER + __li_tile + __j] = (boolean8_t) (__li_buf_acc[__j]);
+            }
+          }
+        }
+        ca_detach(ca);
+
+        if ( naxes == ca->ndim && !keep_axis ) return BOOL2VAL(op[0]);   /* unreachable: ax != innermost && naxes == 1 < ndim */
+        return vout;
+      }
+    }
+
+    /* MEMO_REDUCTION_FASTPATH_ENTITY_ONLY_GUARD Tier 2: CAStack source.
+       view.reduce(axis: ax>=1) is exactly K independent per-parent
+       reduces over (ax - 1) of each contiguous parent; output row k
+       = parent k's reduced plane.  Run the L.7 core per parent (each
+       attach is O(1) for entity parents), no whole-view materialise.
+
+       K.3 (PROPOSAL_CASTACK_K_AXIS, 2026-06-20): gated to k_axis == 0
+       because the per-parent output layout in dst assumes K is the
+       outermost output axis (= each parent contributes a contiguous
+       block of parent_OUTER * parent_INNER cells).  For k_axis != 0
+       the parents' outputs are interleaved in dst -- generalising
+       the output stride is doable but out of K.3 scope.  The
+       dispatch falls through to ca_iter_state_init_l2 SLAB_AXES
+       which engages the K.3-generalised tile cache. */
+    if ( naxes == 1
+         && slab_axes[0] >= 1
+         && slab_axes[0] != (int8_t)(ca->ndim - 1)
+         && ! ca_has_mask(ca)
+         && ca_func[ca->obj_type].attach == ca_stack_func.attach
+         && ((CAStack *) ca)->k_axis == 0
+         && ca_fast_path(CA_SC_STACK_LOOP_INTERCHANGE) ) {
+      CAStack  *__li_st    = (CAStack *) ca;
+      int8_t    __li_ax    = slab_axes[0];
+      ca_size_t __li_M     = ca->dim[__li_ax];
+      ca_size_t __li_INNER = 1;
+      for ( int8_t __k = (int8_t)(__li_ax + 1); __k < ca->ndim; __k++ ) __li_INNER *= ca->dim[__k];
+      ca_size_t __li_OUTER = 1;   /* parent outer = dims 1..ax-1 (excludes K = axis 0) */
+      for ( int8_t __k = 1; __k < __li_ax; __k++ ) __li_OUTER *= ca->dim[__k];
+
+      /* Bail to the generic path if any parent carries a mask (the
+         core reads parent->ptr without mask awareness). */
+      int __li_ok = 1;
+      for ( int32_t __kk = 0; __kk < __li_st->n_parents; __kk++ ) {
+        if ( ca_has_mask(__li_st->parents[__kk]) ) { __li_ok = 0; break; }
+      }
+
+      if ( __li_ok && __li_INNER >= 64 && __li_M * __li_INNER >= 1024 ) {
+        VALUE   vout = rb_ca_new_reduced(self, slab_axes, naxes, CA_BOOLEAN, keep_axis);
+        CArray *co;
+        GetCArray(vout, co);
+        boolean8_t *op = (boolean8_t *) co->ptr;
+
+          boolean8_t  __li_buf_acc[512];
+
+        ca_size_t __li_plane_elems = __li_M * __li_INNER;
+        ca_size_t __li_parent_out  = __li_OUTER * __li_INNER;
+        const ca_size_t __li_TILE = 512;
+        for ( int32_t __kk = 0; __kk < __li_st->n_parents; __kk++ ) {
+          ca_attach(__li_st->parents[__kk]);   /* window: a parent may run Ruby to fill itself (a CAObject's copy_data); a raising attach holds nothing and the earlier parents are already detached, and the numeric loop after it does not raise */
+          const boolean8_t *p_root = (const boolean8_t *) __li_st->parents[__kk]->ptr;
+          boolean8_t *__li_op_k = op + (ca_size_t) __kk * __li_parent_out;
+        for ( ca_size_t __li_o = 0; __li_o < __li_OUTER; __li_o++ ) {
+          const boolean8_t *__li_plane = p_root + __li_o * __li_plane_elems;
+          for ( ca_size_t __li_tile = 0; __li_tile < __li_INNER; __li_tile += __li_TILE ) {
+            ca_size_t __li_tile_len = (__li_INNER - __li_tile < __li_TILE)
+                                      ? (__li_INNER - __li_tile) : __li_TILE;
+              for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                __li_buf_acc[__j] = (boolean8_t) (1);
+              }
+            for ( ca_size_t __li_i = 0; __li_i < __li_M; __li_i++ ) {
+              const boolean8_t *__li_row = __li_plane + __li_i * __li_INNER + __li_tile;
+              _Pragma("omp simd")
+              for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                boolean8_t v = __li_row[__j];
+                __li_buf_acc[__j] &= v;
+                (void) v;
+              }
+            }
+
+            for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+              __li_op_k[__li_o * __li_INNER + __li_tile + __j] = (boolean8_t) (__li_buf_acc[__j]);
+            }
+          }
+        }
+          ca_detach(__li_st->parents[__kk]);
+        }
+
+        return vout;
+      }
+    }
+
+    /* M.1.0 + M.2.0a (PROPOSAL_MKKERNEL_TIER2_K_AXIS_GEN, 2026-06-20):
+       Tier 2 fast path for CAStack with k_axis > 0, covering two
+       structurally-equivalent cases:
+
+         M.1  ax > k_axis              parent INNER all post-K in output
+         M.2a ax < k_axis = ax + 1     parent INNER all post-K in output
+                                       (K directly after reduce axis)
+
+       In both cases parent INNER axes remain contig at the output
+       tail (j-stride 1 preserved -> SIMD tile write maintained),
+       parent PRE axes form a scattered OUTER (per-OUTER output base
+       computed via output stride table + carry-increment multi-index).
+       The k_axis == 0 branch above stays as the tightest fast path
+       (PRE contig in output, no scatter).
+
+       Out of this branch: M.2b (ax < k_axis - 1) where parent INNER
+       is split by K in output (= INNER tile write becomes scatter,
+       SIMD-impacting).  Falls through to the generic init_l2
+       SLAB_AXES path. */
+    if ( naxes == 1
+         && slab_axes[0] >= 1
+         && slab_axes[0] != (int8_t)(ca->ndim - 1)
+         && ! ca_has_mask(ca)
+         && ca_func[ca->obj_type].attach == ca_stack_func.attach
+         && ((CAStack *) ca)->k_axis > 0
+         && ( slab_axes[0] > ((CAStack *) ca)->k_axis
+              || slab_axes[0] + 1 == ((CAStack *) ca)->k_axis )
+         && ca_fast_path(CA_SC_STACK_LOOP_INTERCHANGE) ) {
+      CAStack  *__li_st    = (CAStack *) ca;
+      int8_t    __li_ax    = slab_axes[0];
+      int8_t    __li_kax   = (int8_t) __li_st->k_axis;
+      CArray   *__li_p0    = __li_st->parents[0];        /* shape representative */
+      int8_t    __li_pa    = (__li_ax < __li_kax) ? __li_ax : (int8_t)(__li_ax - 1);
+      int8_t    __li_kax_out = (__li_ax < __li_kax) ? (int8_t)(__li_kax - 1) : __li_kax;
+      ca_size_t __li_M     = __li_p0->dim[__li_pa];      /* = ca->dim[__li_ax] for ax != kax */
+      ca_size_t __li_INNER = 1;
+      for ( int8_t __k = (int8_t)(__li_pa + 1); __k < __li_p0->ndim; __k++ ) __li_INNER *= __li_p0->dim[__k];
+      ca_size_t __li_OUTER = 1;
+      for ( int8_t __k = 0; __k < __li_pa; __k++ ) __li_OUTER *= __li_p0->dim[__k];
+
+      /* Bail to the generic path if any parent carries a mask. */
+      int __li_ok = 1;
+      for ( int32_t __kk = 0; __kk < __li_st->n_parents; __kk++ ) {
+        if ( ca_has_mask(__li_st->parents[__kk]) ) { __li_ok = 0; break; }
+      }
+
+      if ( __li_ok && __li_INNER >= 64 && __li_M * __li_INNER >= 1024 ) {
+        VALUE   vout = rb_ca_new_reduced(self, slab_axes, naxes, CA_BOOLEAN, keep_axis);
+        CArray *co;
+        GetCArray(vout, co);
+        boolean8_t *op = (boolean8_t *) co->ptr;
+
+        /* Output row-major stride table (length = ca->ndim - 1).
+           Output position vo maps to view position vv = (vo < ax) ? vo : vo + 1. */
+        ca_size_t __li_out_stride[CA_RANK_MAX];
+        {
+          ca_size_t __li_s = 1;
+          for ( int8_t __vo = (int8_t)(ca->ndim - 2); __vo >= 0; __vo-- ) {
+            int8_t __vv = (__vo < __li_ax) ? __vo : (int8_t)(__vo + 1);
+            __li_out_stride[__vo] = __li_s;
+            __li_s *= ca->dim[__vv];
+          }
+        }
+        ca_size_t __li_k_stride = __li_out_stride[__li_kax_out];
+
+        /* Per-parent-PRE output strides + dims.  PRE view position
+           vp = (pd < kax) ? pd : pd + 1.  PRE output position
+           vo = (vp < ax) ? vp : vp - 1.  For M.1 (ax > kax) all PRE
+           view pos < ax so vo = vp.  For M.2a (ax < kax = ax+1) all
+           PRE pd < ax < kax so vp = pd and vo = pd. */
+        ca_size_t __li_pre_out_stride[CA_RANK_MAX];
+        ca_size_t __li_pre_dim[CA_RANK_MAX];
+        for ( int8_t __pd = 0; __pd < __li_pa; __pd++ ) {
+          int8_t __vp = (__pd < __li_kax) ? __pd : (int8_t)(__pd + 1);
+          int8_t __vo = (__vp < __li_ax) ? __vp : (int8_t)(__vp - 1);
+          __li_pre_out_stride[__pd] = __li_out_stride[__vo];
+          __li_pre_dim[__pd] = __li_p0->dim[__pd];
+        }
+
+          boolean8_t  __li_buf_acc[512];
+
+        ca_size_t __li_plane_elems = __li_M * __li_INNER;
+        const ca_size_t __li_TILE = 512;
+        for ( int32_t __kk = 0; __kk < __li_st->n_parents; __kk++ ) {
+          ca_attach(__li_st->parents[__kk]);   /* window: a parent may run Ruby to fill itself (a CAObject's copy_data); a raising attach holds nothing and the earlier parents are already detached, and the numeric loop after it does not raise */
+          const boolean8_t *p_root = (const boolean8_t *) __li_st->parents[__kk]->ptr;
+          ca_size_t __li_k_base = (ca_size_t) __kk * __li_k_stride;
+
+          ca_size_t __li_idx[CA_RANK_MAX];
+          for ( int8_t __pd = 0; __pd < __li_pa; __pd++ ) __li_idx[__pd] = 0;
+
+          for ( ca_size_t __li_o = 0; __li_o < __li_OUTER; __li_o++ ) {
+            ca_size_t __li_obase = __li_k_base;
+            for ( int8_t __pd = 0; __pd < __li_pa; __pd++ ) {
+              __li_obase += __li_idx[__pd] * __li_pre_out_stride[__pd];
+            }
+            boolean8_t *__li_op_k = op + __li_obase;
+            const boolean8_t *__li_plane = p_root + __li_o * __li_plane_elems;
+            /* Inline single-OUTER core: j-stride 1 in __li_op_k preserved. */
+            for ( ca_size_t __li_tile = 0; __li_tile < __li_INNER; __li_tile += __li_TILE ) {
+              ca_size_t __li_tile_len = (__li_INNER - __li_tile < __li_TILE)
+                                        ? (__li_INNER - __li_tile) : __li_TILE;
+                  for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                __li_buf_acc[__j] = (boolean8_t) (1);
+              }
+              for ( ca_size_t __li_i = 0; __li_i < __li_M; __li_i++ ) {
+                const boolean8_t *__li_row = __li_plane + __li_i * __li_INNER + __li_tile;
+                _Pragma("omp simd")
+                for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                  boolean8_t v = __li_row[__j];
+                  __li_buf_acc[__j] &= v;
+                  (void) v;
+                }
+              }
+    
+              for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                __li_op_k[__li_tile + __j] = (boolean8_t) (__li_buf_acc[__j]);
+              }
+            }
+            /* Carry-increment OUTER multi-index (row-major over parent PRE dims). */
+            for ( int8_t __pd = (int8_t)(__li_pa - 1); __pd >= 0; __pd-- ) {
+              if ( ++__li_idx[__pd] < __li_pre_dim[__pd] ) break;
+              __li_idx[__pd] = 0;
+            }
+          }
+          ca_detach(__li_st->parents[__kk]);
+        }
+
+        return vout;
+      }
+    }
+
+    /* M.2.0b (PROPOSAL_MKKERNEL_TIER2_K_AXIS_GEN, 2026-06-20):
+       Case M.2b (ax < k_axis - 1): parent INNER axes are split by K
+       in the output.  Strategy C (effective OUTER expansion): treat
+       INNER_pre_K dims (parent dims [pa+1..k_axis-1]) as part of an
+       extended effective OUTER, and use effective INNER = parent dims
+       [k_axis..pndim-1] (= INNER_post_K, contig at output tail).
+
+       L.7 core variant: M-step stride in parent = full parent INNER
+       total (= Π pdim[pa+1..pndim-1]), separate from the tile loop
+       bound (= eff_INNER).  Inner read stride 1 in parent + output
+       write stride 1 (= contig output tail) both preserved -> SIMD
+       tile reduce + write maintained.
+
+       Performance characteristic (deliver-via-view -- the surface
+       prioritises delivering the cells over avoiding a copy): bench (b2 pattern, M=200, K=5, eff_INNER
+       =360, INNER_pre_K=16) yields 3674 us vs eager-entity 1545 us
+       = 2.38x slow.  Root cause is the multi-parent data layout
+       (= 5 separate 9 MB regions instead of one contig 46 MB),
+       which costs DRAM/TLB/prefetcher efficiency irrespective of
+       strategy.  Strategy A (temp buf + scatter, explored rev1
+       sparring round 1) was implemented and benched at 3783 us
+       = within noise of Strategy C, confirming the bottleneck is
+       structural, NOT cache-stride from this branch.  Strategy C
+       is shipped here (= simpler emit, no malloc) per round 2
+       sparring decision; the 3.94x win vs generic fallback
+       (.copy.sum at 14872 us) justifies landing despite missing
+       eager-entity parity.  Strategy A retained in PROPOSAL as
+       future-optimization substrate (= multi-level tile-M + tile-
+       INNER could reclaim DRAM efficiency if revisited).
+
+       Threshold eff_INNER >= 32 auto-bypasses at = -1 (k_axis =
+       pndim -> eff_INNER = 1, fast path skipped, generic path
+       handles correctness). */
+    if ( naxes == 1
+         && slab_axes[0] >= 1
+         && slab_axes[0] != (int8_t)(ca->ndim - 1)
+         && ! ca_has_mask(ca)
+         && ca_func[ca->obj_type].attach == ca_stack_func.attach
+         && ((CAStack *) ca)->k_axis > 0
+         && slab_axes[0] + 1 < ((CAStack *) ca)->k_axis
+         && ca_fast_path(CA_SC_STACK_LOOP_INTERCHANGE) ) {
+      CAStack  *__li_st    = (CAStack *) ca;
+      int8_t    __li_ax    = slab_axes[0];
+      int8_t    __li_kax   = (int8_t) __li_st->k_axis;
+      CArray   *__li_p0    = __li_st->parents[0];
+      int8_t    __li_pndim = __li_p0->ndim;
+      int8_t    __li_pa    = __li_ax;                          /* M.2b: ax < kax -> pa = ax */
+      int8_t    __li_kax_out = (int8_t)(__li_kax - 1);
+
+      ca_size_t __li_M = __li_p0->dim[__li_pa];
+      ca_size_t __li_eff_INNER = 1;                            /* Π pdim[kax..pndim-1] = INNER_post_K */
+      for ( int8_t __k = __li_kax; __k < __li_pndim; __k++ ) __li_eff_INNER *= __li_p0->dim[__k];
+      ca_size_t __li_M_stride = 1;                             /* Π pdim[pa+1..pndim-1] = full parent INNER */
+      for ( int8_t __k = (int8_t)(__li_pa + 1); __k < __li_pndim; __k++ ) __li_M_stride *= __li_p0->dim[__k];
+
+      /* Bail to the generic path if any parent carries a mask. */
+      int __li_ok = 1;
+      for ( int32_t __kk = 0; __kk < __li_st->n_parents; __kk++ ) {
+        if ( ca_has_mask(__li_st->parents[__kk]) ) { __li_ok = 0; break; }
+      }
+
+      if ( __li_ok && __li_eff_INNER >= 32 && __li_M * __li_eff_INNER >= 1024 ) {
+        VALUE   vout = rb_ca_new_reduced(self, slab_axes, naxes, CA_BOOLEAN, keep_axis);
+        CArray *co;
+        GetCArray(vout, co);
+        boolean8_t *op = (boolean8_t *) co->ptr;
+
+        /* Output row-major stride table (length = ca->ndim - 1). */
+        ca_size_t __li_out_stride[CA_RANK_MAX];
+        {
+          ca_size_t __li_s = 1;
+          for ( int8_t __vo = (int8_t)(ca->ndim - 2); __vo >= 0; __vo-- ) {
+            int8_t __vv = (__vo < __li_ax) ? __vo : (int8_t)(__vo + 1);
+            __li_out_stride[__vo] = __li_s;
+            __li_s *= ca->dim[__vv];
+          }
+        }
+        ca_size_t __li_k_stride = __li_out_stride[__li_kax_out];
+
+        /* Parent stride table (row-major). */
+        ca_size_t __li_pstride[CA_RANK_MAX];
+        {
+          ca_size_t __li_pss = 1;
+          for ( int8_t __k = (int8_t)(__li_pndim - 1); __k >= 0; __k-- ) {
+            __li_pstride[__k] = __li_pss;
+            __li_pss *= __li_p0->dim[__k];
+          }
+        }
+
+        /* Effective OUTER dim list: parent dims [0..kax-1] excluding pa.
+           PRE = [0..pa-1] + INNER_pre_K = [pa+1..kax-1].  For each, store
+           parent dim, parent stride, output stride. */
+        int8_t    __li_eo_n = 0;
+        ca_size_t __li_eo_dim[CA_RANK_MAX];
+        ca_size_t __li_eo_pstride[CA_RANK_MAX];
+        ca_size_t __li_eo_ostride[CA_RANK_MAX];
+        for ( int8_t __d = 0; __d < __li_kax; __d++ ) {
+          if ( __d == __li_pa ) continue;
+          int8_t __vp = __d;                       /* M.2b: all eff OUTER d < kax -> vp = d */
+          int8_t __vo = (__vp < __li_ax) ? __vp : (int8_t)(__vp - 1);
+          __li_eo_dim[__li_eo_n]     = __li_p0->dim[__d];
+          __li_eo_pstride[__li_eo_n] = __li_pstride[__d];
+          __li_eo_ostride[__li_eo_n] = __li_out_stride[__vo];
+          __li_eo_n++;
+        }
+        ca_size_t __li_OUTER = 1;
+        for ( int8_t __k = 0; __k < __li_eo_n; __k++ ) __li_OUTER *= __li_eo_dim[__k];
+
+          boolean8_t  __li_buf_acc[512];
+
+        const ca_size_t __li_TILE = 512;
+        for ( int32_t __kk = 0; __kk < __li_st->n_parents; __kk++ ) {
+          ca_attach(__li_st->parents[__kk]);   /* window: a parent may run Ruby to fill itself (a CAObject's copy_data); a raising attach holds nothing and the earlier parents are already detached, and the numeric loop after it does not raise */
+          const boolean8_t *p_root = (const boolean8_t *) __li_st->parents[__kk]->ptr;
+          ca_size_t __li_k_base = (ca_size_t) __kk * __li_k_stride;
+
+          ca_size_t __li_idx[CA_RANK_MAX];
+          for ( int8_t __i = 0; __i < __li_eo_n; __i++ ) __li_idx[__i] = 0;
+
+          for ( ca_size_t __li_o = 0; __li_o < __li_OUTER; __li_o++ ) {
+            ca_size_t __li_pbase = 0;
+            ca_size_t __li_obase = __li_k_base;
+            for ( int8_t __i = 0; __i < __li_eo_n; __i++ ) {
+              __li_pbase += __li_idx[__i] * __li_eo_pstride[__i];
+              __li_obase += __li_idx[__i] * __li_eo_ostride[__i];
+            }
+            boolean8_t *__li_op_k = op + __li_obase;
+            const boolean8_t *__li_plane = p_root + __li_pbase;
+            /* L.7 core variant: M-step uses __li_M_stride, tile loop uses __li_eff_INNER. */
+            for ( ca_size_t __li_tile = 0; __li_tile < __li_eff_INNER; __li_tile += __li_TILE ) {
+              ca_size_t __li_tile_len = (__li_eff_INNER - __li_tile < __li_TILE)
+                                        ? (__li_eff_INNER - __li_tile) : __li_TILE;
+                  for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                __li_buf_acc[__j] = (boolean8_t) (1);
+              }
+              for ( ca_size_t __li_i = 0; __li_i < __li_M; __li_i++ ) {
+                const boolean8_t *__li_row = __li_plane + __li_i * __li_M_stride + __li_tile;
+                _Pragma("omp simd")
+                for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                  boolean8_t v = __li_row[__j];
+                  __li_buf_acc[__j] &= v;
+                  (void) v;
+                }
+              }
+    
+              for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                __li_op_k[__li_tile + __j] = (boolean8_t) (__li_buf_acc[__j]);
+              }
+            }
+            /* Carry-increment effective OUTER multi-index. */
+            for ( int8_t __i = (int8_t)(__li_eo_n - 1); __i >= 0; __i-- ) {
+              if ( ++__li_idx[__i] < __li_eo_dim[__i] ) break;
+              __li_idx[__i] = 0;
+            }
+          }
+          ca_detach(__li_st->parents[__kk]);
+        }
+
+        return vout;
+      }
+    }
+    if ( naxes == 1
+         && ca->ndim >= 2
+         && slab_axes[0] == (int8_t)(ca->ndim - 1)
+         && ca->dim[ca->ndim - 1] >= 1
+         && ca->dim[ca->ndim - 1] <= 16
+         && ! ca_has_mask(ca)
+         && ca_attach_is_alias(ca)
+         && ca_fast_path(CA_SC_SHORT_FIBER_REDUCE) ) {
+      ca_size_t __sf_M     = ca->dim[ca->ndim - 1];
+      ca_size_t __sf_OUTER = ca->elements / __sf_M;
+      VALUE   vout = rb_ca_new_reduced(self, slab_axes, naxes, CA_BOOLEAN, keep_axis);
+      CArray *co;
+      GetCArray(vout, co);
+      boolean8_t *op = (boolean8_t *) co->ptr;
+      ca_attach(ca);   /* window: numeric lanes only, nothing raises inside; O(1) alias attach */
+      const boolean8_t *p_root = (const boolean8_t *) ca->ptr;
+      for ( ca_size_t __sf_o = 0; __sf_o < __sf_OUTER; __sf_o++ ) {
+        const boolean8_t *__sf_row = p_root + __sf_o * __sf_M;
+        boolean8_t acc = (boolean8_t) (1);
+        for ( ca_size_t __j = 0; __j < __sf_M; __j++ ) {
+          boolean8_t v = __sf_row[__j];
+          acc &= v;
+          (void) v;
+        }
+
+        op[__sf_o] = (boolean8_t) (acc);
+      }
+      ca_detach(ca);
+      return vout;
+    }
 VALUE   vout  = rb_ca_new_reduced(self, slab_axes, naxes, CA_BOOLEAN, keep_axis);
 CArray *co;
 GetCArray(vout, co);
 boolean8_t *op = (boolean8_t *) co->ptr;
-ca_iter_state st;
 int rc = ca_iter_state_init_l2(&st, ca, CA_SLAB_AXES,
                                slab_axes, naxes, 0);
 if ( rc != CA_ITER_OK ) {
@@ -122,13 +614,27 @@ boolean8_t *m;
 ca_size_t   out_i = 0;
       while ( ca_iter_state_next_slab_axes(&st, &p, &m) ) {
       boolean8_t acc;
-      CA_SLAB_REDUCE_T(boolean8_t, st, p, m, acc, 1, acc &= v);
+      CA_SLAB_REDUCE_T_SETTLE(boolean8_t, st, p, m, acc, 1, acc &= v, !acc);
       op[out_i++] = (boolean8_t) (acc);
       }
       ca_iter_state_finish(&st);
       if ( naxes == ca->ndim && !keep_axis ) return BOOL2VAL(op[0]);
       return vout;
-    }
+#undef st
+}
+
+static VALUE
+all_ki_native_bool (VALUE self, CArray *ca, int8_t *slab_axes, int8_t naxes, int keep_axis)
+{
+  all_ki_native_bool_frame fr;
+  fr.self = self;
+  fr.ca = ca;
+  fr.slab_axes = slab_axes;
+  fr.naxes = naxes;
+  fr.keep_axis = keep_axis;
+  return ca_iter_ensure(1, fr.states, all_ki_native_bool_body, (VALUE) &fr);
+}
+
 
 VALUE
 rb_ca_all_ki (int argc, VALUE *argv, VALUE self)
@@ -210,24 +716,516 @@ any_ki_stream_bool (VALUE arg)
       return BOOL2VAL((boolean8_t) (acc));
 }
 
+/* The walks can raise part way (a Ruby call per cell in the object
+   lane, an allocation in any lane).  Their states live in the caller's
+   frame, and ca_iter_ensure finishes them however the body leaves. */
+typedef struct {
+  ca_iter_state states[1];
+  VALUE self;
+  CArray *ca;
+  int8_t *slab_axes;
+  int8_t naxes;
+  int keep_axis;
+} any_ki_native_bool_frame;
+
 static VALUE
-any_ki_native_bool (VALUE self, CArray *ca, int8_t *slab_axes, int8_t naxes, int keep_axis)
+any_ki_native_bool_body (VALUE arg)
 {
+  any_ki_native_bool_frame *fr = (any_ki_native_bool_frame *) arg;
+  VALUE self = fr->self;
+  (void) self;
+  CArray *ca = fr->ca;
+  (void) ca;
+  int8_t *slab_axes = fr->slab_axes;
+  (void) slab_axes;
+  int8_t naxes = fr->naxes;
+  (void) naxes;
+  int keep_axis = fr->keep_axis;
+  (void) keep_axis;
+#define st (fr->states[0])
     if ( naxes == ca->ndim && ca->ndim >= 1 && !keep_axis &&
          ca->elements > 0 &&
          ca_is_lazy_view(ca) && ! ca_has_mask(ca) &&
-         ca_fast_paths_enabled() ) {
+         ca_fast_path(CA_SC_LAZY_STREAMING_REDUCE) ) {
       any_ki_stream_bool_t __ctx;
       __ctx.chunk = NULL;
       __ctx.ca    = ca;
       return ca_lazy_arena_protect(any_ki_stream_bool, ca_lazy_arena_release_held,
                                    (VALUE) &__ctx);
     }
+    /* L.1 / L.7: loop-interchange fast path with inner-tiling
+       (PROPOSAL_REDUCTION_LOOP_INTERCHANGE).
+       MEMO_REDUCTION_FASTPATH_ENTITY_ONLY_GUARD Tier 1: extend from
+       entity-only to any contig row-major buffer.  ca_attach_is_alias
+       is true for CA_OBJ_ARRAY and for CAStride-family views whose
+       composed strides are row-major contiguous (CARefer reshape,
+       contig CABlock, CAFarray, alias CAStride, ...); ca_attach then
+       exposes ca->ptr as that buffer at O(1) cost (no materialise). */
+    if ( naxes == 1
+         && slab_axes[0] != (int8_t)(ca->ndim - 1)
+         && ! ca_has_mask(ca)
+         && ca_attach_is_alias(ca)
+         && ca_fast_path(CA_SC_LOOP_INTERCHANGE) ) {
+      int8_t    __li_ax    = slab_axes[0];
+      ca_size_t __li_M     = ca->dim[__li_ax];
+      ca_size_t __li_INNER = 1;
+      for ( int8_t __k = (int8_t)(__li_ax + 1); __k < ca->ndim; __k++ ) __li_INNER *= ca->dim[__k];
+      ca_size_t __li_OUTER = 1;
+      for ( int8_t __k = 0; __k < __li_ax; __k++ ) __li_OUTER *= ca->dim[__k];
+
+      /* Threshold gate: skip when too small to amortise alloc + 2-pass overhead. */
+      if ( __li_INNER >= 64 && __li_M * __li_INNER >= 1024 ) {
+        VALUE   vout = rb_ca_new_reduced(self, slab_axes, naxes, CA_BOOLEAN, keep_axis);
+        CArray *co;
+        GetCArray(vout, co);
+        boolean8_t *op = (boolean8_t *) co->ptr;
+        ca_attach(ca);   /* window: numeric lanes only, nothing raises inside; O(1) alias attach */
+        const boolean8_t *p_root = (const boolean8_t *) ca->ptr;
+
+        /* Per-buffer stack accumulators (one per :plus state, sized
+           to L7 TILE = 512 cells regardless of INNER). */
+          boolean8_t  __li_buf_acc[512];
+
+        ca_size_t __li_plane_elems = __li_M * __li_INNER;
+        const ca_size_t __li_TILE = 512;
+        for ( ca_size_t __li_o = 0; __li_o < __li_OUTER; __li_o++ ) {
+          const boolean8_t *__li_plane = p_root + __li_o * __li_plane_elems;
+          for ( ca_size_t __li_tile = 0; __li_tile < __li_INNER; __li_tile += __li_TILE ) {
+            ca_size_t __li_tile_len = (__li_INNER - __li_tile < __li_TILE)
+                                      ? (__li_INNER - __li_tile) : __li_TILE;
+              for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                __li_buf_acc[__j] = (boolean8_t) (0);
+              }
+            for ( ca_size_t __li_i = 0; __li_i < __li_M; __li_i++ ) {
+              const boolean8_t *__li_row = __li_plane + __li_i * __li_INNER + __li_tile;
+              _Pragma("omp simd")
+              for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                boolean8_t v = __li_row[__j];
+                __li_buf_acc[__j] |= v;
+                (void) v;
+              }
+            }
+
+            for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+              op[__li_o * __li_INNER + __li_tile + __j] = (boolean8_t) (__li_buf_acc[__j]);
+            }
+          }
+        }
+        ca_detach(ca);
+
+        if ( naxes == ca->ndim && !keep_axis ) return BOOL2VAL(op[0]);   /* unreachable: ax != innermost && naxes == 1 < ndim */
+        return vout;
+      }
+    }
+
+    /* MEMO_REDUCTION_FASTPATH_ENTITY_ONLY_GUARD Tier 2: CAStack source.
+       view.reduce(axis: ax>=1) is exactly K independent per-parent
+       reduces over (ax - 1) of each contiguous parent; output row k
+       = parent k's reduced plane.  Run the L.7 core per parent (each
+       attach is O(1) for entity parents), no whole-view materialise.
+
+       K.3 (PROPOSAL_CASTACK_K_AXIS, 2026-06-20): gated to k_axis == 0
+       because the per-parent output layout in dst assumes K is the
+       outermost output axis (= each parent contributes a contiguous
+       block of parent_OUTER * parent_INNER cells).  For k_axis != 0
+       the parents' outputs are interleaved in dst -- generalising
+       the output stride is doable but out of K.3 scope.  The
+       dispatch falls through to ca_iter_state_init_l2 SLAB_AXES
+       which engages the K.3-generalised tile cache. */
+    if ( naxes == 1
+         && slab_axes[0] >= 1
+         && slab_axes[0] != (int8_t)(ca->ndim - 1)
+         && ! ca_has_mask(ca)
+         && ca_func[ca->obj_type].attach == ca_stack_func.attach
+         && ((CAStack *) ca)->k_axis == 0
+         && ca_fast_path(CA_SC_STACK_LOOP_INTERCHANGE) ) {
+      CAStack  *__li_st    = (CAStack *) ca;
+      int8_t    __li_ax    = slab_axes[0];
+      ca_size_t __li_M     = ca->dim[__li_ax];
+      ca_size_t __li_INNER = 1;
+      for ( int8_t __k = (int8_t)(__li_ax + 1); __k < ca->ndim; __k++ ) __li_INNER *= ca->dim[__k];
+      ca_size_t __li_OUTER = 1;   /* parent outer = dims 1..ax-1 (excludes K = axis 0) */
+      for ( int8_t __k = 1; __k < __li_ax; __k++ ) __li_OUTER *= ca->dim[__k];
+
+      /* Bail to the generic path if any parent carries a mask (the
+         core reads parent->ptr without mask awareness). */
+      int __li_ok = 1;
+      for ( int32_t __kk = 0; __kk < __li_st->n_parents; __kk++ ) {
+        if ( ca_has_mask(__li_st->parents[__kk]) ) { __li_ok = 0; break; }
+      }
+
+      if ( __li_ok && __li_INNER >= 64 && __li_M * __li_INNER >= 1024 ) {
+        VALUE   vout = rb_ca_new_reduced(self, slab_axes, naxes, CA_BOOLEAN, keep_axis);
+        CArray *co;
+        GetCArray(vout, co);
+        boolean8_t *op = (boolean8_t *) co->ptr;
+
+          boolean8_t  __li_buf_acc[512];
+
+        ca_size_t __li_plane_elems = __li_M * __li_INNER;
+        ca_size_t __li_parent_out  = __li_OUTER * __li_INNER;
+        const ca_size_t __li_TILE = 512;
+        for ( int32_t __kk = 0; __kk < __li_st->n_parents; __kk++ ) {
+          ca_attach(__li_st->parents[__kk]);   /* window: a parent may run Ruby to fill itself (a CAObject's copy_data); a raising attach holds nothing and the earlier parents are already detached, and the numeric loop after it does not raise */
+          const boolean8_t *p_root = (const boolean8_t *) __li_st->parents[__kk]->ptr;
+          boolean8_t *__li_op_k = op + (ca_size_t) __kk * __li_parent_out;
+        for ( ca_size_t __li_o = 0; __li_o < __li_OUTER; __li_o++ ) {
+          const boolean8_t *__li_plane = p_root + __li_o * __li_plane_elems;
+          for ( ca_size_t __li_tile = 0; __li_tile < __li_INNER; __li_tile += __li_TILE ) {
+            ca_size_t __li_tile_len = (__li_INNER - __li_tile < __li_TILE)
+                                      ? (__li_INNER - __li_tile) : __li_TILE;
+              for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                __li_buf_acc[__j] = (boolean8_t) (0);
+              }
+            for ( ca_size_t __li_i = 0; __li_i < __li_M; __li_i++ ) {
+              const boolean8_t *__li_row = __li_plane + __li_i * __li_INNER + __li_tile;
+              _Pragma("omp simd")
+              for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                boolean8_t v = __li_row[__j];
+                __li_buf_acc[__j] |= v;
+                (void) v;
+              }
+            }
+
+            for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+              __li_op_k[__li_o * __li_INNER + __li_tile + __j] = (boolean8_t) (__li_buf_acc[__j]);
+            }
+          }
+        }
+          ca_detach(__li_st->parents[__kk]);
+        }
+
+        return vout;
+      }
+    }
+
+    /* M.1.0 + M.2.0a (PROPOSAL_MKKERNEL_TIER2_K_AXIS_GEN, 2026-06-20):
+       Tier 2 fast path for CAStack with k_axis > 0, covering two
+       structurally-equivalent cases:
+
+         M.1  ax > k_axis              parent INNER all post-K in output
+         M.2a ax < k_axis = ax + 1     parent INNER all post-K in output
+                                       (K directly after reduce axis)
+
+       In both cases parent INNER axes remain contig at the output
+       tail (j-stride 1 preserved -> SIMD tile write maintained),
+       parent PRE axes form a scattered OUTER (per-OUTER output base
+       computed via output stride table + carry-increment multi-index).
+       The k_axis == 0 branch above stays as the tightest fast path
+       (PRE contig in output, no scatter).
+
+       Out of this branch: M.2b (ax < k_axis - 1) where parent INNER
+       is split by K in output (= INNER tile write becomes scatter,
+       SIMD-impacting).  Falls through to the generic init_l2
+       SLAB_AXES path. */
+    if ( naxes == 1
+         && slab_axes[0] >= 1
+         && slab_axes[0] != (int8_t)(ca->ndim - 1)
+         && ! ca_has_mask(ca)
+         && ca_func[ca->obj_type].attach == ca_stack_func.attach
+         && ((CAStack *) ca)->k_axis > 0
+         && ( slab_axes[0] > ((CAStack *) ca)->k_axis
+              || slab_axes[0] + 1 == ((CAStack *) ca)->k_axis )
+         && ca_fast_path(CA_SC_STACK_LOOP_INTERCHANGE) ) {
+      CAStack  *__li_st    = (CAStack *) ca;
+      int8_t    __li_ax    = slab_axes[0];
+      int8_t    __li_kax   = (int8_t) __li_st->k_axis;
+      CArray   *__li_p0    = __li_st->parents[0];        /* shape representative */
+      int8_t    __li_pa    = (__li_ax < __li_kax) ? __li_ax : (int8_t)(__li_ax - 1);
+      int8_t    __li_kax_out = (__li_ax < __li_kax) ? (int8_t)(__li_kax - 1) : __li_kax;
+      ca_size_t __li_M     = __li_p0->dim[__li_pa];      /* = ca->dim[__li_ax] for ax != kax */
+      ca_size_t __li_INNER = 1;
+      for ( int8_t __k = (int8_t)(__li_pa + 1); __k < __li_p0->ndim; __k++ ) __li_INNER *= __li_p0->dim[__k];
+      ca_size_t __li_OUTER = 1;
+      for ( int8_t __k = 0; __k < __li_pa; __k++ ) __li_OUTER *= __li_p0->dim[__k];
+
+      /* Bail to the generic path if any parent carries a mask. */
+      int __li_ok = 1;
+      for ( int32_t __kk = 0; __kk < __li_st->n_parents; __kk++ ) {
+        if ( ca_has_mask(__li_st->parents[__kk]) ) { __li_ok = 0; break; }
+      }
+
+      if ( __li_ok && __li_INNER >= 64 && __li_M * __li_INNER >= 1024 ) {
+        VALUE   vout = rb_ca_new_reduced(self, slab_axes, naxes, CA_BOOLEAN, keep_axis);
+        CArray *co;
+        GetCArray(vout, co);
+        boolean8_t *op = (boolean8_t *) co->ptr;
+
+        /* Output row-major stride table (length = ca->ndim - 1).
+           Output position vo maps to view position vv = (vo < ax) ? vo : vo + 1. */
+        ca_size_t __li_out_stride[CA_RANK_MAX];
+        {
+          ca_size_t __li_s = 1;
+          for ( int8_t __vo = (int8_t)(ca->ndim - 2); __vo >= 0; __vo-- ) {
+            int8_t __vv = (__vo < __li_ax) ? __vo : (int8_t)(__vo + 1);
+            __li_out_stride[__vo] = __li_s;
+            __li_s *= ca->dim[__vv];
+          }
+        }
+        ca_size_t __li_k_stride = __li_out_stride[__li_kax_out];
+
+        /* Per-parent-PRE output strides + dims.  PRE view position
+           vp = (pd < kax) ? pd : pd + 1.  PRE output position
+           vo = (vp < ax) ? vp : vp - 1.  For M.1 (ax > kax) all PRE
+           view pos < ax so vo = vp.  For M.2a (ax < kax = ax+1) all
+           PRE pd < ax < kax so vp = pd and vo = pd. */
+        ca_size_t __li_pre_out_stride[CA_RANK_MAX];
+        ca_size_t __li_pre_dim[CA_RANK_MAX];
+        for ( int8_t __pd = 0; __pd < __li_pa; __pd++ ) {
+          int8_t __vp = (__pd < __li_kax) ? __pd : (int8_t)(__pd + 1);
+          int8_t __vo = (__vp < __li_ax) ? __vp : (int8_t)(__vp - 1);
+          __li_pre_out_stride[__pd] = __li_out_stride[__vo];
+          __li_pre_dim[__pd] = __li_p0->dim[__pd];
+        }
+
+          boolean8_t  __li_buf_acc[512];
+
+        ca_size_t __li_plane_elems = __li_M * __li_INNER;
+        const ca_size_t __li_TILE = 512;
+        for ( int32_t __kk = 0; __kk < __li_st->n_parents; __kk++ ) {
+          ca_attach(__li_st->parents[__kk]);   /* window: a parent may run Ruby to fill itself (a CAObject's copy_data); a raising attach holds nothing and the earlier parents are already detached, and the numeric loop after it does not raise */
+          const boolean8_t *p_root = (const boolean8_t *) __li_st->parents[__kk]->ptr;
+          ca_size_t __li_k_base = (ca_size_t) __kk * __li_k_stride;
+
+          ca_size_t __li_idx[CA_RANK_MAX];
+          for ( int8_t __pd = 0; __pd < __li_pa; __pd++ ) __li_idx[__pd] = 0;
+
+          for ( ca_size_t __li_o = 0; __li_o < __li_OUTER; __li_o++ ) {
+            ca_size_t __li_obase = __li_k_base;
+            for ( int8_t __pd = 0; __pd < __li_pa; __pd++ ) {
+              __li_obase += __li_idx[__pd] * __li_pre_out_stride[__pd];
+            }
+            boolean8_t *__li_op_k = op + __li_obase;
+            const boolean8_t *__li_plane = p_root + __li_o * __li_plane_elems;
+            /* Inline single-OUTER core: j-stride 1 in __li_op_k preserved. */
+            for ( ca_size_t __li_tile = 0; __li_tile < __li_INNER; __li_tile += __li_TILE ) {
+              ca_size_t __li_tile_len = (__li_INNER - __li_tile < __li_TILE)
+                                        ? (__li_INNER - __li_tile) : __li_TILE;
+                  for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                __li_buf_acc[__j] = (boolean8_t) (0);
+              }
+              for ( ca_size_t __li_i = 0; __li_i < __li_M; __li_i++ ) {
+                const boolean8_t *__li_row = __li_plane + __li_i * __li_INNER + __li_tile;
+                _Pragma("omp simd")
+                for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                  boolean8_t v = __li_row[__j];
+                  __li_buf_acc[__j] |= v;
+                  (void) v;
+                }
+              }
+    
+              for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                __li_op_k[__li_tile + __j] = (boolean8_t) (__li_buf_acc[__j]);
+              }
+            }
+            /* Carry-increment OUTER multi-index (row-major over parent PRE dims). */
+            for ( int8_t __pd = (int8_t)(__li_pa - 1); __pd >= 0; __pd-- ) {
+              if ( ++__li_idx[__pd] < __li_pre_dim[__pd] ) break;
+              __li_idx[__pd] = 0;
+            }
+          }
+          ca_detach(__li_st->parents[__kk]);
+        }
+
+        return vout;
+      }
+    }
+
+    /* M.2.0b (PROPOSAL_MKKERNEL_TIER2_K_AXIS_GEN, 2026-06-20):
+       Case M.2b (ax < k_axis - 1): parent INNER axes are split by K
+       in the output.  Strategy C (effective OUTER expansion): treat
+       INNER_pre_K dims (parent dims [pa+1..k_axis-1]) as part of an
+       extended effective OUTER, and use effective INNER = parent dims
+       [k_axis..pndim-1] (= INNER_post_K, contig at output tail).
+
+       L.7 core variant: M-step stride in parent = full parent INNER
+       total (= Π pdim[pa+1..pndim-1]), separate from the tile loop
+       bound (= eff_INNER).  Inner read stride 1 in parent + output
+       write stride 1 (= contig output tail) both preserved -> SIMD
+       tile reduce + write maintained.
+
+       Performance characteristic (deliver-via-view -- the surface
+       prioritises delivering the cells over avoiding a copy): bench (b2 pattern, M=200, K=5, eff_INNER
+       =360, INNER_pre_K=16) yields 3674 us vs eager-entity 1545 us
+       = 2.38x slow.  Root cause is the multi-parent data layout
+       (= 5 separate 9 MB regions instead of one contig 46 MB),
+       which costs DRAM/TLB/prefetcher efficiency irrespective of
+       strategy.  Strategy A (temp buf + scatter, explored rev1
+       sparring round 1) was implemented and benched at 3783 us
+       = within noise of Strategy C, confirming the bottleneck is
+       structural, NOT cache-stride from this branch.  Strategy C
+       is shipped here (= simpler emit, no malloc) per round 2
+       sparring decision; the 3.94x win vs generic fallback
+       (.copy.sum at 14872 us) justifies landing despite missing
+       eager-entity parity.  Strategy A retained in PROPOSAL as
+       future-optimization substrate (= multi-level tile-M + tile-
+       INNER could reclaim DRAM efficiency if revisited).
+
+       Threshold eff_INNER >= 32 auto-bypasses at = -1 (k_axis =
+       pndim -> eff_INNER = 1, fast path skipped, generic path
+       handles correctness). */
+    if ( naxes == 1
+         && slab_axes[0] >= 1
+         && slab_axes[0] != (int8_t)(ca->ndim - 1)
+         && ! ca_has_mask(ca)
+         && ca_func[ca->obj_type].attach == ca_stack_func.attach
+         && ((CAStack *) ca)->k_axis > 0
+         && slab_axes[0] + 1 < ((CAStack *) ca)->k_axis
+         && ca_fast_path(CA_SC_STACK_LOOP_INTERCHANGE) ) {
+      CAStack  *__li_st    = (CAStack *) ca;
+      int8_t    __li_ax    = slab_axes[0];
+      int8_t    __li_kax   = (int8_t) __li_st->k_axis;
+      CArray   *__li_p0    = __li_st->parents[0];
+      int8_t    __li_pndim = __li_p0->ndim;
+      int8_t    __li_pa    = __li_ax;                          /* M.2b: ax < kax -> pa = ax */
+      int8_t    __li_kax_out = (int8_t)(__li_kax - 1);
+
+      ca_size_t __li_M = __li_p0->dim[__li_pa];
+      ca_size_t __li_eff_INNER = 1;                            /* Π pdim[kax..pndim-1] = INNER_post_K */
+      for ( int8_t __k = __li_kax; __k < __li_pndim; __k++ ) __li_eff_INNER *= __li_p0->dim[__k];
+      ca_size_t __li_M_stride = 1;                             /* Π pdim[pa+1..pndim-1] = full parent INNER */
+      for ( int8_t __k = (int8_t)(__li_pa + 1); __k < __li_pndim; __k++ ) __li_M_stride *= __li_p0->dim[__k];
+
+      /* Bail to the generic path if any parent carries a mask. */
+      int __li_ok = 1;
+      for ( int32_t __kk = 0; __kk < __li_st->n_parents; __kk++ ) {
+        if ( ca_has_mask(__li_st->parents[__kk]) ) { __li_ok = 0; break; }
+      }
+
+      if ( __li_ok && __li_eff_INNER >= 32 && __li_M * __li_eff_INNER >= 1024 ) {
+        VALUE   vout = rb_ca_new_reduced(self, slab_axes, naxes, CA_BOOLEAN, keep_axis);
+        CArray *co;
+        GetCArray(vout, co);
+        boolean8_t *op = (boolean8_t *) co->ptr;
+
+        /* Output row-major stride table (length = ca->ndim - 1). */
+        ca_size_t __li_out_stride[CA_RANK_MAX];
+        {
+          ca_size_t __li_s = 1;
+          for ( int8_t __vo = (int8_t)(ca->ndim - 2); __vo >= 0; __vo-- ) {
+            int8_t __vv = (__vo < __li_ax) ? __vo : (int8_t)(__vo + 1);
+            __li_out_stride[__vo] = __li_s;
+            __li_s *= ca->dim[__vv];
+          }
+        }
+        ca_size_t __li_k_stride = __li_out_stride[__li_kax_out];
+
+        /* Parent stride table (row-major). */
+        ca_size_t __li_pstride[CA_RANK_MAX];
+        {
+          ca_size_t __li_pss = 1;
+          for ( int8_t __k = (int8_t)(__li_pndim - 1); __k >= 0; __k-- ) {
+            __li_pstride[__k] = __li_pss;
+            __li_pss *= __li_p0->dim[__k];
+          }
+        }
+
+        /* Effective OUTER dim list: parent dims [0..kax-1] excluding pa.
+           PRE = [0..pa-1] + INNER_pre_K = [pa+1..kax-1].  For each, store
+           parent dim, parent stride, output stride. */
+        int8_t    __li_eo_n = 0;
+        ca_size_t __li_eo_dim[CA_RANK_MAX];
+        ca_size_t __li_eo_pstride[CA_RANK_MAX];
+        ca_size_t __li_eo_ostride[CA_RANK_MAX];
+        for ( int8_t __d = 0; __d < __li_kax; __d++ ) {
+          if ( __d == __li_pa ) continue;
+          int8_t __vp = __d;                       /* M.2b: all eff OUTER d < kax -> vp = d */
+          int8_t __vo = (__vp < __li_ax) ? __vp : (int8_t)(__vp - 1);
+          __li_eo_dim[__li_eo_n]     = __li_p0->dim[__d];
+          __li_eo_pstride[__li_eo_n] = __li_pstride[__d];
+          __li_eo_ostride[__li_eo_n] = __li_out_stride[__vo];
+          __li_eo_n++;
+        }
+        ca_size_t __li_OUTER = 1;
+        for ( int8_t __k = 0; __k < __li_eo_n; __k++ ) __li_OUTER *= __li_eo_dim[__k];
+
+          boolean8_t  __li_buf_acc[512];
+
+        const ca_size_t __li_TILE = 512;
+        for ( int32_t __kk = 0; __kk < __li_st->n_parents; __kk++ ) {
+          ca_attach(__li_st->parents[__kk]);   /* window: a parent may run Ruby to fill itself (a CAObject's copy_data); a raising attach holds nothing and the earlier parents are already detached, and the numeric loop after it does not raise */
+          const boolean8_t *p_root = (const boolean8_t *) __li_st->parents[__kk]->ptr;
+          ca_size_t __li_k_base = (ca_size_t) __kk * __li_k_stride;
+
+          ca_size_t __li_idx[CA_RANK_MAX];
+          for ( int8_t __i = 0; __i < __li_eo_n; __i++ ) __li_idx[__i] = 0;
+
+          for ( ca_size_t __li_o = 0; __li_o < __li_OUTER; __li_o++ ) {
+            ca_size_t __li_pbase = 0;
+            ca_size_t __li_obase = __li_k_base;
+            for ( int8_t __i = 0; __i < __li_eo_n; __i++ ) {
+              __li_pbase += __li_idx[__i] * __li_eo_pstride[__i];
+              __li_obase += __li_idx[__i] * __li_eo_ostride[__i];
+            }
+            boolean8_t *__li_op_k = op + __li_obase;
+            const boolean8_t *__li_plane = p_root + __li_pbase;
+            /* L.7 core variant: M-step uses __li_M_stride, tile loop uses __li_eff_INNER. */
+            for ( ca_size_t __li_tile = 0; __li_tile < __li_eff_INNER; __li_tile += __li_TILE ) {
+              ca_size_t __li_tile_len = (__li_eff_INNER - __li_tile < __li_TILE)
+                                        ? (__li_eff_INNER - __li_tile) : __li_TILE;
+                  for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                __li_buf_acc[__j] = (boolean8_t) (0);
+              }
+              for ( ca_size_t __li_i = 0; __li_i < __li_M; __li_i++ ) {
+                const boolean8_t *__li_row = __li_plane + __li_i * __li_M_stride + __li_tile;
+                _Pragma("omp simd")
+                for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                  boolean8_t v = __li_row[__j];
+                  __li_buf_acc[__j] |= v;
+                  (void) v;
+                }
+              }
+    
+              for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                __li_op_k[__li_tile + __j] = (boolean8_t) (__li_buf_acc[__j]);
+              }
+            }
+            /* Carry-increment effective OUTER multi-index. */
+            for ( int8_t __i = (int8_t)(__li_eo_n - 1); __i >= 0; __i-- ) {
+              if ( ++__li_idx[__i] < __li_eo_dim[__i] ) break;
+              __li_idx[__i] = 0;
+            }
+          }
+          ca_detach(__li_st->parents[__kk]);
+        }
+
+        return vout;
+      }
+    }
+    if ( naxes == 1
+         && ca->ndim >= 2
+         && slab_axes[0] == (int8_t)(ca->ndim - 1)
+         && ca->dim[ca->ndim - 1] >= 1
+         && ca->dim[ca->ndim - 1] <= 16
+         && ! ca_has_mask(ca)
+         && ca_attach_is_alias(ca)
+         && ca_fast_path(CA_SC_SHORT_FIBER_REDUCE) ) {
+      ca_size_t __sf_M     = ca->dim[ca->ndim - 1];
+      ca_size_t __sf_OUTER = ca->elements / __sf_M;
+      VALUE   vout = rb_ca_new_reduced(self, slab_axes, naxes, CA_BOOLEAN, keep_axis);
+      CArray *co;
+      GetCArray(vout, co);
+      boolean8_t *op = (boolean8_t *) co->ptr;
+      ca_attach(ca);   /* window: numeric lanes only, nothing raises inside; O(1) alias attach */
+      const boolean8_t *p_root = (const boolean8_t *) ca->ptr;
+      for ( ca_size_t __sf_o = 0; __sf_o < __sf_OUTER; __sf_o++ ) {
+        const boolean8_t *__sf_row = p_root + __sf_o * __sf_M;
+        boolean8_t acc = (boolean8_t) (0);
+        for ( ca_size_t __j = 0; __j < __sf_M; __j++ ) {
+          boolean8_t v = __sf_row[__j];
+          acc |= v;
+          (void) v;
+        }
+
+        op[__sf_o] = (boolean8_t) (acc);
+      }
+      ca_detach(ca);
+      return vout;
+    }
 VALUE   vout  = rb_ca_new_reduced(self, slab_axes, naxes, CA_BOOLEAN, keep_axis);
 CArray *co;
 GetCArray(vout, co);
 boolean8_t *op = (boolean8_t *) co->ptr;
-ca_iter_state st;
 int rc = ca_iter_state_init_l2(&st, ca, CA_SLAB_AXES,
                                slab_axes, naxes, 0);
 if ( rc != CA_ITER_OK ) {
@@ -239,13 +1237,27 @@ boolean8_t *m;
 ca_size_t   out_i = 0;
       while ( ca_iter_state_next_slab_axes(&st, &p, &m) ) {
       boolean8_t acc;
-      CA_SLAB_REDUCE_T(boolean8_t, st, p, m, acc, 0, acc |= v);
+      CA_SLAB_REDUCE_T_SETTLE(boolean8_t, st, p, m, acc, 0, acc |= v, acc);
       op[out_i++] = (boolean8_t) (acc);
       }
       ca_iter_state_finish(&st);
       if ( naxes == ca->ndim && !keep_axis ) return BOOL2VAL(op[0]);
       return vout;
-    }
+#undef st
+}
+
+static VALUE
+any_ki_native_bool (VALUE self, CArray *ca, int8_t *slab_axes, int8_t naxes, int keep_axis)
+{
+  any_ki_native_bool_frame fr;
+  fr.self = self;
+  fr.ca = ca;
+  fr.slab_axes = slab_axes;
+  fr.naxes = naxes;
+  fr.keep_axis = keep_axis;
+  return ca_iter_ensure(1, fr.states, any_ki_native_bool_body, (VALUE) &fr);
+}
+
 
 VALUE
 rb_ca_any_ki (int argc, VALUE *argv, VALUE self)
@@ -327,24 +1339,516 @@ none_ki_stream_bool (VALUE arg)
       return BOOL2VAL((boolean8_t) (acc));
 }
 
+/* The walks can raise part way (a Ruby call per cell in the object
+   lane, an allocation in any lane).  Their states live in the caller's
+   frame, and ca_iter_ensure finishes them however the body leaves. */
+typedef struct {
+  ca_iter_state states[1];
+  VALUE self;
+  CArray *ca;
+  int8_t *slab_axes;
+  int8_t naxes;
+  int keep_axis;
+} none_ki_native_bool_frame;
+
 static VALUE
-none_ki_native_bool (VALUE self, CArray *ca, int8_t *slab_axes, int8_t naxes, int keep_axis)
+none_ki_native_bool_body (VALUE arg)
 {
+  none_ki_native_bool_frame *fr = (none_ki_native_bool_frame *) arg;
+  VALUE self = fr->self;
+  (void) self;
+  CArray *ca = fr->ca;
+  (void) ca;
+  int8_t *slab_axes = fr->slab_axes;
+  (void) slab_axes;
+  int8_t naxes = fr->naxes;
+  (void) naxes;
+  int keep_axis = fr->keep_axis;
+  (void) keep_axis;
+#define st (fr->states[0])
     if ( naxes == ca->ndim && ca->ndim >= 1 && !keep_axis &&
          ca->elements > 0 &&
          ca_is_lazy_view(ca) && ! ca_has_mask(ca) &&
-         ca_fast_paths_enabled() ) {
+         ca_fast_path(CA_SC_LAZY_STREAMING_REDUCE) ) {
       none_ki_stream_bool_t __ctx;
       __ctx.chunk = NULL;
       __ctx.ca    = ca;
       return ca_lazy_arena_protect(none_ki_stream_bool, ca_lazy_arena_release_held,
                                    (VALUE) &__ctx);
     }
+    /* L.1 / L.7: loop-interchange fast path with inner-tiling
+       (PROPOSAL_REDUCTION_LOOP_INTERCHANGE).
+       MEMO_REDUCTION_FASTPATH_ENTITY_ONLY_GUARD Tier 1: extend from
+       entity-only to any contig row-major buffer.  ca_attach_is_alias
+       is true for CA_OBJ_ARRAY and for CAStride-family views whose
+       composed strides are row-major contiguous (CARefer reshape,
+       contig CABlock, CAFarray, alias CAStride, ...); ca_attach then
+       exposes ca->ptr as that buffer at O(1) cost (no materialise). */
+    if ( naxes == 1
+         && slab_axes[0] != (int8_t)(ca->ndim - 1)
+         && ! ca_has_mask(ca)
+         && ca_attach_is_alias(ca)
+         && ca_fast_path(CA_SC_LOOP_INTERCHANGE) ) {
+      int8_t    __li_ax    = slab_axes[0];
+      ca_size_t __li_M     = ca->dim[__li_ax];
+      ca_size_t __li_INNER = 1;
+      for ( int8_t __k = (int8_t)(__li_ax + 1); __k < ca->ndim; __k++ ) __li_INNER *= ca->dim[__k];
+      ca_size_t __li_OUTER = 1;
+      for ( int8_t __k = 0; __k < __li_ax; __k++ ) __li_OUTER *= ca->dim[__k];
+
+      /* Threshold gate: skip when too small to amortise alloc + 2-pass overhead. */
+      if ( __li_INNER >= 64 && __li_M * __li_INNER >= 1024 ) {
+        VALUE   vout = rb_ca_new_reduced(self, slab_axes, naxes, CA_BOOLEAN, keep_axis);
+        CArray *co;
+        GetCArray(vout, co);
+        boolean8_t *op = (boolean8_t *) co->ptr;
+        ca_attach(ca);   /* window: numeric lanes only, nothing raises inside; O(1) alias attach */
+        const boolean8_t *p_root = (const boolean8_t *) ca->ptr;
+
+        /* Per-buffer stack accumulators (one per :plus state, sized
+           to L7 TILE = 512 cells regardless of INNER). */
+          boolean8_t  __li_buf_acc[512];
+
+        ca_size_t __li_plane_elems = __li_M * __li_INNER;
+        const ca_size_t __li_TILE = 512;
+        for ( ca_size_t __li_o = 0; __li_o < __li_OUTER; __li_o++ ) {
+          const boolean8_t *__li_plane = p_root + __li_o * __li_plane_elems;
+          for ( ca_size_t __li_tile = 0; __li_tile < __li_INNER; __li_tile += __li_TILE ) {
+            ca_size_t __li_tile_len = (__li_INNER - __li_tile < __li_TILE)
+                                      ? (__li_INNER - __li_tile) : __li_TILE;
+              for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                __li_buf_acc[__j] = (boolean8_t) (1);
+              }
+            for ( ca_size_t __li_i = 0; __li_i < __li_M; __li_i++ ) {
+              const boolean8_t *__li_row = __li_plane + __li_i * __li_INNER + __li_tile;
+              _Pragma("omp simd")
+              for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                boolean8_t v = __li_row[__j];
+                __li_buf_acc[__j] &= !v;
+                (void) v;
+              }
+            }
+
+            for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+              op[__li_o * __li_INNER + __li_tile + __j] = (boolean8_t) (__li_buf_acc[__j]);
+            }
+          }
+        }
+        ca_detach(ca);
+
+        if ( naxes == ca->ndim && !keep_axis ) return BOOL2VAL(op[0]);   /* unreachable: ax != innermost && naxes == 1 < ndim */
+        return vout;
+      }
+    }
+
+    /* MEMO_REDUCTION_FASTPATH_ENTITY_ONLY_GUARD Tier 2: CAStack source.
+       view.reduce(axis: ax>=1) is exactly K independent per-parent
+       reduces over (ax - 1) of each contiguous parent; output row k
+       = parent k's reduced plane.  Run the L.7 core per parent (each
+       attach is O(1) for entity parents), no whole-view materialise.
+
+       K.3 (PROPOSAL_CASTACK_K_AXIS, 2026-06-20): gated to k_axis == 0
+       because the per-parent output layout in dst assumes K is the
+       outermost output axis (= each parent contributes a contiguous
+       block of parent_OUTER * parent_INNER cells).  For k_axis != 0
+       the parents' outputs are interleaved in dst -- generalising
+       the output stride is doable but out of K.3 scope.  The
+       dispatch falls through to ca_iter_state_init_l2 SLAB_AXES
+       which engages the K.3-generalised tile cache. */
+    if ( naxes == 1
+         && slab_axes[0] >= 1
+         && slab_axes[0] != (int8_t)(ca->ndim - 1)
+         && ! ca_has_mask(ca)
+         && ca_func[ca->obj_type].attach == ca_stack_func.attach
+         && ((CAStack *) ca)->k_axis == 0
+         && ca_fast_path(CA_SC_STACK_LOOP_INTERCHANGE) ) {
+      CAStack  *__li_st    = (CAStack *) ca;
+      int8_t    __li_ax    = slab_axes[0];
+      ca_size_t __li_M     = ca->dim[__li_ax];
+      ca_size_t __li_INNER = 1;
+      for ( int8_t __k = (int8_t)(__li_ax + 1); __k < ca->ndim; __k++ ) __li_INNER *= ca->dim[__k];
+      ca_size_t __li_OUTER = 1;   /* parent outer = dims 1..ax-1 (excludes K = axis 0) */
+      for ( int8_t __k = 1; __k < __li_ax; __k++ ) __li_OUTER *= ca->dim[__k];
+
+      /* Bail to the generic path if any parent carries a mask (the
+         core reads parent->ptr without mask awareness). */
+      int __li_ok = 1;
+      for ( int32_t __kk = 0; __kk < __li_st->n_parents; __kk++ ) {
+        if ( ca_has_mask(__li_st->parents[__kk]) ) { __li_ok = 0; break; }
+      }
+
+      if ( __li_ok && __li_INNER >= 64 && __li_M * __li_INNER >= 1024 ) {
+        VALUE   vout = rb_ca_new_reduced(self, slab_axes, naxes, CA_BOOLEAN, keep_axis);
+        CArray *co;
+        GetCArray(vout, co);
+        boolean8_t *op = (boolean8_t *) co->ptr;
+
+          boolean8_t  __li_buf_acc[512];
+
+        ca_size_t __li_plane_elems = __li_M * __li_INNER;
+        ca_size_t __li_parent_out  = __li_OUTER * __li_INNER;
+        const ca_size_t __li_TILE = 512;
+        for ( int32_t __kk = 0; __kk < __li_st->n_parents; __kk++ ) {
+          ca_attach(__li_st->parents[__kk]);   /* window: a parent may run Ruby to fill itself (a CAObject's copy_data); a raising attach holds nothing and the earlier parents are already detached, and the numeric loop after it does not raise */
+          const boolean8_t *p_root = (const boolean8_t *) __li_st->parents[__kk]->ptr;
+          boolean8_t *__li_op_k = op + (ca_size_t) __kk * __li_parent_out;
+        for ( ca_size_t __li_o = 0; __li_o < __li_OUTER; __li_o++ ) {
+          const boolean8_t *__li_plane = p_root + __li_o * __li_plane_elems;
+          for ( ca_size_t __li_tile = 0; __li_tile < __li_INNER; __li_tile += __li_TILE ) {
+            ca_size_t __li_tile_len = (__li_INNER - __li_tile < __li_TILE)
+                                      ? (__li_INNER - __li_tile) : __li_TILE;
+              for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                __li_buf_acc[__j] = (boolean8_t) (1);
+              }
+            for ( ca_size_t __li_i = 0; __li_i < __li_M; __li_i++ ) {
+              const boolean8_t *__li_row = __li_plane + __li_i * __li_INNER + __li_tile;
+              _Pragma("omp simd")
+              for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                boolean8_t v = __li_row[__j];
+                __li_buf_acc[__j] &= !v;
+                (void) v;
+              }
+            }
+
+            for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+              __li_op_k[__li_o * __li_INNER + __li_tile + __j] = (boolean8_t) (__li_buf_acc[__j]);
+            }
+          }
+        }
+          ca_detach(__li_st->parents[__kk]);
+        }
+
+        return vout;
+      }
+    }
+
+    /* M.1.0 + M.2.0a (PROPOSAL_MKKERNEL_TIER2_K_AXIS_GEN, 2026-06-20):
+       Tier 2 fast path for CAStack with k_axis > 0, covering two
+       structurally-equivalent cases:
+
+         M.1  ax > k_axis              parent INNER all post-K in output
+         M.2a ax < k_axis = ax + 1     parent INNER all post-K in output
+                                       (K directly after reduce axis)
+
+       In both cases parent INNER axes remain contig at the output
+       tail (j-stride 1 preserved -> SIMD tile write maintained),
+       parent PRE axes form a scattered OUTER (per-OUTER output base
+       computed via output stride table + carry-increment multi-index).
+       The k_axis == 0 branch above stays as the tightest fast path
+       (PRE contig in output, no scatter).
+
+       Out of this branch: M.2b (ax < k_axis - 1) where parent INNER
+       is split by K in output (= INNER tile write becomes scatter,
+       SIMD-impacting).  Falls through to the generic init_l2
+       SLAB_AXES path. */
+    if ( naxes == 1
+         && slab_axes[0] >= 1
+         && slab_axes[0] != (int8_t)(ca->ndim - 1)
+         && ! ca_has_mask(ca)
+         && ca_func[ca->obj_type].attach == ca_stack_func.attach
+         && ((CAStack *) ca)->k_axis > 0
+         && ( slab_axes[0] > ((CAStack *) ca)->k_axis
+              || slab_axes[0] + 1 == ((CAStack *) ca)->k_axis )
+         && ca_fast_path(CA_SC_STACK_LOOP_INTERCHANGE) ) {
+      CAStack  *__li_st    = (CAStack *) ca;
+      int8_t    __li_ax    = slab_axes[0];
+      int8_t    __li_kax   = (int8_t) __li_st->k_axis;
+      CArray   *__li_p0    = __li_st->parents[0];        /* shape representative */
+      int8_t    __li_pa    = (__li_ax < __li_kax) ? __li_ax : (int8_t)(__li_ax - 1);
+      int8_t    __li_kax_out = (__li_ax < __li_kax) ? (int8_t)(__li_kax - 1) : __li_kax;
+      ca_size_t __li_M     = __li_p0->dim[__li_pa];      /* = ca->dim[__li_ax] for ax != kax */
+      ca_size_t __li_INNER = 1;
+      for ( int8_t __k = (int8_t)(__li_pa + 1); __k < __li_p0->ndim; __k++ ) __li_INNER *= __li_p0->dim[__k];
+      ca_size_t __li_OUTER = 1;
+      for ( int8_t __k = 0; __k < __li_pa; __k++ ) __li_OUTER *= __li_p0->dim[__k];
+
+      /* Bail to the generic path if any parent carries a mask. */
+      int __li_ok = 1;
+      for ( int32_t __kk = 0; __kk < __li_st->n_parents; __kk++ ) {
+        if ( ca_has_mask(__li_st->parents[__kk]) ) { __li_ok = 0; break; }
+      }
+
+      if ( __li_ok && __li_INNER >= 64 && __li_M * __li_INNER >= 1024 ) {
+        VALUE   vout = rb_ca_new_reduced(self, slab_axes, naxes, CA_BOOLEAN, keep_axis);
+        CArray *co;
+        GetCArray(vout, co);
+        boolean8_t *op = (boolean8_t *) co->ptr;
+
+        /* Output row-major stride table (length = ca->ndim - 1).
+           Output position vo maps to view position vv = (vo < ax) ? vo : vo + 1. */
+        ca_size_t __li_out_stride[CA_RANK_MAX];
+        {
+          ca_size_t __li_s = 1;
+          for ( int8_t __vo = (int8_t)(ca->ndim - 2); __vo >= 0; __vo-- ) {
+            int8_t __vv = (__vo < __li_ax) ? __vo : (int8_t)(__vo + 1);
+            __li_out_stride[__vo] = __li_s;
+            __li_s *= ca->dim[__vv];
+          }
+        }
+        ca_size_t __li_k_stride = __li_out_stride[__li_kax_out];
+
+        /* Per-parent-PRE output strides + dims.  PRE view position
+           vp = (pd < kax) ? pd : pd + 1.  PRE output position
+           vo = (vp < ax) ? vp : vp - 1.  For M.1 (ax > kax) all PRE
+           view pos < ax so vo = vp.  For M.2a (ax < kax = ax+1) all
+           PRE pd < ax < kax so vp = pd and vo = pd. */
+        ca_size_t __li_pre_out_stride[CA_RANK_MAX];
+        ca_size_t __li_pre_dim[CA_RANK_MAX];
+        for ( int8_t __pd = 0; __pd < __li_pa; __pd++ ) {
+          int8_t __vp = (__pd < __li_kax) ? __pd : (int8_t)(__pd + 1);
+          int8_t __vo = (__vp < __li_ax) ? __vp : (int8_t)(__vp - 1);
+          __li_pre_out_stride[__pd] = __li_out_stride[__vo];
+          __li_pre_dim[__pd] = __li_p0->dim[__pd];
+        }
+
+          boolean8_t  __li_buf_acc[512];
+
+        ca_size_t __li_plane_elems = __li_M * __li_INNER;
+        const ca_size_t __li_TILE = 512;
+        for ( int32_t __kk = 0; __kk < __li_st->n_parents; __kk++ ) {
+          ca_attach(__li_st->parents[__kk]);   /* window: a parent may run Ruby to fill itself (a CAObject's copy_data); a raising attach holds nothing and the earlier parents are already detached, and the numeric loop after it does not raise */
+          const boolean8_t *p_root = (const boolean8_t *) __li_st->parents[__kk]->ptr;
+          ca_size_t __li_k_base = (ca_size_t) __kk * __li_k_stride;
+
+          ca_size_t __li_idx[CA_RANK_MAX];
+          for ( int8_t __pd = 0; __pd < __li_pa; __pd++ ) __li_idx[__pd] = 0;
+
+          for ( ca_size_t __li_o = 0; __li_o < __li_OUTER; __li_o++ ) {
+            ca_size_t __li_obase = __li_k_base;
+            for ( int8_t __pd = 0; __pd < __li_pa; __pd++ ) {
+              __li_obase += __li_idx[__pd] * __li_pre_out_stride[__pd];
+            }
+            boolean8_t *__li_op_k = op + __li_obase;
+            const boolean8_t *__li_plane = p_root + __li_o * __li_plane_elems;
+            /* Inline single-OUTER core: j-stride 1 in __li_op_k preserved. */
+            for ( ca_size_t __li_tile = 0; __li_tile < __li_INNER; __li_tile += __li_TILE ) {
+              ca_size_t __li_tile_len = (__li_INNER - __li_tile < __li_TILE)
+                                        ? (__li_INNER - __li_tile) : __li_TILE;
+                  for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                __li_buf_acc[__j] = (boolean8_t) (1);
+              }
+              for ( ca_size_t __li_i = 0; __li_i < __li_M; __li_i++ ) {
+                const boolean8_t *__li_row = __li_plane + __li_i * __li_INNER + __li_tile;
+                _Pragma("omp simd")
+                for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                  boolean8_t v = __li_row[__j];
+                  __li_buf_acc[__j] &= !v;
+                  (void) v;
+                }
+              }
+    
+              for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                __li_op_k[__li_tile + __j] = (boolean8_t) (__li_buf_acc[__j]);
+              }
+            }
+            /* Carry-increment OUTER multi-index (row-major over parent PRE dims). */
+            for ( int8_t __pd = (int8_t)(__li_pa - 1); __pd >= 0; __pd-- ) {
+              if ( ++__li_idx[__pd] < __li_pre_dim[__pd] ) break;
+              __li_idx[__pd] = 0;
+            }
+          }
+          ca_detach(__li_st->parents[__kk]);
+        }
+
+        return vout;
+      }
+    }
+
+    /* M.2.0b (PROPOSAL_MKKERNEL_TIER2_K_AXIS_GEN, 2026-06-20):
+       Case M.2b (ax < k_axis - 1): parent INNER axes are split by K
+       in the output.  Strategy C (effective OUTER expansion): treat
+       INNER_pre_K dims (parent dims [pa+1..k_axis-1]) as part of an
+       extended effective OUTER, and use effective INNER = parent dims
+       [k_axis..pndim-1] (= INNER_post_K, contig at output tail).
+
+       L.7 core variant: M-step stride in parent = full parent INNER
+       total (= Π pdim[pa+1..pndim-1]), separate from the tile loop
+       bound (= eff_INNER).  Inner read stride 1 in parent + output
+       write stride 1 (= contig output tail) both preserved -> SIMD
+       tile reduce + write maintained.
+
+       Performance characteristic (deliver-via-view -- the surface
+       prioritises delivering the cells over avoiding a copy): bench (b2 pattern, M=200, K=5, eff_INNER
+       =360, INNER_pre_K=16) yields 3674 us vs eager-entity 1545 us
+       = 2.38x slow.  Root cause is the multi-parent data layout
+       (= 5 separate 9 MB regions instead of one contig 46 MB),
+       which costs DRAM/TLB/prefetcher efficiency irrespective of
+       strategy.  Strategy A (temp buf + scatter, explored rev1
+       sparring round 1) was implemented and benched at 3783 us
+       = within noise of Strategy C, confirming the bottleneck is
+       structural, NOT cache-stride from this branch.  Strategy C
+       is shipped here (= simpler emit, no malloc) per round 2
+       sparring decision; the 3.94x win vs generic fallback
+       (.copy.sum at 14872 us) justifies landing despite missing
+       eager-entity parity.  Strategy A retained in PROPOSAL as
+       future-optimization substrate (= multi-level tile-M + tile-
+       INNER could reclaim DRAM efficiency if revisited).
+
+       Threshold eff_INNER >= 32 auto-bypasses at = -1 (k_axis =
+       pndim -> eff_INNER = 1, fast path skipped, generic path
+       handles correctness). */
+    if ( naxes == 1
+         && slab_axes[0] >= 1
+         && slab_axes[0] != (int8_t)(ca->ndim - 1)
+         && ! ca_has_mask(ca)
+         && ca_func[ca->obj_type].attach == ca_stack_func.attach
+         && ((CAStack *) ca)->k_axis > 0
+         && slab_axes[0] + 1 < ((CAStack *) ca)->k_axis
+         && ca_fast_path(CA_SC_STACK_LOOP_INTERCHANGE) ) {
+      CAStack  *__li_st    = (CAStack *) ca;
+      int8_t    __li_ax    = slab_axes[0];
+      int8_t    __li_kax   = (int8_t) __li_st->k_axis;
+      CArray   *__li_p0    = __li_st->parents[0];
+      int8_t    __li_pndim = __li_p0->ndim;
+      int8_t    __li_pa    = __li_ax;                          /* M.2b: ax < kax -> pa = ax */
+      int8_t    __li_kax_out = (int8_t)(__li_kax - 1);
+
+      ca_size_t __li_M = __li_p0->dim[__li_pa];
+      ca_size_t __li_eff_INNER = 1;                            /* Π pdim[kax..pndim-1] = INNER_post_K */
+      for ( int8_t __k = __li_kax; __k < __li_pndim; __k++ ) __li_eff_INNER *= __li_p0->dim[__k];
+      ca_size_t __li_M_stride = 1;                             /* Π pdim[pa+1..pndim-1] = full parent INNER */
+      for ( int8_t __k = (int8_t)(__li_pa + 1); __k < __li_pndim; __k++ ) __li_M_stride *= __li_p0->dim[__k];
+
+      /* Bail to the generic path if any parent carries a mask. */
+      int __li_ok = 1;
+      for ( int32_t __kk = 0; __kk < __li_st->n_parents; __kk++ ) {
+        if ( ca_has_mask(__li_st->parents[__kk]) ) { __li_ok = 0; break; }
+      }
+
+      if ( __li_ok && __li_eff_INNER >= 32 && __li_M * __li_eff_INNER >= 1024 ) {
+        VALUE   vout = rb_ca_new_reduced(self, slab_axes, naxes, CA_BOOLEAN, keep_axis);
+        CArray *co;
+        GetCArray(vout, co);
+        boolean8_t *op = (boolean8_t *) co->ptr;
+
+        /* Output row-major stride table (length = ca->ndim - 1). */
+        ca_size_t __li_out_stride[CA_RANK_MAX];
+        {
+          ca_size_t __li_s = 1;
+          for ( int8_t __vo = (int8_t)(ca->ndim - 2); __vo >= 0; __vo-- ) {
+            int8_t __vv = (__vo < __li_ax) ? __vo : (int8_t)(__vo + 1);
+            __li_out_stride[__vo] = __li_s;
+            __li_s *= ca->dim[__vv];
+          }
+        }
+        ca_size_t __li_k_stride = __li_out_stride[__li_kax_out];
+
+        /* Parent stride table (row-major). */
+        ca_size_t __li_pstride[CA_RANK_MAX];
+        {
+          ca_size_t __li_pss = 1;
+          for ( int8_t __k = (int8_t)(__li_pndim - 1); __k >= 0; __k-- ) {
+            __li_pstride[__k] = __li_pss;
+            __li_pss *= __li_p0->dim[__k];
+          }
+        }
+
+        /* Effective OUTER dim list: parent dims [0..kax-1] excluding pa.
+           PRE = [0..pa-1] + INNER_pre_K = [pa+1..kax-1].  For each, store
+           parent dim, parent stride, output stride. */
+        int8_t    __li_eo_n = 0;
+        ca_size_t __li_eo_dim[CA_RANK_MAX];
+        ca_size_t __li_eo_pstride[CA_RANK_MAX];
+        ca_size_t __li_eo_ostride[CA_RANK_MAX];
+        for ( int8_t __d = 0; __d < __li_kax; __d++ ) {
+          if ( __d == __li_pa ) continue;
+          int8_t __vp = __d;                       /* M.2b: all eff OUTER d < kax -> vp = d */
+          int8_t __vo = (__vp < __li_ax) ? __vp : (int8_t)(__vp - 1);
+          __li_eo_dim[__li_eo_n]     = __li_p0->dim[__d];
+          __li_eo_pstride[__li_eo_n] = __li_pstride[__d];
+          __li_eo_ostride[__li_eo_n] = __li_out_stride[__vo];
+          __li_eo_n++;
+        }
+        ca_size_t __li_OUTER = 1;
+        for ( int8_t __k = 0; __k < __li_eo_n; __k++ ) __li_OUTER *= __li_eo_dim[__k];
+
+          boolean8_t  __li_buf_acc[512];
+
+        const ca_size_t __li_TILE = 512;
+        for ( int32_t __kk = 0; __kk < __li_st->n_parents; __kk++ ) {
+          ca_attach(__li_st->parents[__kk]);   /* window: a parent may run Ruby to fill itself (a CAObject's copy_data); a raising attach holds nothing and the earlier parents are already detached, and the numeric loop after it does not raise */
+          const boolean8_t *p_root = (const boolean8_t *) __li_st->parents[__kk]->ptr;
+          ca_size_t __li_k_base = (ca_size_t) __kk * __li_k_stride;
+
+          ca_size_t __li_idx[CA_RANK_MAX];
+          for ( int8_t __i = 0; __i < __li_eo_n; __i++ ) __li_idx[__i] = 0;
+
+          for ( ca_size_t __li_o = 0; __li_o < __li_OUTER; __li_o++ ) {
+            ca_size_t __li_pbase = 0;
+            ca_size_t __li_obase = __li_k_base;
+            for ( int8_t __i = 0; __i < __li_eo_n; __i++ ) {
+              __li_pbase += __li_idx[__i] * __li_eo_pstride[__i];
+              __li_obase += __li_idx[__i] * __li_eo_ostride[__i];
+            }
+            boolean8_t *__li_op_k = op + __li_obase;
+            const boolean8_t *__li_plane = p_root + __li_pbase;
+            /* L.7 core variant: M-step uses __li_M_stride, tile loop uses __li_eff_INNER. */
+            for ( ca_size_t __li_tile = 0; __li_tile < __li_eff_INNER; __li_tile += __li_TILE ) {
+              ca_size_t __li_tile_len = (__li_eff_INNER - __li_tile < __li_TILE)
+                                        ? (__li_eff_INNER - __li_tile) : __li_TILE;
+                  for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                __li_buf_acc[__j] = (boolean8_t) (1);
+              }
+              for ( ca_size_t __li_i = 0; __li_i < __li_M; __li_i++ ) {
+                const boolean8_t *__li_row = __li_plane + __li_i * __li_M_stride + __li_tile;
+                _Pragma("omp simd")
+                for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                  boolean8_t v = __li_row[__j];
+                  __li_buf_acc[__j] &= !v;
+                  (void) v;
+                }
+              }
+    
+              for ( ca_size_t __j = 0; __j < __li_tile_len; __j++ ) {
+                __li_op_k[__li_tile + __j] = (boolean8_t) (__li_buf_acc[__j]);
+              }
+            }
+            /* Carry-increment effective OUTER multi-index. */
+            for ( int8_t __i = (int8_t)(__li_eo_n - 1); __i >= 0; __i-- ) {
+              if ( ++__li_idx[__i] < __li_eo_dim[__i] ) break;
+              __li_idx[__i] = 0;
+            }
+          }
+          ca_detach(__li_st->parents[__kk]);
+        }
+
+        return vout;
+      }
+    }
+    if ( naxes == 1
+         && ca->ndim >= 2
+         && slab_axes[0] == (int8_t)(ca->ndim - 1)
+         && ca->dim[ca->ndim - 1] >= 1
+         && ca->dim[ca->ndim - 1] <= 16
+         && ! ca_has_mask(ca)
+         && ca_attach_is_alias(ca)
+         && ca_fast_path(CA_SC_SHORT_FIBER_REDUCE) ) {
+      ca_size_t __sf_M     = ca->dim[ca->ndim - 1];
+      ca_size_t __sf_OUTER = ca->elements / __sf_M;
+      VALUE   vout = rb_ca_new_reduced(self, slab_axes, naxes, CA_BOOLEAN, keep_axis);
+      CArray *co;
+      GetCArray(vout, co);
+      boolean8_t *op = (boolean8_t *) co->ptr;
+      ca_attach(ca);   /* window: numeric lanes only, nothing raises inside; O(1) alias attach */
+      const boolean8_t *p_root = (const boolean8_t *) ca->ptr;
+      for ( ca_size_t __sf_o = 0; __sf_o < __sf_OUTER; __sf_o++ ) {
+        const boolean8_t *__sf_row = p_root + __sf_o * __sf_M;
+        boolean8_t acc = (boolean8_t) (1);
+        for ( ca_size_t __j = 0; __j < __sf_M; __j++ ) {
+          boolean8_t v = __sf_row[__j];
+          acc &= !v;
+          (void) v;
+        }
+
+        op[__sf_o] = (boolean8_t) (acc);
+      }
+      ca_detach(ca);
+      return vout;
+    }
 VALUE   vout  = rb_ca_new_reduced(self, slab_axes, naxes, CA_BOOLEAN, keep_axis);
 CArray *co;
 GetCArray(vout, co);
 boolean8_t *op = (boolean8_t *) co->ptr;
-ca_iter_state st;
 int rc = ca_iter_state_init_l2(&st, ca, CA_SLAB_AXES,
                                slab_axes, naxes, 0);
 if ( rc != CA_ITER_OK ) {
@@ -356,13 +1860,27 @@ boolean8_t *m;
 ca_size_t   out_i = 0;
       while ( ca_iter_state_next_slab_axes(&st, &p, &m) ) {
       boolean8_t acc;
-      CA_SLAB_REDUCE_T(boolean8_t, st, p, m, acc, 1, acc &= !v);
+      CA_SLAB_REDUCE_T_SETTLE(boolean8_t, st, p, m, acc, 1, acc &= !v, !acc);
       op[out_i++] = (boolean8_t) (acc);
       }
       ca_iter_state_finish(&st);
       if ( naxes == ca->ndim && !keep_axis ) return BOOL2VAL(op[0]);
       return vout;
-    }
+#undef st
+}
+
+static VALUE
+none_ki_native_bool (VALUE self, CArray *ca, int8_t *slab_axes, int8_t naxes, int keep_axis)
+{
+  none_ki_native_bool_frame fr;
+  fr.self = self;
+  fr.ca = ca;
+  fr.slab_axes = slab_axes;
+  fr.naxes = naxes;
+  fr.keep_axis = keep_axis;
+  return ca_iter_ensure(1, fr.states, none_ki_native_bool_body, (VALUE) &fr);
+}
+
 
 VALUE
 rb_ca_none_ki (int argc, VALUE *argv, VALUE self)