badline 0.3.0 → 0.4.0

data/lib/badline/vic/graphics_shifter.rb

@@ -16,16 +16,27 @@ module Badline
     # ECM+MCM mode is a pixel later on both counts: the lookup changes at
     # pixel 5 and the read at the next group's pixel 0. The mode bits are
     # the sequencer's: ECM 4, BMM 2, MCM 1.
+    #
+    # The 8565 has no colour latency: ECM and BMM take hold, rising or
+    # falling, at the next group's pixel 0, and an MCM that falls out of
+    # ECM+MCM does so on time. Where that pixel 0 takes the group out of an
+    # invalid mode, it is still black into hi-res text, and so is a
+    # background pixel into multicolour bitmap.
     class GraphicsShifter
+      ECM = 0b100
       ECM_BMM = 0b110
+      MULTICOLOR_BITMAP = 0b011
       ECM_MCM = 0b101
       BMM = 0b010
 
       # The group #draw painted, and which of its pixels are foreground.
       attr_reader :colors, :fg
 
-      def initialize(registers)
+      def initialize(registers, model: :mos6569)
         @registers = registers
+        @latency = model != :mos8565
+        @next_ecm_bmm = 0
+        @black_below = 0
         @colors = Array.new(8, 0)
         @fg = Array.new(8, false)
         @gbuf = 0
@@ -43,6 +54,7 @@ module Badline
       # the byte loaded at pixel shift under an unchanging mode.
       def prime(data, screencode, color, shift, mode)
         @mode_lookup = mode
+        @next_ecm_bmm = mode & ECM_BMM
         @mode_read = mode & 1
         @late_read = false
         load(data, screencode, color)
@@ -56,32 +68,55 @@ module Badline
           step_mode(i, mode)
           load(data, screencode, color) if i == shift
           pixel = read_pixel
-          @colors[i] = lookup(pixel)
+          @colors[i] = pixel < @black_below ? 0 : lookup(pixel)
+          @black_below = 0
           @fg[i] = pixel >= 2
           i += 1
         end
+        @next_ecm_bmm = mode & ECM_BMM
       end
 
       private
 
       def step_mode(pixel, mode)
         case pixel
-        when 0 then end_late_read
+        when 0 then start_group
         when 4 then step_lookup(mode)
         when 5 then step_early_fall(mode)
-        when 6 then @mode_lookup &= mode | 1
+        when 6 then @mode_lookup &= mode | 1 if @latency
         when 7 then step_read
         end
       end
 
+      def start_group
+        end_late_read
+        return if @latency
+
+        invalid = @mode_lookup > ECM
+        @mode_lookup = (@mode_lookup & ~ECM_BMM) | @next_ecm_bmm
+        @black_below = black_pixels_out_of_invalid if invalid
+      end
+
+      # The pixel values below which pixel 0 stays black as the group leaves
+      # an invalid mode: all four into hi-res text, the background ones into
+      # multicolour bitmap.
+      def black_pixels_out_of_invalid
+        case @mode_lookup
+        when 0 then 4
+        when MULTICOLOR_BITMAP then 2
+        else 0
+        end
+      end
+
       def step_lookup(mode)
-        @late_mcm = @mode_lookup.allbits?(ECM_MCM) && mode.nobits?(1)
-        @mode_lookup = (@mode_lookup & ~1) | (mode & 1) | (@late_mcm ? 1 : 0) | (mode & ECM_BMM)
+        @late_mcm = @latency && @mode_lookup.allbits?(ECM_MCM) && mode.nobits?(1)
+        rising = @latency ? mode & ECM_BMM : 0
+        @mode_lookup = (@mode_lookup & ~1) | (mode & 1) | (@late_mcm ? 1 : 0) | rising
       end
 
       def step_early_fall(mode)
         @mode_lookup &= ~1 if @late_mcm
-        @mode_lookup &= mode | ~BMM unless @mode_lookup == BMM
+        @mode_lookup &= mode | ~BMM if @latency && @mode_lookup != BMM
       end
 
       def step_read

data/lib/badline/vic/registers.rb

@@ -91,6 +91,8 @@ module Badline
 
       def read(reg)
         case reg
+        when 0x16 then @bytes[reg] | 0xc0 # bits 7-6 unused, read 1
+        when 0x18 then @bytes[reg] | 0x01 # bit 0 unused, reads 1
         when 0x1a, 0x20..0x2e then @bytes[reg] | 0xf0
         when 0x1e, 0x1f then read_clear(reg) # collision registers clear on read
         when 0x2f..0x3f then 0xff
@@ -106,6 +108,7 @@ module Badline
         when 0x1a # only the four latch bits
           @bytes[reg] = value & 0x0f
           update_irq_line
+        when 0x1e, 0x1f then nil # the collision registers are read-only
         else @bytes[reg] = value
         end
       end

data/lib/badline/vic/sequencer.rb

@@ -14,21 +14,6 @@ module Badline
     class Sequencer
       include Output
 
-      DISPLAY_X_BOUNDS = [
-        [135, 438].freeze,
-        [128, 447].freeze
-      ].freeze
-
-      # The graphics window always spans the full 40 columns, ignoring CSEL.
-      GFX_X_START = DISPLAY_X_BOUNDS[1][0]
-      GFX_X_END = DISPLAY_X_BOUNDS[1][1] + 1
-
-      # [left compare, right compare] for the border flip-flop per CSEL state.
-      WINDOW_COMPARES = [
-        [DISPLAY_X_BOUNDS[0][0], DISPLAY_X_BOUNDS[0][1] + 1].freeze,
-        [GFX_X_START, GFX_X_END].freeze
-      ].freeze
-
       BORDER_Y_BOUNDS = [
         [55, 247].freeze,
         [51, 251].freeze
@@ -45,8 +30,9 @@ module Badline
       # foreground mask the sprite collisions read.
       attr_writer :render
 
-      def initialize(width, registers, bank)
+      def initialize(width, registers, bank, model: :mos6569, region: Region::PAL)
         @width = width
+        window_bounds(region.display_x_bounds)
         @registers = registers
         @bank = bank
         @colors = Array.new(width, 0)
@@ -63,8 +49,8 @@ module Badline
         @vertical_border = true
         @vertical_armed = true
         @main_border = true
-        @color_patches = ColorPatches.new(self)
-        @shifter = GraphicsShifter.new(registers)
+        @color_patches = ColorPatches.new(self, grey_dots: model == :mos8565)
+        @shifter = GraphicsShifter.new(registers, model:)
         @xscroll = 0
         @last_shift = 0
         @last_mode = 0
@@ -179,6 +165,20 @@ module Badline
 
       private
 
+      # The display window's edges per CSEL state, as the region gives them.
+      # The graphics window always spans the full 40 columns, ignoring CSEL,
+      # and the border flip-flop takes [left compare, right compare] per
+      # CSEL state.
+      def window_bounds(bounds)
+        narrow, wide = bounds
+        @gfx_x_start = wide[0]
+        @gfx_x_end = wide[1] + 1
+        @window_compares = [
+          [narrow[0], narrow[1] + 1].freeze,
+          [@gfx_x_start, @gfx_x_end].freeze
+        ].freeze
+      end
+
       # After a mode, XSCROLL or colour change: groups paint whole bytes
       # again once the change has settled, and run pixel by pixel until then.
       def emit_checked(slot, col, display, mode)

data/lib/badline/vic/sequencer_output.rb

@@ -16,9 +16,9 @@ module Badline
         def output(col, shift)
           x_pos = (col + 16) * 8
           csel = @registers.csel?
-          first = WINDOW_COMPARES[@first_csel ? 1 : 0]
+          first = @window_compares[@first_csel ? 1 : 0]
           @first_csel = csel
-          compares = WINDOW_COMPARES[csel ? 1 : 0]
+          compares = @window_compares[csel ? 1 : 0]
           win_lo, right_compare = compares
 
           if !first.equal?(compares) || boundary_group?(x_pos, win_lo, right_compare)
@@ -45,7 +45,7 @@ module Badline
         end
 
         def output_window(x_pos, shift)
-          in_gfx = x_pos >= GFX_X_START && x_pos < GFX_X_END
+          in_gfx = x_pos >= @gfx_x_start && x_pos < @gfx_x_end
           @border_groups[x_pos >> 3] = BorderMask::NONE
 
           if shift.zero?
@@ -105,7 +105,7 @@ module Badline
             shown = pixel_shown?(x, win_lo, right_compare)
             @colors[x] = shown ? pixel : border
             @border[x] = !shown
-            @fg[x] = x >= GFX_X_START && x < GFX_X_END ? mask : false
+            @fg[x] = x >= @gfx_x_start && x < @gfx_x_end ? mask : false
             win_lo, right_compare = compares if i.zero?
             i += 1
           end

data/lib/badline/vic/sprite/internal_bus.rb

@@ -10,8 +10,12 @@ module Badline
       # the CPU reads or writes a VIC register in that cycle, and the middle
       # one is the idle fetch at $3fff (sbsprf24's readme).
       class InternalBus
+        # The columns of a raster line.
+        attr_reader :columns
+
         def initialize(bank, columns)
           @bank = bank
+          @columns = columns
           @lines = 0
           @ghost = 0xff
           @value = Array.new(columns, 0xff)

data/lib/badline/vic/sprite/shifter.rb

@@ -71,8 +71,8 @@ module Badline
           while count < MAX_SPAN
             if pos >= boundary
               log.advance(pos)
-              mc = log[0x1c].anybits?(@bit)
               expanded = log[0x1d].anybits?(@bit)
+              mc = logged_multicolor(log, mc, expanded, count)
               boundary = log.next_x
             end
             count.zero? ? prime(mc) : step(mc, expanded, count == cut - 1)
@@ -88,11 +88,29 @@ module Badline
         # The X match loads the shift register and arms both flip-flops, so
         # the sprite's first pixel comes straight off the fetched row.
         def prime(multicolor)
-          @mc_flop = false
+          @mc_flop = @new_chip && !multicolor
           @xe_flop = false
           @latch = (@sr >> 22) & (multicolor ? 3 : 2)
         end
 
+        # The multicolor bit as the log has it at the pixel. A change after
+        # the first pixel reaches the 8565's flip-flop.
+        def logged_multicolor(log, was, expanded, count)
+          multicolor = log[0x1c].anybits?(@bit)
+          switch_multicolor(multicolor, expanded) if @new_chip && multicolor != was && count.positive?
+          multicolor
+        end
+
+        # On the 8565 a multicolor change works on the flip-flop instead of
+        # the next pixels. It stays as it is unless the change lands between
+        # the two halves of an expanded pixel, where it flips, or is set by a
+        # switch to hi-res.
+        def switch_multicolor(multicolor, expanded)
+          return unless expanded && !@xe_flop
+
+          @mc_flop = multicolor ? !@mc_flop : true
+        end
+
         # One pixel of the sequencer. An unexpanded sprite shifts every pixel;
         # an expanded one shifts every other, and the multicolor latch reloads
         # every other shift, so its pairs stretch with the expansion. Both
@@ -106,7 +124,7 @@ module Badline
           else
             @xe_flop = false
           end
-          @mc_flop = false unless multicolor
+          @mc_flop = false unless multicolor || @new_chip
           return unless shift
 
           @sr = (@sr << 1) & 0xffffff
@@ -115,10 +133,14 @@ module Badline
 
         # A multicolor pair loaded on the last pixel before the reload keeps
         # only its high bit, as a hi-res pixel does (spritefetchbug).
+        # On the 8565 a hi-res pixel with the multicolor flip-flop clear
+        # sets it and loads nothing, so the latch repeats its last pixel.
         def load_latch(multicolor, last)
           if multicolor
             @latch = (@sr >> 22) & (last ? 2 : 3) if @mc_flop
             @mc_flop = !@mc_flop
+          elsif @new_chip && !@mc_flop
+            @mc_flop = true
           else
             @latch = (@sr >> 22) & 2
           end

data/lib/badline/vic/sprite.rb

@@ -56,12 +56,13 @@ module Badline
       attr_reader :index, :leftmost, :span, :codes,
                   :reload_leftmost, :reload_span, :reload_codes
 
-      def initialize(index, registers, bank, width, bus = InternalBus.new(bank, width / 8))
+      def initialize(index, registers, bank, bus, model: :mos6569)
         @index = index
+        @new_chip = model == :mos8565
         @registers = registers
         @bank = bank
         @bus = bus
-        @width = width
+        @width = bus.columns * 8
         @bit = 1 << index
         @dma = false
         @display_on = false
@@ -77,8 +78,8 @@ module Badline
         @reload_codes = Array.new(MAX_SPAN + RELOAD_HOLD, 0)
         @reload_leftmost = 0
         @reload_span = 0
-        @reload_x = (RELOAD_X + (RELOAD_STEP * index)) % width
-        @reload_next_line = RELOAD_X + (RELOAD_STEP * index) < width
+        @reload_x = (RELOAD_X + (RELOAD_STEP * index)) % @width
+        @reload_next_line = RELOAD_X + (RELOAD_STEP * index) < @width
         @sr = 0
         @latch = 0
         @mc_flop = false

data/lib/badline/vic/sprites.rb

@@ -27,12 +27,17 @@ module Badline
         [0x25, 0x26, *0x27..0x2e].each { |reg| delays[reg] = COLOR_DELAY }
       end.freeze
 
-      def initialize(registers, bank, width)
+      # The 8565's sprite sequencers take a multicolor change a pixel
+      # sooner than the 6569's.
+      WRITE_DELAY_8565 = WRITE_DELAY.dup.tap { |delays| delays[0x1c] = SEQUENCER_DELAY - 1 }.freeze
+
+      def initialize(registers, bank, width, model: :mos6569)
         @registers = registers
+        @write_delay = model == :mos8565 ? WRITE_DELAY_8565 : WRITE_DELAY
         @bank = bank
         @width = width
         @bus = Sprite::InternalBus.new(bank, width / 8)
-        @sprites = Array.new(8) { |i| Sprite.new(i, registers, bank, width, @bus) }
+        @sprites = Array.new(8) { |i| Sprite.new(i, registers, bank, @bus, model:) }
         @collisions = Collisions.new(registers, width)
         @hits = @collisions.hits
         @win_color = Array.new(width, 0)
@@ -123,7 +128,7 @@ module Badline
       # Record a mid-line write at the pixel where it becomes visible.
       def log_change(reg, old, value, beam_x)
         clear_y_expansion(old & ~value, beam_x) if reg == 0x17
-        delay = WRITE_DELAY[reg]
+        delay = @write_delay[reg]
         return unless delay && active?
 
         @log.log(beam_x + delay, reg, old, value)

data/lib/badline/vic.rb

@@ -11,14 +11,22 @@ module Badline
     include Addressable
     include IntegerHelper
 
+    # The 6569 of the breadbin C64, and the HMOS 8565 of the C64C.
+    MODELS = %i[mos6569 mos8565].freeze
+
     attr_reader :address_bus, :display, :width, :height, :vic_bank, :column,
-                :rasterline, :dirty_lines
+                :rasterline, :dirty_lines, :model, :region
 
     # Returns the byte the CPU's halted read would see, for the c-accesses
     # that run before AEC. Without it they read colour RAM.
     attr_writer :open_bus
 
     LIGHTPEN_IRQ = 0x08 # $D019 latch bit
+    COLOR_REGISTERS = 0x20..0x2e
+
+    # What the 8565 shows on the pixel before a color register write takes
+    # hold, where the 6569 shows the old color: the grey dot.
+    GREY_DOT = 0x0f
 
     # A g-access reaches the pixel output this many columns after it runs.
     GRAPHICS_DELAY = 2
@@ -28,17 +36,19 @@ module Badline
     G_IDLE = 1
     G_DISPLAY = 2
 
+    # The idle g-access in the column a mid-row bad line opens display
+    # state reads here on a 6569.
+    DMA_DELAY_IDLE_ADDRESS = 0x38ff
+
     # The $d011 mode bits a g-access still sees for a cycle after they fall:
     # BMM always, and ECM too when the access it leaves read the character
     # ROM.
     FETCH_HOLD = 0x20
     FETCH_HOLD_ROM = 0x60
 
-    # Columns carrying a per-cycle hook, so an ordinary column costs one
-    # array read instead of the dispatch.
-    HOOK_COLUMNS = Array.new(63) do |column|
-      [14, 15, 53, 54, 57, 62].include?(column)
-    end.freeze
+    # The columns carrying a hook, besides the line's last column, which
+    # starts the vertical border for the line after it.
+    HOOKS = [14, 15, 53, 54, 57].freeze
 
     # BA falls three columns ahead of each sprite's pair of s-accesses, and
     # the five-column windows step two columns apart from sprite 0 at column
@@ -46,19 +56,29 @@ module Badline
     # split: the tail columns fall on the line whose cycle 55/56 compare
     # started the fetch, the head columns on the line after it.
     SPRITE_BA_WINDOWS = Array.new(8) { |n| (54 + (2 * n))..(58 + (2 * n)) }.freeze
-    SPRITE_BA_TAIL = SPRITE_BA_WINDOWS.map { |w| w.select { |c| c < 63 } }.freeze
-    SPRITE_BA_HEAD = SPRITE_BA_WINDOWS.map { |w| w.filter_map { |c| c - 63 if c >= 63 } }.freeze
 
-    def initialize(address_bus = nil, debug: false)
+    def initialize(address_bus = nil, debug: false, model: :mos6569, region: Region::PAL)
+      raise ArgumentError, "unknown VIC-II model #{model}" unless MODELS.include?(model)
+
       addressable_at(0xd000, length: 2**10)
+      @model = model
+      @region = region
+      @lightpen_extra = model == :mos8565 ? 1 : 2
+      @grey_dots = model == :mos8565
+      @delayed_fetch = model == :mos8565
+      @dma_delay_idle = model == :mos6569
       @address_bus = address_bus || AddressBus.new
       @vic_bank = VIC::Bank.new(@address_bus)
       @debug = debug
 
-      @width = 504
-      @height = 312
-      @columns_per_line = @width / 8
+      @columns_per_line = region.cycles_per_line
+      @width = @columns_per_line * 8
+      @height = region.lines_per_frame
+      @last_column = @columns_per_line - 1
       @last_line = @height - 1
+      layout_columns
+      @blank_columns = Array.new(@columns_per_line) { |column| Region.blanked?(column, region.hblank) }.freeze
+      @blank_lines = Array.new(@height) { |line| Region.blanked?(line, region.vblank) }.freeze
       @display = Array.new(@width * @height, 0)
       @lines = Array.new(@height) { Array.new(@width, 0) }
       @dirty_lines = Array.new(@height, true)
@@ -75,9 +95,9 @@ module Badline
       @registers = VIC::Registers.new
       @register_bytes = @registers.bytes
       @display_state = VIC::DisplayState.new(@registers)
-      @sequencer = VIC::Sequencer.new(@width, @registers, @vic_bank)
+      @sequencer = VIC::Sequencer.new(@width, @registers, @vic_bank, model: @model, region: @region)
       @sequencer.render = @render
-      @sprites = VIC::Sprites.new(@registers, @vic_bank, @width)
+      @sprites = VIC::Sprites.new(@registers, @vic_bank, @width, model: @model)
       @display.fill(0)
       @lines.each { |line| line.fill(0) }
       @dirty_lines.fill(true)
@@ -108,11 +128,11 @@ module Badline
       # The g-access runs in the first half of the cycle, ahead of the bad
       # line compare, and the c-access in the second half, after it.
       draw!
-      @display_state.cycle(@rasterline, @column)
+      dma_delay_idle_access if @display_state.cycle(@rasterline, @column)
 
       fetch_character_data! if dma_active?
 
-      column_hooks if HOOK_COLUMNS[@column]
+      column_hooks if @hook_columns[@column]
 
       @column += 1
       if @column == @columns_per_line
@@ -140,7 +160,7 @@ module Badline
       when 53 then check_sprite_dma
       when 54 then check_dma_and_toggle_expansion
       when 57 then @sprites.check_display(@rasterline)
-      when 62 then @sequencer.start_vertical_border(@rasterline == @last_line ? 0 : @rasterline + 1)
+      when @last_column then @sequencer.start_vertical_border(@rasterline == @last_line ? 0 : @rasterline + 1)
       end
     end
 
@@ -197,9 +217,10 @@ module Badline
     end
 
     # The first trigger per frame latches the beam position into LPX/LPY and
-    # raises the LP IRQ. The latch happens one cycle after the edge, with the
-    # 6569's two extra half-pixels; a trigger on the last line is consumed
-    # without latching unless it lands on the line's first cycle.
+    # raises the LP IRQ. The latch happens one cycle after the edge, with
+    # the model's extra half-pixels, two on the 6569 and one on the 8565; a
+    # trigger on the last line is consumed without latching unless it lands
+    # on the line's first cycle.
     def trigger_lightpen
       return if @lp_triggered
 
@@ -213,7 +234,7 @@ module Badline
       return if line == @last_line && column.positive?
 
       vic_x = ((column * 8) - Sprite::X_OFFSET) % @width
-      latch_lightpen((vic_x >> 1) + 2, line)
+      latch_lightpen((vic_x >> 1) + @lightpen_extra, line)
     end
 
     # The byte the VIC fetched in the phi1 half of the cycle the CPU is
@@ -224,17 +245,9 @@ module Badline
       vic_bank.peek(phi1_address)
     end
 
-    def hblank?
-      @column < 10 || @column > 60
-    end
-
-    def vblank?
-      @rasterline < 16 || @rasterline > 299
-    end
-
-    def blanking?
-      @rasterline < 16 || @rasterline > 299 || @column < 10 || @column > 60
-    end
+    def hblank? = @blank_columns[@column]
+    def vblank? = @blank_lines[@rasterline]
+    def blanking? = @blank_lines[@rasterline] || @blank_columns[@column]
 
     def render? = @render
 
@@ -265,19 +278,30 @@ module Badline
     # Mid-line writes to the color and sprite registers are logged against
     # the cycle after the write (the CPU runs after the VIC within a machine
     # cycle, so @column already points there); each register adds its own
-    # pixel delay on top.
+    # pixel delay on top. On the 8565 a color register write that leaves
+    # the value as it was still shows its grey dot.
     def log_register_change(reg, value)
       old = @registers[reg]
-      return if old == value
+      return if old == value && !grey_dot?(reg)
 
       if (0x20..0x24).cover?(reg)
         @sequencer.colors_changed! unless reg == 0x20
         @sequencer.color_patches.log(reg, old, value, @column * 8) if @render && !blanking?
       else
-        @sprites.log_change(reg, old, value, @column * 8)
+        log_sprite_change(reg, old, value)
       end
     end
 
+    def grey_dot?(reg) = @grey_dots && COLOR_REGISTERS.cover?(reg)
+
+    # A sprite color shows its grey dot as a write of light grey on the
+    # pixel before the new color.
+    def log_sprite_change(reg, old, value)
+      beam_x = @column * 8
+      @sprites.log_change(reg, old, GREY_DOT, beam_x - 1) if grey_dot?(reg)
+      @sprites.log_change(reg, old, value, beam_x)
+    end
+
     # Bauer cycles 1-10 and 58-63 are sprite p- and s-accesses, 11-15
     # refresh, 16-55 g-accesses and 56-57 idle. @column has already
     # advanced, so it is the Bauer cycle less one.
@@ -311,11 +335,12 @@ module Badline
       graphics_address(@registers[0x11], @display_state.vmli - 1, (@display_state.vc - 1) & 0x3ff)
     end
 
-    # A $d011/$d012 write is compared in the next column. A write after
-    # column 61 is left to column 62, which compares the next line.
+    # A $d011/$d012 write is compared in the next column. A write in the
+    # line's second last column is left to its last, which compares the
+    # next line.
     def compare_raster_writes(reg)
       return unless (0x11..0x12).cover?(reg)
-      return if @column == @columns_per_line - 1
+      return if @column == @last_column
 
       check_raster_irq!
       @sequencer.compare_vertical_border(@rasterline) if reg == 0x11
@@ -358,11 +383,21 @@ module Badline
       8.times do |n|
         next unless @sprites[n].displaying?
 
-        SPRITE_BA_TAIL[n].each { |c| @sprite_ba[c] = true }
-        SPRITE_BA_HEAD[n].each { |c| @sprite_ba[c] = true }
+        @sprite_ba_tail[n].each { |c| @sprite_ba[c] = true }
+        @sprite_ba_head[n].each { |c| @sprite_ba[c] = true }
       end
     end
 
+    # Splits the sprite BA windows at the end of the line and marks the hook
+    # columns, for a line of the region's length. The marks let an ordinary
+    # column cost one array read instead of the dispatch.
+    def layout_columns
+      last = @last_column
+      @sprite_ba_tail = SPRITE_BA_WINDOWS.map { |w| w.select { |c| c <= last } }.freeze
+      @sprite_ba_head = SPRITE_BA_WINDOWS.map { |w| w.filter_map { |c| c - last - 1 if c > last } }.freeze
+      @hook_columns = Array.new(@columns_per_line) { |c| c == last || HOOKS.include?(c) }.freeze
+    end
+
     # Runs this column's g-access and draws the one from GRAPHICS_DELAY
     # columns earlier. The access reads its byte now, through the mode,
     # $d018 and bank of this cycle. A column with no g-access, or one made
@@ -403,15 +438,29 @@ module Badline
       @g_color[slot] = @g_kept_color = @color_buffer[vmli] || 1
     end
 
-    # The g-access sees a mode bit that falls a cycle late: it addresses
-    # with $d011 as this column has it, OR-ed with the held bits the column
-    # before had. When BMM changes and the access moves from RAM onto the
-    # character ROM, the low address byte still comes from the old mode
+    # On the 6569 a bad line that opens display state mid-row (DMA delay)
+    # moves the idle g-access of the column that triggers it from $3fff (or
+    # $39ff) to DMA_DELAY_IDLE_ADDRESS, unless YSCROLL is 0 (vsp-tester,
+    # colorfetchbug/main).
+    def dma_delay_idle_access
+      slot = @g_tick
+      return unless @dma_delay_idle && @g_kind[slot] == G_IDLE
+      return if @registers.yscroll.zero?
+
+      @g_data[slot] = vic_bank.peek(DMA_DELAY_IDLE_ADDRESS)
+    end
+
+    # The 6569's g-access sees a mode bit that falls a cycle late: it
+    # addresses with $d011 as this column has it, OR-ed with the held bits
+    # the column before had. When BMM changes and the access moves from RAM
+    # onto the character ROM, the low address byte still comes from the old
+    # mode. The 8565's addresses with $d011 as the column before had it
     # (VICE x64sc `vicii_fetch_graphics`).
     def fetch_graphics(vmli, counter)
       d011 = @register_bytes[0x11]
       last = @fetch_d011
       return vic_bank.peek(graphics_address(d011, vmli, counter)) if d011 == last
+      return vic_bank.peek(graphics_address(last, vmli, counter)) if @delayed_fetch
 
       from = graphics_address(last, vmli, counter)
       from_rom = vic_bank.character_rom?(from)

data/lib/badline.rb

@@ -1,11 +1,14 @@
 # frozen_string_literal: true
 
 require "badline/version"
+require "badline/options"
 require "badline/integer_helper"
+require "badline/region"
 require "badline/addressable"
 require "badline/memory"
 require "badline/color_memory"
 require "badline/rom"
+require "badline/ram_expansion"
 require "badline/address_bus"
 require "badline/instruction"
 require "badline/instruction_set"
@@ -18,6 +21,7 @@ require "badline/cycleable"
 require "badline/datasette"
 require "badline/time_of_day"
 require "badline/cia"
+require "badline/via"
 require "badline/sid"
 require "badline/debug_register"
 require "badline/interrupts"

data/packaging/homebrew/badline.rb

@@ -0,0 +1,34 @@
+# frozen_string_literal: true
+
+# The native badline, built from the `rake native:pack` tarball attached to
+# each release. The release workflow copies this file into the tap with the
+# release's url and sha256 filled in.
+class Badline < Formula
+  desc "Cycle-accurate Commodore 64 emulator"
+  homepage "https://github.com/elektronaut/badline"
+  url "https://github.com/elektronaut/badline/releases/download/v0.3.0/badline-0.3.0-spinel-15f037af.tar.gz"
+  sha256 "0000000000000000000000000000000000000000000000000000000000000000"
+  license "MIT"
+
+  depends_on "sdl2"
+
+  uses_from_macos "libxcrypt"
+
+  def install
+    system "make"
+    libexec.install "badline"
+    pkgshare.install "roms"
+    (bin / "badline").write_env_script libexec / "badline",
+                                       BADLINE_ROM_PATH: "${BADLINE_ROM_PATH:-#{pkgshare}/roms}"
+  end
+
+  test do
+    assert_match "badline #{version}", shell_output("#{bin}/badline --version")
+
+    ENV["SDL_VIDEODRIVER"] = "dummy"
+    ENV["SDL_RENDER_DRIVER"] = "software"
+    ENV["SDL_AUDIODRIVER"] = "dummy"
+    system bin / "badline", "--unpaced", "--no-sound", "--frames", "10", "--screenshot", testpath / "frame.bmp"
+    assert_path_exists testpath / "frame.bmp"
+  end
+end