arduino_ci 1.5.0 → 1.6.1
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- checksums.yaml +4 -4
- data/README.md +1 -1
- data/cpp/arduino/ArduinoDefines.h +15 -1
- data/cpp/arduino/avr/interrupt.h +7 -0
- data/cpp/arduino/util/atomic.h +313 -0
- data/exe/arduino_ci.rb +255 -247
- data/lib/arduino_ci/logger.rb +243 -0
- data/lib/arduino_ci/version.rb +1 -1
- data/lib/arduino_ci.rb +1 -0
- data/misc/default.yml +2 -1
- metadata +5 -2
checksums.yaml
CHANGED
@@ -1,7 +1,7 @@
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---
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SHA256:
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metadata.gz:
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data.tar.gz:
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metadata.gz: ec49de766332123a6b2a3c353f5c5217a9680aff2bf2d51752d02748c28a2ee2
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data.tar.gz: f3daa42fe7476ca3bc3cf09de072b35898eeb793aa82fb34bd522da1bd7ef159
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SHA512:
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metadata.gz:
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data.tar.gz:
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metadata.gz: c8726cffd93bad4832a0a78e30e9534a0e7bf8582580169a9898216d86b6d7f05b7c33590c0567b64cf2a01f8bcdab6130c782f532ae30188d11399b1dcc9462
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data.tar.gz: d18af68658089f59f0ab2c377b9b780375d7ec8cc1fc1963ebc122d38b8301f371fe1b93e418d8c3f216124a1385642f3c3a4254eed9e30fb56e1020229ab908
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data/README.md
CHANGED
@@ -1,7 +1,7 @@
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# ArduinoCI Ruby gem (`arduino_ci`)
|
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[![Gem Version](https://badge.fury.io/rb/arduino_ci.svg)](https://rubygems.org/gems/arduino_ci)
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-
[![Documentation](http://img.shields.io/badge/docs-rdoc.info-blue.svg)](http://www.rubydoc.info/gems/arduino_ci/1.
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4
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+
[![Documentation](http://img.shields.io/badge/docs-rdoc.info-blue.svg)](http://www.rubydoc.info/gems/arduino_ci/1.6.1)
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[![Gitter](https://badges.gitter.im/Arduino-CI/arduino_ci.svg)](https://gitter.im/Arduino-CI/arduino_ci?utm_source=badge&utm_medium=badge&utm_campaign=pr-badge)
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[![GitHub Marketplace](https://img.shields.io/badge/Get_it-on_Marketplace-informational.svg)](https://github.com/marketplace/actions/arduino_ci)
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@@ -89,9 +89,23 @@
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#define TIMER5B 17
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#define TIMER5C 18
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-
#if defined(__AVR_ATmega328P__) || defined(__AVR_ATmega32U4__) || defined(__AVR_ATmega328__) || defined(__AVR_ATmega168__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) || defined(__SAM3X8E__) || defined(__SAMD21G18A__)
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+
#if defined(__AVR_ATmega328P__) || defined(__AVR_ATmega32U4__) || defined(__AVR_ATmega328__) || defined(__AVR_ATmega168__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__) || defined(__AVR_ATmega4809__) || defined(__SAM3X8E__) || defined(__SAMD21G18A__)
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// Verified on these platforms, see https://github.com/Arduino-CI/arduino_ci/pull/341#issuecomment-1368118880
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#define LED_BUILTIN 13
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#define A0 14
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#define A1 15
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#define A2 16
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#define A3 17
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#define A4 18
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#define A5 19
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#define A6 20
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#define A7 21
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#define A8 22
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#define A9 23
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#define A10 24
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#define A11 25
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#endif
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// Arduino defines this
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@@ -0,0 +1,313 @@
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1
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/* Copyright (c) 2007 Dean Camera
|
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All rights reserved.
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|
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Redistribution and use in source and binary forms, with or without
|
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright
|
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notice, this list of conditions and the following disclaimer.
|
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+
|
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* Redistributions in binary form must reproduce the above copyright
|
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
|
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distribution.
|
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+
|
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* Neither the name of the copyright holders nor the names of
|
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contributors may be used to endorse or promote products derived
|
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+
from this software without specific prior written permission.
|
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
|
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*/
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/* $Id$ */
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#ifndef _UTIL_ATOMIC_H_
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#define _UTIL_ATOMIC_H_ 1
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+
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+
#include <avr/io.h>
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+
// Not required
|
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//#include <avr/interrupt.h>
|
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+
|
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|
+
#if !defined(__DOXYGEN__)
|
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/* Internal helper functions. */
|
43
|
+
static __inline__ uint8_t __iSeiRetVal(void)
|
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|
+
{
|
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|
+
// Just do nothing
|
46
|
+
//sei();
|
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+
return 1;
|
48
|
+
}
|
49
|
+
|
50
|
+
static __inline__ uint8_t __iCliRetVal(void)
|
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|
+
{
|
52
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+
// Just do nothing
|
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+
// cli();
|
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return 1;
|
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|
+
}
|
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+
|
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|
+
static __inline__ void __iSeiParam(const uint8_t *__s)
|
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|
+
{
|
59
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+
// Just do nothing
|
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+
// sei();
|
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__asm__ volatile ("" ::: "memory");
|
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(void)__s;
|
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|
+
}
|
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+
|
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|
+
static __inline__ void __iCliParam(const uint8_t *__s)
|
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|
+
{
|
67
|
+
// Just do nothing
|
68
|
+
// cli();
|
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|
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__asm__ volatile ("" ::: "memory");
|
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|
+
(void)__s;
|
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|
+
}
|
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+
|
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|
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static __inline__ void __iRestore(const uint8_t *__s)
|
74
|
+
{
|
75
|
+
SREG = *__s;
|
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|
+
__asm__ volatile ("" ::: "memory");
|
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|
+
}
|
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|
+
#endif /* !__DOXYGEN__ */
|
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|
+
|
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|
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/** \file */
|
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|
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/** \defgroup util_atomic <util/atomic.h> Atomically and Non-Atomically Executed Code Blocks
|
82
|
+
|
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|
+
\code
|
84
|
+
#include <util/atomic.h>
|
85
|
+
\endcode
|
86
|
+
|
87
|
+
\note The macros in this header file require the ISO/IEC 9899:1999
|
88
|
+
("ISO C99") feature of for loop variables that are declared inside
|
89
|
+
the for loop itself. For that reason, this header file can only
|
90
|
+
be used if the standard level of the compiler (option --std=) is
|
91
|
+
set to either \c c99 or \c gnu99.
|
92
|
+
|
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|
+
The macros in this header file deal with code blocks that are
|
94
|
+
guaranteed to be executed Atomically or Non-Atmomically. The term
|
95
|
+
"Atomic" in this context refers to the unability of the respective
|
96
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+
code to be interrupted.
|
97
|
+
|
98
|
+
These macros operate via automatic manipulation of the Global
|
99
|
+
Interrupt Status (I) bit of the SREG register. Exit paths from
|
100
|
+
both block types are all managed automatically without the need
|
101
|
+
for special considerations, i. e. the interrupt status will be
|
102
|
+
restored to the same value it has been when entering the
|
103
|
+
respective block.
|
104
|
+
|
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|
+
A typical example that requires atomic access is a 16 (or more)
|
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|
+
bit variable that is shared between the main execution path and an
|
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|
+
ISR. While declaring such a variable as volatile ensures that the
|
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|
+
compiler will not optimize accesses to it away, it does not
|
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+
guarantee atomic access to it. Assuming the following example:
|
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+
|
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+
\code
|
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+
#include <inttypes.h>
|
113
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+
#include <avr/interrupt.h>
|
114
|
+
#include <avr/io.h>
|
115
|
+
|
116
|
+
volatile uint16_t ctr;
|
117
|
+
|
118
|
+
ISR(TIMER1_OVF_vect)
|
119
|
+
{
|
120
|
+
ctr--;
|
121
|
+
}
|
122
|
+
|
123
|
+
...
|
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|
+
int
|
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|
+
main(void)
|
126
|
+
{
|
127
|
+
...
|
128
|
+
ctr = 0x200;
|
129
|
+
start_timer();
|
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|
+
while (ctr != 0)
|
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|
+
// wait
|
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+
;
|
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+
...
|
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+
}
|
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|
+
\endcode
|
136
|
+
|
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|
+
There is a chance where the main context will exit its wait loop
|
138
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+
when the variable \c ctr just reached the value 0xFF. This happens
|
139
|
+
because the compiler cannot natively access a 16-bit variable
|
140
|
+
atomically in an 8-bit CPU. So the variable is for example at
|
141
|
+
0x100, the compiler then tests the low byte for 0, which succeeds.
|
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+
It then proceeds to test the high byte, but that moment the ISR
|
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|
+
triggers, and the main context is interrupted. The ISR will
|
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+
decrement the variable from 0x100 to 0xFF, and the main context
|
145
|
+
proceeds. It now tests the high byte of the variable which is
|
146
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+
(now) also 0, so it concludes the variable has reached 0, and
|
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+
terminates the loop.
|
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|
+
|
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+
Using the macros from this header file, the above code can be
|
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+
rewritten like:
|
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+
|
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+
\code
|
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+
#include <inttypes.h>
|
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|
+
#include <avr/interrupt.h>
|
155
|
+
#include <avr/io.h>
|
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|
+
#include <util/atomic.h>
|
157
|
+
|
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|
+
volatile uint16_t ctr;
|
159
|
+
|
160
|
+
ISR(TIMER1_OVF_vect)
|
161
|
+
{
|
162
|
+
ctr--;
|
163
|
+
}
|
164
|
+
|
165
|
+
...
|
166
|
+
int
|
167
|
+
main(void)
|
168
|
+
{
|
169
|
+
...
|
170
|
+
ctr = 0x200;
|
171
|
+
start_timer();
|
172
|
+
sei();
|
173
|
+
uint16_t ctr_copy;
|
174
|
+
do
|
175
|
+
{
|
176
|
+
ATOMIC_BLOCK(ATOMIC_FORCEON)
|
177
|
+
{
|
178
|
+
ctr_copy = ctr;
|
179
|
+
}
|
180
|
+
}
|
181
|
+
while (ctr_copy != 0);
|
182
|
+
...
|
183
|
+
}
|
184
|
+
\endcode
|
185
|
+
|
186
|
+
This will install the appropriate interrupt protection before
|
187
|
+
accessing variable \c ctr, so it is guaranteed to be consistently
|
188
|
+
tested. If the global interrupt state were uncertain before
|
189
|
+
entering the ATOMIC_BLOCK, it should be executed with the
|
190
|
+
parameter ATOMIC_RESTORESTATE rather than ATOMIC_FORCEON.
|
191
|
+
|
192
|
+
See \ref optim_code_reorder for things to be taken into account
|
193
|
+
with respect to compiler optimizations.
|
194
|
+
*/
|
195
|
+
|
196
|
+
/** \def ATOMIC_BLOCK(type)
|
197
|
+
\ingroup util_atomic
|
198
|
+
|
199
|
+
Creates a block of code that is guaranteed to be executed
|
200
|
+
atomically. Upon entering the block the Global Interrupt Status
|
201
|
+
flag in SREG is disabled, and re-enabled upon exiting the block
|
202
|
+
from any exit path.
|
203
|
+
|
204
|
+
Two possible macro parameters are permitted, ATOMIC_RESTORESTATE
|
205
|
+
and ATOMIC_FORCEON.
|
206
|
+
*/
|
207
|
+
#if defined(__DOXYGEN__)
|
208
|
+
#define ATOMIC_BLOCK(type)
|
209
|
+
#else
|
210
|
+
#define ATOMIC_BLOCK(type) for ( type, __ToDo = __iCliRetVal(); \
|
211
|
+
__ToDo ; __ToDo = 0 )
|
212
|
+
#endif /* __DOXYGEN__ */
|
213
|
+
|
214
|
+
/** \def NONATOMIC_BLOCK(type)
|
215
|
+
\ingroup util_atomic
|
216
|
+
|
217
|
+
Creates a block of code that is executed non-atomically. Upon
|
218
|
+
entering the block the Global Interrupt Status flag in SREG is
|
219
|
+
enabled, and disabled upon exiting the block from any exit
|
220
|
+
path. This is useful when nested inside ATOMIC_BLOCK sections,
|
221
|
+
allowing for non-atomic execution of small blocks of code while
|
222
|
+
maintaining the atomic access of the other sections of the parent
|
223
|
+
ATOMIC_BLOCK.
|
224
|
+
|
225
|
+
Two possible macro parameters are permitted,
|
226
|
+
NONATOMIC_RESTORESTATE and NONATOMIC_FORCEOFF.
|
227
|
+
*/
|
228
|
+
#if defined(__DOXYGEN__)
|
229
|
+
#define NONATOMIC_BLOCK(type)
|
230
|
+
#else
|
231
|
+
#define NONATOMIC_BLOCK(type) for ( type, __ToDo = __iSeiRetVal(); \
|
232
|
+
__ToDo ; __ToDo = 0 )
|
233
|
+
#endif /* __DOXYGEN__ */
|
234
|
+
|
235
|
+
/** \def ATOMIC_RESTORESTATE
|
236
|
+
\ingroup util_atomic
|
237
|
+
|
238
|
+
This is a possible parameter for ATOMIC_BLOCK. When used, it will
|
239
|
+
cause the ATOMIC_BLOCK to restore the previous state of the SREG
|
240
|
+
register, saved before the Global Interrupt Status flag bit was
|
241
|
+
disabled. The net effect of this is to make the ATOMIC_BLOCK's
|
242
|
+
contents guaranteed atomic, without changing the state of the
|
243
|
+
Global Interrupt Status flag when execution of the block
|
244
|
+
completes.
|
245
|
+
*/
|
246
|
+
#if defined(__DOXYGEN__)
|
247
|
+
#define ATOMIC_RESTORESTATE
|
248
|
+
#else
|
249
|
+
#define ATOMIC_RESTORESTATE uint8_t sreg_save \
|
250
|
+
__attribute__((__cleanup__(__iRestore))) = SREG
|
251
|
+
#endif /* __DOXYGEN__ */
|
252
|
+
|
253
|
+
/** \def ATOMIC_FORCEON
|
254
|
+
\ingroup util_atomic
|
255
|
+
|
256
|
+
This is a possible parameter for ATOMIC_BLOCK. When used, it will
|
257
|
+
cause the ATOMIC_BLOCK to force the state of the SREG register on
|
258
|
+
exit, enabling the Global Interrupt Status flag bit. This saves on
|
259
|
+
flash space as the previous value of the SREG register does not
|
260
|
+
need to be saved at the start of the block.
|
261
|
+
|
262
|
+
Care should be taken that ATOMIC_FORCEON is only used when it is
|
263
|
+
known that interrupts are enabled before the block's execution or
|
264
|
+
when the side effects of enabling global interrupts at the block's
|
265
|
+
completion are known and understood.
|
266
|
+
*/
|
267
|
+
#if defined(__DOXYGEN__)
|
268
|
+
#define ATOMIC_FORCEON
|
269
|
+
#else
|
270
|
+
#define ATOMIC_FORCEON uint8_t sreg_save \
|
271
|
+
__attribute__((__cleanup__(__iSeiParam))) = 0
|
272
|
+
#endif /* __DOXYGEN__ */
|
273
|
+
|
274
|
+
/** \def NONATOMIC_RESTORESTATE
|
275
|
+
\ingroup util_atomic
|
276
|
+
|
277
|
+
This is a possible parameter for NONATOMIC_BLOCK. When used, it
|
278
|
+
will cause the NONATOMIC_BLOCK to restore the previous state of
|
279
|
+
the SREG register, saved before the Global Interrupt Status flag
|
280
|
+
bit was enabled. The net effect of this is to make the
|
281
|
+
NONATOMIC_BLOCK's contents guaranteed non-atomic, without changing
|
282
|
+
the state of the Global Interrupt Status flag when execution of
|
283
|
+
the block completes.
|
284
|
+
*/
|
285
|
+
#if defined(__DOXYGEN__)
|
286
|
+
#define NONATOMIC_RESTORESTATE
|
287
|
+
#else
|
288
|
+
#define NONATOMIC_RESTORESTATE uint8_t sreg_save \
|
289
|
+
__attribute__((__cleanup__(__iRestore))) = SREG
|
290
|
+
#endif /* __DOXYGEN__ */
|
291
|
+
|
292
|
+
/** \def NONATOMIC_FORCEOFF
|
293
|
+
\ingroup util_atomic
|
294
|
+
|
295
|
+
This is a possible parameter for NONATOMIC_BLOCK. When used, it
|
296
|
+
will cause the NONATOMIC_BLOCK to force the state of the SREG
|
297
|
+
register on exit, disabling the Global Interrupt Status flag
|
298
|
+
bit. This saves on flash space as the previous value of the SREG
|
299
|
+
register does not need to be saved at the start of the block.
|
300
|
+
|
301
|
+
Care should be taken that NONATOMIC_FORCEOFF is only used when it
|
302
|
+
is known that interrupts are disabled before the block's execution
|
303
|
+
or when the side effects of disabling global interrupts at the
|
304
|
+
block's completion are known and understood.
|
305
|
+
*/
|
306
|
+
#if defined(__DOXYGEN__)
|
307
|
+
#define NONATOMIC_FORCEOFF
|
308
|
+
#else
|
309
|
+
#define NONATOMIC_FORCEOFF uint8_t sreg_save \
|
310
|
+
__attribute__((__cleanup__(__iCliParam))) = 0
|
311
|
+
#endif /* __DOXYGEN__ */
|
312
|
+
|
313
|
+
#endif
|