aarch64 1.0.0 → 1.0.1

checksums.yaml

@@ -1,7 +1,7 @@
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-  data.tar.gz: 537ae808d972d65cc43c1f3a3e916e6faed5d043c432086d0abc91248874c52e
+  metadata.gz: 80455d8e61365c61217446a5cb62b4820881964d257a76250c6545e27b57ee89
+  data.tar.gz: df47808a244cedf79c32481681dc7328324ce973afdab9c8227753940deddbb8
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+  data.tar.gz: fb1ed26e0d5ada7e3a9454e633965fc0d4c2d1c60aa238cae45eb83143814f0654d87e64c9bf5fe6916d90bd47bb65e2851798de3da652f654ce261d84ab0084

data/README.md

@@ -15,6 +15,8 @@ require "jit_buffer"
 # create a JIT buffer
 jit_buffer = JITBuffer.new 4096
 
+asm = AArch64::Assembler.new
+
 # Make some instructions
 asm.pretty do
   asm.movz x0, 0xCAFE
@@ -28,7 +30,7 @@ asm.write_to jit_buffer
 jit_buffer.executable!
 
 # Execute the JIT buffer
-p buffer.to_function([], -Fiddle::TYPE_INT).call.to_s(16) # => f00dcafe
+p jit_buffer.to_function([], -Fiddle::TYPE_INT).call.to_s(16) # => f00dcafe
 ```
 
 The following is the same example, but without the DSL.  The main difference is
@@ -40,6 +42,7 @@ require "jit_buffer"
 
 # create a JIT buffer
 jit_buffer = JITBuffer.new 4096
+asm = AArch64::Assembler.new
 
 # Make some instructions
 asm.movz AArch64::Registers::X0, 0xCAFE
@@ -52,7 +55,7 @@ asm.write_to jit_buffer
 jit_buffer.executable!
 
 # Execute the JIT buffer
-p buffer.to_function([], -Fiddle::TYPE_INT).call.to_s(16) # => f00dcafe
+p jit_buffer.to_function([], -Fiddle::TYPE_INT).call.to_s(16) # => f00dcafe
 ```
 
 You can include `AArch64::Registers` if you don't want to use the DSL, but

data/Rakefile

@@ -166,3 +166,5 @@ Rake::TestTask.new(:test) do |t|
   t.verbose = true
   t.warning = true
 end
+
+task :default => :test

data/lib/aarch64/instructions/adc.rb

@@ -13,7 +13,7 @@ module AArch64
       end
 
       def encode
-        self.ADC(@sf, @rm.to_i, @rn.to_i, @rd.to_i)
+        ADC(@sf, @rm.to_i, @rn.to_i, @rd.to_i)
       end
 
       private

data/lib/aarch64/instructions/adcs.rb

@@ -12,7 +12,7 @@ module AArch64
       end
 
       def encode
-        self.ADCS(@sf, @rm.to_i, @rn.to_i, @rd.to_i)
+        ADCS(@sf, @rm.to_i, @rn.to_i, @rd.to_i)
       end
 
       private

data/lib/aarch64/instructions/add_addsub_ext.rb

@@ -15,7 +15,7 @@ module AArch64
       end
 
       def encode
-        self.ADD_addsub_ext(@sf, @rm.to_i, @extend, @amount, @rn.to_i, @rd.to_i)
+        ADD_addsub_ext(@sf, @rm.to_i, @extend, @amount, @rn.to_i, @rd.to_i)
       end
 
       private

data/lib/aarch64/instructions/and_log_imm.rb

@@ -15,7 +15,7 @@ module AArch64
       end
 
       def encode
-        self.AND_log_imm(@sf, @n, @immr, @imms, @rn.to_i, @rd.to_i)
+        AND_log_imm(@sf, @n, @immr, @imms, @rn.to_i, @rd.to_i)
       end
 
       private

data/lib/aarch64/instructions/ands_log_imm.rb

@@ -15,7 +15,7 @@ module AArch64
       end
 
       def encode
-        self.ANDS_log_imm(@sf, @n, @immr, @imms, @rn.to_i, @rd.to_i)
+        ANDS_log_imm(@sf, @n, @immr, @imms, @rn.to_i, @rd.to_i)
       end
 
       private

data/lib/aarch64/instructions/asrv.rb

@@ -13,7 +13,7 @@ module AArch64
       end
 
       def encode
-        self.ASRV(@sf, @rm.to_i, @rn.to_i, @rd.to_i)
+        ASRV(@sf, @rm.to_i, @rn.to_i, @rd.to_i)
       end
 
       private

data/lib/aarch64/instructions/axflag.rb

@@ -5,12 +5,6 @@ module AArch64
     # AXFLAG
     class AXFLAG
       def encode
-        self.AXFLAG
-      end
-
-      private
-
-      def AXFLAG
         0b1101010100_0_00_000_0100_0000_010_11111
       end
     end

data/lib/aarch64/instructions/cfinv.rb

@@ -5,7 +5,7 @@ module AArch64
     # CFINV
     class CFINV
       def encode
-        self.CFINV
+        CFINV()
       end
 
       private

data/lib/aarch64/instructions/crc32.rb

@@ -16,7 +16,7 @@ module AArch64
       end
 
       def encode
-        self.CRC32(@sf, @rm.to_i, @sz, @rn.to_i, @rd.to_i)
+        CRC32(@sf, @rm.to_i, @sz, @rn.to_i, @rd.to_i)
       end
 
       private

data/lib/aarch64/instructions/crc32c.rb

@@ -16,7 +16,7 @@ module AArch64
       end
 
       def encode
-        self.CRC32C(@sf, @rm.to_i, @sz, @rn.to_i, @rd.to_i)
+        CRC32C(@sf, @rm.to_i, @sz, @rn.to_i, @rd.to_i)
       end
 
       private

data/lib/aarch64/instructions/csdb.rb

@@ -5,14 +5,7 @@ module AArch64
     # CSDB
     class CSDB
       def encode
-        self.CSDB
-      end
-
-      private
-
-      def CSDB
-        insn = 0b1101010100_0_00_011_0010_0010_100_11111
-        insn
+        0b1101010100_0_00_011_0010_0010_100_11111
       end
     end
   end

data/lib/aarch64/instructions/csel.rb

@@ -14,7 +14,7 @@ module AArch64
       end
 
       def encode
-        self.CSEL @sf, @rm.to_i, @cond, @rn.to_i, @rd.to_i
+        CSEL @sf, @rm.to_i, @cond, @rn.to_i, @rd.to_i
       end
 
       private

data/lib/aarch64/instructions/csneg.rb

@@ -14,7 +14,7 @@ module AArch64
       end
 
       def encode
-        self.CSNEG(@sf, @rm.to_i, @cond, @rn.to_i, @rd.to_i)
+        CSNEG(@sf, @rm.to_i, @cond, @rn.to_i, @rd.to_i)
       end
 
       private

data/lib/aarch64/instructions/dcps.rb

@@ -10,7 +10,7 @@ module AArch64
       end
 
       def encode
-        self.DCPS @imm, @ll
+        DCPS(@imm, @ll)
       end
 
       private

data/lib/aarch64/instructions/dgh.rb

@@ -5,14 +5,7 @@ module AArch64
     # DGH
     class DGH
       def encode
-        self.DGH
-      end
-
-      private
-
-      def DGH
-        insn = 0b1101010100_0_00_011_0010_0000_110_11111
-        insn
+        0b1101010100_0_00_011_0010_0000_110_11111
       end
     end
   end

data/lib/aarch64/instructions/dmb.rb

@@ -9,7 +9,7 @@ module AArch64
       end
 
       def encode
-        self.DMB(@imm)
+        DMB(@imm)
       end
 
       private

data/lib/aarch64/instructions/drps.rb

@@ -5,7 +5,7 @@ module AArch64
     # DRPS
     class DRPS
       def encode
-        self.DRPS
+        DRPS()
       end
 
       private

data/lib/aarch64/instructions/dsb.rb

@@ -10,7 +10,7 @@ module AArch64
       end
 
       def encode
-        self.DSB(@imm)
+        DSB(@imm)
       end
 
       private

data/lib/aarch64/instructions/eon.rb

@@ -15,7 +15,7 @@ module AArch64
       end
 
       def encode
-        self.EON(@sf, @shift, @rm.to_i, @imm, @rn.to_i, @rd.to_i)
+        EON(@sf, @shift, @rm.to_i, @imm, @rn.to_i, @rd.to_i)
       end
 
       private

data/lib/aarch64/instructions/eor_log_imm.rb

@@ -15,7 +15,7 @@ module AArch64
       end
 
       def encode
-        self.EOR_log_imm(@sf, @n, @immr, @imms, @rn.to_i, @rd.to_i)
+        EOR_log_imm(@sf, @n, @immr, @imms, @rn.to_i, @rd.to_i)
       end
 
       private

data/lib/aarch64/instructions/eor_log_shift.rb

@@ -15,7 +15,7 @@ module AArch64
       end
 
       def encode
-        self.EOR_log_shift(@sf, @shift, @rm.to_i, @imm6, @rn.to_i, @rd.to_i)
+        EOR_log_shift(@sf, @shift, @rm.to_i, @imm6, @rn.to_i, @rd.to_i)
       end
 
       private

data/lib/aarch64/instructions/eret.rb

@@ -5,7 +5,7 @@ module AArch64
     # ERET
     class ERET
       def encode
-        self.ERET
+        ERET()
       end
 
       private

data/lib/aarch64/instructions/ereta.rb

@@ -10,7 +10,7 @@ module AArch64
       end
 
       def encode
-        self.ERETA(@m)
+        ERETA(@m)
       end
 
       private

data/lib/aarch64/instructions/esb.rb

@@ -5,14 +5,7 @@ module AArch64
     # ESB
     class ESB
       def encode
-        self.ESB
-      end
-
-      private
-
-      def ESB
-        insn = 0b1101010100_0_00_011_0010_0010_000_11111
-        insn
+        0b1101010100_0_00_011_0010_0010_000_11111
       end
     end
   end

data/lib/aarch64/instructions/extr.rb

@@ -14,7 +14,7 @@ module AArch64
       end
 
       def encode
-        self.EXTR(@sf, @sf, @rm.to_i, @lsb, @rn.to_i, @rd.to_i)
+        EXTR(@sf, @sf, @rm.to_i, @lsb, @rn.to_i, @rd.to_i)
       end
 
       private

data/lib/aarch64/instructions/gmi.rb

@@ -11,7 +11,7 @@ module AArch64
       end
 
       def encode
-        self.GMI(@rm.to_i, @rn.to_i, @rd.to_i)
+        GMI(@rm.to_i, @rn.to_i, @rd.to_i)
       end
 
       private

data/lib/aarch64/instructions/hlt.rb

@@ -9,7 +9,7 @@ module AArch64
       end
 
       def encode
-        self.HLT(@imm)
+        HLT(@imm)
       end
 
       private

data/lib/aarch64/instructions/hvc.rb

@@ -9,7 +9,7 @@ module AArch64
       end
 
       def encode
-        self.HVC @imm
+        HVC @imm
       end
 
       private

data/lib/aarch64/instructions/irg.rb

@@ -11,7 +11,7 @@ module AArch64
       end
 
       def encode
-        self.IRG(@rm.to_i, @rn.to_i, @rd.to_i)
+        IRG(@rm.to_i, @rn.to_i, @rd.to_i)
       end
 
       private

data/lib/aarch64/instructions/isb.rb

@@ -9,7 +9,7 @@ module AArch64
       end
 
       def encode
-        self.ISB @imm
+        ISB @imm
       end
 
       private

data/lib/aarch64/instructions/ld64b.rb

@@ -10,7 +10,7 @@ module AArch64
       end
 
       def encode
-        self.LD64B(@rn.to_i, @rt.to_i)
+        LD64B(@rn.to_i, @rt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldadd.rb

@@ -21,7 +21,7 @@ module AArch64
       end
 
       def encode
-        self.LDADD(@size, @a, @r, @rs.to_i, @rn.to_i, @rt.to_i)
+        LDADD(@size, @a, @r, @rs.to_i, @rn.to_i, @rt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldaddb.rb

@@ -16,7 +16,7 @@ module AArch64
       end
 
       def encode
-        self.LDADDB(@a, @r, @rs.to_i, @rn.to_i, @rt.to_i)
+        LDADDB(@a, @r, @rs.to_i, @rn.to_i, @rt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldaddh.rb

@@ -16,7 +16,7 @@ module AArch64
       end
 
       def encode
-        self.LDADDH(@a, @r, @rs.to_i, @rn.to_i, @rt.to_i)
+        LDADDH(@a, @r, @rs.to_i, @rn.to_i, @rt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldapr.rb

@@ -12,7 +12,7 @@ module AArch64
       end
 
       def encode
-        self.LDAPR(@size, @rn.to_i, @rt.to_i)
+        LDAPR(@size, @rn.to_i, @rt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldaprb.rb

@@ -10,7 +10,7 @@ module AArch64
       end
 
       def encode
-        self.LDAPRB(@rn.to_i, @rt.to_i)
+        LDAPRB(@rn.to_i, @rt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldaprh.rb

@@ -10,7 +10,7 @@ module AArch64
       end
 
       def encode
-        self.LDAPRH(@rn.to_i, @rt.to_i)
+        LDAPRH(@rn.to_i, @rt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldapur_gen.rb

@@ -14,7 +14,7 @@ module AArch64
       end
 
       def encode
-        self.LDAPUR_gen(@size, @opc, @simm, @rn.to_i, @rt.to_i)
+        LDAPUR_gen(@size, @opc, @simm, @rn.to_i, @rt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldar.rb

@@ -12,7 +12,7 @@ module AArch64
       end
 
       def encode
-        self.LDAR @size, @rn.to_i, @rt.to_i
+        LDAR(@size, @rn.to_i, @rt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldaxp.rb

@@ -13,7 +13,7 @@ module AArch64
       end
 
       def encode
-        self.LDAXP(@sf, @rt2.to_i, @rn.to_i, @rt1.to_i)
+        LDAXP(@sf, @rt2.to_i, @rn.to_i, @rt1.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldaxr.rb

@@ -12,7 +12,7 @@ module AArch64
       end
 
       def encode
-        self.LDAXR(@size, @rn.to_i, @rt.to_i)
+        LDAXR(@size, @rn.to_i, @rt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldclr.rb

@@ -21,7 +21,7 @@ module AArch64
       end
 
       def encode
-        self.LDCLR(@size, @a, @r, @rs.to_i, @rn.to_i, @rt.to_i)
+        LDCLR(@size, @a, @r, @rs.to_i, @rn.to_i, @rt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldclrb.rb

@@ -17,7 +17,7 @@ module AArch64
       end
 
       def encode
-        self.LDCLRB(@size, @a, @r, @rs.to_i, @rn.to_i, @rt.to_i)
+        LDCLRB(@size, @a, @r, @rs.to_i, @rn.to_i, @rt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldeor.rb

@@ -21,7 +21,7 @@ module AArch64
       end
 
       def encode
-        self.LDEOR(@size, @a, @r, @rs.to_i, @rn.to_i, @rt.to_i)
+        LDEOR(@size, @a, @r, @rs.to_i, @rn.to_i, @rt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldg.rb

@@ -11,7 +11,7 @@ module AArch64
       end
 
       def encode
-        self.LDG(@imm9, @xn.to_i, @xt.to_i)
+        LDG(@imm9, @xn.to_i, @xt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldgm.rb

@@ -10,7 +10,7 @@ module AArch64
       end
 
       def encode
-        self.LDGM(@xn.to_i, @xt.to_i)
+        LDGM(@xn.to_i, @xt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldlar.rb

@@ -12,7 +12,7 @@ module AArch64
       end
 
       def encode
-        self.LDLAR(@size, @rn.to_i, @rt.to_i)
+        LDLAR(@size, @rn.to_i, @rt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldnp_gen.rb

@@ -14,7 +14,7 @@ module AArch64
       end
 
       def encode
-        self.LDNP_gen(@opc, @imm, @rt2.to_i, @rn.to_i, @rt1.to_i)
+        LDNP_gen(@opc, @imm, @rt2.to_i, @rn.to_i, @rt1.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldp_gen.rb

@@ -19,7 +19,7 @@ module AArch64
       end
 
       def encode
-        self.LDP_gen(@opc, @mode, @imm7, @rt2.to_i, @rn.to_i, @rt.to_i)
+        LDP_gen(@opc, @mode, @imm7, @rt2.to_i, @rn.to_i, @rt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldpsw.rb

@@ -15,7 +15,7 @@ module AArch64
       end
 
       def encode
-        self.LDPSW(@mode, @imm7, @rt2.to_i, @rn.to_i, @rt.to_i)
+        LDPSW(@mode, @imm7, @rt2.to_i, @rn.to_i, @rt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldr_imm_gen.rb

@@ -16,7 +16,7 @@ module AArch64
       end
 
       def encode
-        self.LDR_imm_gen(@size, @imm9, @mode, @rn.to_i, @rt.to_i)
+        LDR_imm_gen(@size, @imm9, @mode, @rn.to_i, @rt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldr_imm_unsigned.rb

@@ -13,7 +13,7 @@ module AArch64
       end
 
       def encode
-        self.LDR_imm_gen(@size, @imm12, @rn.to_i, @rt.to_i)
+        LDR_imm_gen(@size, @imm12, @rn.to_i, @rt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldr_lit_gen.rb

@@ -12,7 +12,7 @@ module AArch64
       end
 
       def encode
-        self.LDR_lit_gen(@size, @imm19.to_i / 4, @rt.to_i)
+        LDR_lit_gen(@size, @imm19.to_i / 4, @rt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldr_reg_gen.rb

@@ -15,7 +15,7 @@ module AArch64
       end
 
       def encode
-        self.LDR_reg_gen(@size, @rm.to_i, @option, @s, @rn.to_i, @rt.to_i)
+        LDR_reg_gen(@size, @rm.to_i, @option, @s, @rn.to_i, @rt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldra.rb

@@ -17,7 +17,7 @@ module AArch64
       end
 
       def encode
-        self.LDRA(@m, @s, @imm9, @w, @rn.to_i, @rt.to_i)
+        LDRA(@m, @s, @imm9, @w, @rn.to_i, @rt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldrb_imm.rb

@@ -14,7 +14,7 @@ module AArch64
       end
 
       def encode
-        self.LDRB_imm(@imm9, @option, @rn.to_i, @rt.to_i)
+        LDRB_imm(@imm9, @option, @rn.to_i, @rt.to_i)
       end
 
       private

data/lib/aarch64/instructions/ldrb_reg.rb

@@ -14,7 +14,7 @@ module AArch64
       end
 
       def encode
-        self.LDRB_reg(@rm.to_i, @option, @s, @rn.to_i, @rt.to_i)
+        LDRB_reg(@rm.to_i, @option, @s, @rn.to_i, @rt.to_i)
       end
 
       private