HDLRuby 3.9.5 → 3.9.6

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data/README.md

@@ -475,7 +475,7 @@ These include:
 
 * `hif` / `helsif` / `helse` for `if`-like conditionals
 
-* `hcase` / `hwhen` / `helse` for `case`-like conditionals
+* `hcase` / `hcasez` / `hwhen` / `helse` for `case`-like conditionals
 
 * `mux`, an expression-level construct for multiplexers, which supports multiple inputs, unlike the ?: ternary operator in Verilog, which only handles two
 
@@ -1793,7 +1793,7 @@ The behavior of an assignment statement depends on the execution mode of the enc
 
 ### Control Statements
 
-There are two types of control statements in HDLRuby: the hardware if (`hif`) and the hardware case (`hcase`).
+There are two types of control statements in HDLRuby: the hardware if (`hif`) the hardware case (`hcase`), and the hardware case with wildcards (`hcasez`).
 
 #### hif
 
@@ -1820,6 +1820,30 @@ end
 ...
 ```
 
+#### hcasez
+
+The `hcasez` construct consists of an expression and a list of value-block pairs. A block is executed when its corresponding value matches the value of the `hcasez` expression. If the value contains wildcard digits represented by a `z` they match any corresponding digit. It is declared as follows:
+
+```ruby
+hcasez <expression>
+hwhen <value 0> do
+   <block contents 0>
+end
+hwhen <value 1> do
+   <block contents 1>
+end
+...
+```
+
+As an example of wildcard, the following statement will be executed if val is equal to 5 or 7:
+
+```ruby
+hcasez val
+hwhen _b01z1 do
+   <block contents 0>
+end
+```
+
 #### helse
 
 You can add a block that is executed when the condition of an `hif` is not met, or when no case in an hcase matches, using the `helse` keyword:

data/ext/hruby_sim/hruby_rcsim_build.c

@@ -659,6 +659,28 @@ VALUE rcsim_make_hcase(VALUE mod, VALUE valueV, VALUE defoltV) {
     return res;
 }
 
+/* Creating a hardware casez C object. */
+VALUE rcsim_make_hcasez(VALUE mod, VALUE valueV, VALUE defoltV) {
+    // printf("rcsim_make_hcasez\n");
+    /* Allocates the hardware case. */
+    HCaseZ hcasez = (HCaseZ)malloc(sizeof(HCaseZS));
+    // printf("hcasez=%p\n",hcasez);
+    /* Set it up. */
+    hcasez->kind = HCASEZ;
+    hcasez->owner = NULL;
+    value_to_rcsim(ExpressionS,valueV,hcasez->value);
+    hcasez->num_whens = 0;
+    hcasez->matches = NULL;
+    hcasez->stmnts = NULL;
+    if (TYPE(defoltV) == T_NIL)
+        hcasez->defolt = NULL;
+    else
+        value_to_rcsim(StatementS,defoltV,hcasez->defolt);
+    /* Returns the C hardware case embedded into a ruby VALUE. */
+    VALUE res;
+    rcsim_to_value(HCaseZS,hcasez,res);
+    return res;
+}
 
 /* Creating a block C object. */
 VALUE rcsim_make_block(VALUE mod, VALUE modeV) {
@@ -1927,6 +1949,7 @@ void Init_hruby_sim() {
     rb_define_singleton_method(mod,"rcsim_make_timeTerminate",rcsim_make_timeTerminate,0);
     rb_define_singleton_method(mod,"rcsim_make_hif",rcsim_make_hif,3);
     rb_define_singleton_method(mod,"rcsim_make_hcase",rcsim_make_hcase,2);
+    rb_define_singleton_method(mod,"rcsim_make_hcasez",rcsim_make_hcasez,2);
     rb_define_singleton_method(mod,"rcsim_make_block",rcsim_make_block,1);
     rb_define_singleton_method(mod,"rcsim_make_value_numeric",rcsim_make_value_numeric,2);
     rb_define_singleton_method(mod,"rcsim_make_value_numeric_63one",rcsim_make_value_numeric_63one,2);

data/ext/hruby_sim/hruby_sim.h

@@ -27,6 +27,7 @@ typedef struct TransmitS_ TransmitS;
 typedef struct PrintS_ PrintS;
 typedef struct HIfS_ HIfS;
 typedef struct HCaseS_ HCaseS;
+typedef struct HCaseZS_ HCaseZS;
 typedef struct TimeWaitS_ TimeWaitS;
 typedef struct TimeRepeatS_ TimeRepeatS;
 typedef struct TimeTerminateS_ TimeTerminateS;
@@ -63,6 +64,7 @@ typedef struct TransmitS_* Transmit;
 typedef struct PrintS_* Print;
 typedef struct HIfS_* HIf;
 typedef struct HCaseS_* HCase;
+typedef struct HCaseZS_* HCaseZ;
 typedef struct TimeWaitS_* TimeWait;
 typedef struct TimeRepeatS_* TimeRepeat;
 typedef struct TimeTerminateS_* TimeTerminate;
@@ -91,7 +93,7 @@ typedef enum {
 #endif
     OBJECT, SYSTEMT, SIGNALI, SCOPE, BEHAVIOR, SYSTEMI, CODE, BLOCK, EVENT,
 #ifdef RCSIM
-    /* Statements */  TRANSMIT, PRINT, HIF, HCASE, 
+    /* Statements */  TRANSMIT, PRINT, HIF, HCASE, HCASEZ,
                       TIME_WAIT, TIME_REPEAT, TIME_TERMINATE,
     /* Expressions */ UNARY, BINARY, SELECT, CONCAT, CAST,
     /* References */  REF_OBJECT, REF_INDEX, REF_RANGE, REF_CONCAT,
@@ -300,6 +302,13 @@ Value shift_right_value(Value src0, Value src1, Value dst);
  *  @return dst */
 extern Value equal_value(Value src0, Value src1, Value dst);
 
+/** Computes the equal (NXOR) of two values treating Z as wildcards.
+ *  @param src0 the first source value of the comparison
+ *  @param src1 the second source value of the comparison
+ *  @param dst the destination value
+ *  @return dst */
+extern Value equal_value_z(Value src0, Value src1, Value dst);
+
 /** Computes the C equal of two general values.
  *  @param src0 the first source value of the addition
  *  @param src1 the second source value of the addition
@@ -307,6 +316,13 @@ extern Value equal_value(Value src0, Value src1, Value dst);
  *  @return the destination value */
 extern Value equal_value_c(Value src0, Value src1, Value dst);
 
+/** Computes the C equal of two general values treating Z as wildcards.
+ *  @param src0 the first source value of the addition
+ *  @param src1 the second source value of the addition
+ *  @param dst the destination value
+ *  @return the destination value */
+extern Value equal_value_z_c(Value src0, Value src1, Value dst);
+
 /** Computes the C not equal of two general values.
  *  @param src0 the first source value of the addition
  *  @param src1 the second source value of the addition
@@ -701,6 +717,18 @@ typedef struct HCaseS_ {
     Statement defolt;   /* The default statement. */
 } HCaseS;
 
+/** The C model of a hardware casez statement. */
+typedef struct HCaseZS_ {
+    Kind kind;          /* The kind of object. */
+    Object owner;       /* The owner of the object if any. */
+
+    Expression value;   /* The value to match. */
+    int num_whens;      /* The number of possible cases. */
+    Expression* matches;/* The cases matching values. */
+    Statement* stmnts;  /* The corresponding statements. */
+    Statement defolt;   /* The default statement. */
+} HCaseZS;
+
 /** The C model of a time wait statement. */
 typedef struct TimeWaitS_ {
     Kind kind;          /* The kind of object. */

data/ext/hruby_sim/hruby_sim_calc.c

@@ -1733,44 +1733,44 @@ static Value shift_right_value_bitstring(Value src0, Value src1, Value dst) {
 }
 
 
-/** Computes the equal (!XOR) of two bitstring values.
+/** computes the equal (!xor) of two bitstring values.
  *  @param src0 the first source value of the and
  *  @param src1 the second source value of the and
  *  @param dst the destination value
  *  @return dst */
 static Value equal_value_bitstring(Value src0, Value src1, Value dst) {
     // printf("equal_value_bitstring.\n");
-    /* Compute the width of sources in bits. */
+    /* compute the width of sources in bits. */
     unsigned long long width0 = type_width(src0->type);
     unsigned long long width1 = type_width(src1->type);
 
-    /* Update the destination capacity if required. */
+    /* update the destination capacity if required. */
     resize_value(dst,width0);
-    /* Set the type and size of the destination from the type of the source.*/
+    /* set the type and size of the destination from the type of the source.*/
     dst->type = src0->type;
     dst->numeric = 0;
 
-    /* Get access to the data of the sources. */
+    /* get access to the data of the sources. */
     char *src0_data = src0->data_str;
     char *src1_data = src1->data_str;
-    /* Get access to the data of the destination. */
+    /* get access to the data of the destination. */
     char *dst_data = dst->data_str;
 
-    /* Get the sign extension character of source 1 and convert it to a bit.*/
+    /* get the sign extension character of source 1 and convert it to a bit.*/
     int ext = bitstring_ext(src1);
 
-    /* Perform the !xor. */
+    /* perform the !xor. */
     unsigned long long count;
-    /* Check if values are the same. */
+    /* check if values are the same. */
     char same = '1';
     for(count = 0; count < width0; ++count) {
-        char d0 = src0_data[count] - '0'; /* Get and convert to bit. */
+        char d0 = src0_data[count] - '0'; /* get and convert to bit. */
         char d1;
         if (count < width1) {
-            /* Still within source 1. */
-            d1 = src1_data[count] - '0';/* Get and convert to bit. */
+            /* still within source 1. */
+            d1 = src1_data[count] - '0';/* get and convert to bit. */
         } else {
-            /* Outside source 1, use the sign extension. */
+            /* outside source 1, use the sign extension. */
             d1 = ext;
         }
         if (d0 == (d0&1)) {
@@ -1782,22 +1782,98 @@ static Value equal_value_bitstring(Value src0, Value src1, Value dst) {
                     break;
                 }
             } else  {
-                /* Undefined. */
+                /* undefined. */
                 same = 'x';
                 break;
             }
         } else {
-            /* Undefined. */
+            /* undefined. */
             same = 'x';
             break;
         }
     }
-    /* Set the destination to 0 or 1 depending of different. */
+    /* set the destination to 0 or 1 depending of different. */
     dst_data[0] = same;
     for(count = 1; count < width0; ++count) {
         dst_data[count] = '0';
     }
-    /* Return the destination. */
+    /* return the destination. */
+    return dst;
+}
+
+/** computes the equal (!xor) of two bitstring values treating Z as wildcard.
+ *  @param src0 the first source value of the and
+ *  @param src1 the second source value of the and
+ *  @param dst the destination value
+ *  @return dst */
+static Value equal_value_z_bitstring(Value src0, Value src1, Value dst) {
+    // printf("equal_value_bitstring.\n");
+    /* compute the width of sources in bits. */
+    unsigned long long width0 = type_width(src0->type);
+    unsigned long long width1 = type_width(src1->type);
+
+    /* update the destination capacity if required. */
+    resize_value(dst,width0);
+    /* set the type and size of the destination from the type of the source.*/
+    dst->type = src0->type;
+    dst->numeric = 0;
+
+    /* get access to the data of the sources. */
+    char *src0_data = src0->data_str;
+    char *src1_data = src1->data_str;
+    /* get access to the data of the destination. */
+    char *dst_data = dst->data_str;
+
+    /* get the sign extension character of source 1 and convert it to a bit.*/
+    int ext = bitstring_ext(src1);
+
+    /* perform the !xor. */
+    unsigned long long count;
+    /* check if values are the same. */
+    char same = '1';
+    for(count = 0; count < width0; ++count) {
+        char d0 = src0_data[count] - '0'; /* get and convert to bit. */
+        char d1;
+        if (d0 == 'z' - '0' || d0 == 'Z' - '0') {
+            /* Z is wildcard, so same. */
+            continue;
+        }
+        if (count < width1) {
+            /* still within source 1. */
+            d1 = src1_data[count] - '0';/* get and convert to bit. */
+        } else {
+            /* outside source 1, use the sign extension. */
+            d1 = ext;
+        }
+        if (d1 == 'z' - '0' || d1 == 'Z' - '0') {
+            /* Z is wildcard, so same. */
+            continue;
+        }
+        if (d0 == (d0&1)) {
+            /* d0 is defined. */
+            if (d1 == (d1&1)) {
+                /* d1 is also defined. */
+                if (d0 != d1) {
+                    same = '0';
+                    break;
+                }
+            } else  {
+                /* undefined. */
+                same = 'x';
+                break;
+            }
+        } else {
+            /* undefined. */
+            same = 'x';
+            break;
+        }
+    }
+    /* set the destination to 0 or 1 depending of different. */
+    dst_data[0] = same;
+    for(count = 1; count < width0; ++count) {
+        dst_data[count] = '0';
+    }
+    /* return the destination. */
     return dst;
 }
 
@@ -3299,7 +3375,7 @@ Value shift_right_value(Value src0, Value src1, Value dst) {
 }
 
 
-/** Computes the equal (!XOR) of two general values.
+/** Computes the equal (NXOR) of two general values.
  *  @param src0 the first source value of the addition
  *  @param src1 the second source value of the addition
  *  @param dst the destination value
@@ -3336,6 +3412,43 @@ Value equal_value(Value src0, Value src1, Value dst) {
     return dst;
 }
 
+/** Computes the equal (NXOR) of two general values.
+ *  @param src0 the first source value of the addition
+ *  @param src1 the second source value of the addition
+ *  @param dst the destination value
+ *  @return the destination value */
+Value equal_value_z(Value src0, Value src1, Value dst) {
+    // printf("equal_value.\n");
+    /* Might allocate a new value so save the current pool state. */
+    unsigned int pos = get_value_pos();
+    /* Do a numeric computation if possible, otherwise fallback to bitstring
+     * computation. */
+    if (src0->numeric) {
+        if (src1->numeric) {
+            // printf("numeric numeric\n");
+            /* Both sources are numeric. */
+            return equal_value_numeric(src0,src1,dst);
+        } else {
+            // printf("numeric bitstring\n");
+            /* src1 is not numeric, convert src0 to bitstring. */
+            src0 = set_bitstring_value(src0,get_value());
+        }
+    } else {
+        /* src0 is not numeric, what about src1. */
+        if (src1->numeric) {
+            // printf("bitstring numeric\n");
+            /* src1 is numeric, convert it to bitstring. */
+            src1 = set_bitstring_value(src1,get_value());
+        }
+    }
+    /* The sources cannot be numeric, compute bitsitrings. */
+    dst = equal_value_z_bitstring(src0,src1,dst);
+    /* Restores the pool of values. */
+    set_value_pos(pos);
+    /* Return the destination. */
+    return dst;
+}
+
 
 /** Computes the C equal of two general values.
  *  @param src0 the first source value of the addition
@@ -3347,6 +3460,16 @@ Value equal_value_c(Value src0, Value src1, Value dst) {
     return reduce_or_value(dst,dst);
 }
 
+/** Computes the C equal of two general values treating Z as wildcards.
+ *  @param src0 the first source value of the addition
+ *  @param src1 the second source value of the addition
+ *  @param dst the destination value
+ *  @return the destination value */
+Value equal_value_z_c(Value src0, Value src1, Value dst) {
+    dst = equal_value_z(src0,src1,dst);
+    return reduce_or_value(dst,dst);
+}
+
 
 /** Computes the C not equal of two general values.
  *  @param src0 the first source value of the addition

data/ext/hruby_sim/hruby_sim_tree_calc.c

@@ -471,6 +471,43 @@ void execute_statement(Statement stmnt, int mode, Behavior behavior) {
                 }
                 break;
             }
+        case HCASEZ:
+            {
+                HCaseZ hcasez = (HCaseZ)stmnt;
+                /* Calculation the value to check. */
+                // Value value = calc_expression(hcasez->value);
+                Value value = get_value();
+                value = calc_expression(hcasez->value,value);
+                /* Tell if a casez if matched. */
+                int met = 0;
+                /* Check each case. */
+                Value cmp = get_value();
+                for(int i=0; i<hcasez->num_whens; ++i) {
+                    // cmp = equal_value_z_c(value,calc_expression(hcasez->matches[i]),
+                    //         cmp);
+                    Value match = get_value();
+                    match = calc_expression(hcasez->matches[i],match);
+                    cmp = equal_value_z_c(value,match,cmp);
+                    if (is_defined_value(cmp) && value2integer(cmp)) {
+                        /* Found the right case, execute the corresponding
+                         * statement. */
+                        execute_statement(hcasez->stmnts[i],mode,behavior);
+                        /* And remeber it. */
+                        met = 1;
+                        free_value();
+                        break;
+                    }
+                    free_value();
+                }
+                free_value();
+                free_value();
+                /* Was no case found and is there a default statement? */
+                if (!met && hcasez->defolt) {
+                    /* Yes, execute the default statement. */
+                    execute_statement(hcasez->defolt,mode,behavior);
+                }
+                break;
+            }
         case TIME_WAIT:
             {
                 /* Get the value of the delay. */

data/lib/HDLRuby/hdr_samples/case_bench.rb

@@ -1,4 +1,4 @@
-# Test the comparison operators.
+# Test the case.
 
 # A benchmark for the case statement.
 system :case_bench do

data/lib/HDLRuby/hdr_samples/logic_bench.rb

@@ -2,25 +2,25 @@
 # A benchmark for the logic operations.
 system :logic_bench do
     [3].inner :x,:y
-    [3].inner :s_not, :s_and, :s_or, :s_xor, :s_nxor
+    [3].inner :s_not, :s_and, :s_or, :s_xor, :s_eq
     
     signed[16].inner :a,:b,:shl,:shr
 
     timed do
         8.times do |i|
             8.times do |j|
-                x      <= i
-                y      <= j
-                s_not  <= ~x
-                s_and  <= x & y
-                s_or   <= x | y
-                s_xor  <= x ^ y
-                s_nxor <= (x == y)
+                x     <= i
+                y     <= j
+                s_not <= ~x
+                s_and <= x & y
+                s_or  <= x | y
+                s_xor <= x ^ y
+                s_eq  <= (x == y)
                 !10.ns
-                a      <= i
-                b      <= j
-                shl    <= (a << b)
-                shr    <= (a >> b)
+                a     <= i
+                b     <= j
+                shl   <= (a << b)
+                shr   <= (a >> b)
             end
         end
     end

data/lib/HDLRuby/hdr_samples/with_assign_to_slice.rb

@@ -0,0 +1,19 @@
+system :assign_to_slice do
+  [8].inner :reg
+
+  timed do
+    !10.ns
+    reg[1..0] <= _b00
+    !10.ns
+    reg[3..2] <= _b01
+    !10.ns
+    reg[5..4] <= _b10
+    !10.ns
+    reg[7..6] <= _b11
+    !10.ns
+    reg[3..0] <= _ha
+    !10.ns
+    reg[7..4] <= _h5
+    !10.ns
+  end
+end

data/lib/HDLRuby/hdr_samples/with_casez.rb

@@ -0,0 +1,35 @@
+# Test the casez statement.
+
+# A benchmark for the case statement.
+system :case_bench do
+    [8].inner :x, :z
+
+    par do
+        hcasez(x)
+        hwhen(_b0000_0000)  { z <= 0 }
+        hwhen(_b000z_0001)  { z <= 1 }
+        hwhen(_b00z0_0010)  { z <= 4 }
+        hwhen(_b00zz_0011)  { z <= 9 }
+        hwhen(_b0z00_0100)  { z <= 16 }
+        hwhen(_b0z0z_0101)  { z <= 25 }
+        hwhen(_b0zz0_0110)  { z <= 36 }
+        hwhen(_b0zzz_0111)  { z <= 49 }
+        hwhen(_bz000_1000)  { z <= 64 }
+        hwhen(_bz00z_1001)  { z <= 81 }
+        hwhen(_bz0z0_1010) { z <= 100 }
+        hwhen(_bz0zz_1011) { z <= 121 }
+        hwhen(_bzz00_1100) { z <= 144 }
+        hwhen(_bzz0z_1101) { z <= 169 }
+        hwhen(_bzzz0_1110) { z <= 196 }
+        hwhen(_bzzzz_1111) { z <= 225 }
+        helse    { z <= _zzzzzzzz }
+    end
+
+    timed do
+        !10.ns
+        20.times do |i|
+            x <= i
+            !10.ns
+        end
+    end
+end

data/lib/HDLRuby/hdr_samples/with_henumerable.rb

@@ -344,7 +344,7 @@ system :henmerable_checks do
 
   par(clk.posedge) do
     # hprint("}0\n")
-    vals.hzip([_h12]*8).each_with_index { |(a,b),i| res62[i] <= a+b }
+    vals.hzip([_h12]*8).heach_with_index { |(a,b),i| res62[i] <= a+b }
   end
 
   # Test enumerators of values.

data/lib/HDLRuby/hruby_high.rb

@@ -777,7 +777,6 @@ module HDLRuby::High
         #       registered in the namespace stack, and one for creating an
         #       array of instances being registered in the Array class.
         def make_instantiater(name,klass,&ruby_block)
-            # puts "make_instantiater with name=#{name}"
             # Set the instanciater.
             @instance_procs = [ ruby_block ]
             # Set the target instantiation class.
@@ -794,7 +793,8 @@ module HDLRuby::High
                 # If no arguments, return the system as is
                 return obj if args.empty?
                 # Are there any generic arguments?
-                if ruby_block.arity > 0 then
+                if ruby_block.arity > 0 or args.size > 1 or args[0].is_a?(Hash) then
+                # if ruby_block.parameters.size > 0 then
                     # Yes, must specialize the system with the arguments.
                     # If arguments, create a new system specialized with them
                     return SystemT.new(:"") { include(obj,*args) }
@@ -1435,7 +1435,8 @@ module HDLRuby::High
             return if self.metaif(condition,&ruby_block)
             # Ensure there is a block.
             ruby_block = proc {} unless block_given?
-            self.par do
+            # self.par do
+            self.seq do # Seq for combinatorial is good practice
               hif(condition,mode,&ruby_block)
             end
         end
@@ -1491,11 +1492,40 @@ module HDLRuby::High
         #  * a new behavior is created to enclose the hcase.
         def hcase(value)
             return if self.metacase(value)
-            self.par do
+            # self.par do
+            self.seq do # Seq for combinatorial is good practice
                 hcase(value)
             end
         end
 
+        # Creates a new case statement taking z was wildcard with a +value+ used for deciding which
+        # block to execute.
+        #
+        # NOTE: 
+        #  * the when part is defined through the hwhen method.
+        #  * a new behavior is created to enclose the hcase.
+        def hcasez(value)
+            return if self.metacase(value)
+            # self.par do
+            self.seq do # Seq for combinatorial is good practice
+                hcasez(value)
+            end
+        end
+
+        # Creates a new case statement taking z as wildcards with a +value+ used for deciding which
+        # block to execute.
+        #
+        # NOTE: 
+        #  * the when part is defined through the hwhen method.
+        #  * a new behavior is created to enclose the hcase.
+        def hcasez(value)
+            return if self.metacase(value)
+            # self.par do
+            self.seq do # Seq for combinatorial is good practice
+                hcasez(value)
+            end
+        end
+
         # Sets the block of a case structure executed when the +match+ is met
         # to the block in +mode+ generated by the execution of +ruby_block+.
         #
@@ -2337,6 +2367,7 @@ module HDLRuby::High
             end
             define_singleton_method(name.to_sym) do |*args|
                 if (args.size < ruby_block.arity) then
+                # if (args.size < ruby_block.parameters.size) then
                     # Not enough arguments get generic type as is.
                     type
                 else
@@ -2350,6 +2381,7 @@ module HDLRuby::High
         else
             define_method(name.to_sym) do |*args|
                 if (args.size < ruby_block.arity) then
+                # if (args.size < ruby_block.parameters.size) then
                     # Not enough arguments, get generic type as is.
                     type
                 else
@@ -2368,7 +2400,7 @@ module HDLRuby::High
     def system(name = :"", *includes, &ruby_block)
         # Ensure there is a block.
         ruby_block = proc {} unless block_given?
-        # print "system ruby_block=#{ruby_block}\n"
+        # print "system name=#{name} ruby_block=#{ruby_block}\n"
         # Creates the resulting system.
         return SystemT.new(name,*includes,&ruby_block)
     end
@@ -2523,6 +2555,9 @@ module HDLRuby::High
                 connects.each do |key,value|
                     # Gets the signal corresponding to connect.
                     signal = self.systemT.get_signal_with_included(key)
+                    unless signal then
+                      raise AnyError, "Invalid parameter: #{key}"
+                    end
                     # Check if it is an output.
                     isout = self.systemT.get_output_with_included(key)
                     # Convert it to a reference.
@@ -2826,7 +2861,7 @@ module HDLRuby::High
             obj = self
             ::HDLRuby::High.cur_block.delete_statement!(obj)
             # Handles the metaprogramming.
-            return obj if self.metaif(condition,proc { add_statement(obj) })
+            return obj if self.metaif(condition) { add_statement(obj) }
             # Creates the if statement.
             stmnt = If.new(condition) { add_statement(obj) }
             # Add it to the current block.
@@ -2935,9 +2970,11 @@ module HDLRuby::High
 
         # Creates a new case statement with a +value+ that decides which
         # block to execute.
-        def initialize(value)
+        # +mode+ is the mode the case should run in. For now there are 
+        # only two possiblities: normal case :"", and casez :casez
+        def initialize(value, mode = :"")
             # Create the yes block.
-            super(value.to_expr)
+            super(value.to_expr, mode)
         end
 
         # Sets the block executed in +mode+ when the value matches +match+.
@@ -2969,7 +3006,7 @@ module HDLRuby::High
         # Converts the case to HDLRuby::Low.
         def to_low
             # Create the low level case.
-            caseL = HDLRuby::Low::Case.new(@value.to_low)
+            caseL = HDLRuby::Low::Case.new(@value.to_low,@mode)
             # # For debugging: set the source high object 
             # caseL.properties[:low2high] = self.hdr_id
             # self.properties[:high2low] = caseL
@@ -3185,12 +3222,12 @@ module HDLRuby::High
 
         # Extends on the left to +n+ bits filling with +v+ bit values.
         def ljust(n,v)
-            return [(v.to_s * (n-self.width)).to_expr, self]
+          return [(v.to_s * (n-self.width)).to_value, self].to_expr
         end
 
         # Extends on the right to +n+ bits filling with +v+ bit values.
         def rjust(n,v)
-            return [self, (v.to_s * (n-self.width)).to_expr]
+          return [self, (v.to_s * (n-self.width)).to_value].to_expr
         end
 
         # Extends on the left to +n+ bits filling with 0.
@@ -3200,7 +3237,8 @@ module HDLRuby::High
 
         # Extends on the left to +n+ bits preserving the signe.
         def sext(n)
-            return self.ljust(self[-1])
+            # return self.ljust(n,self[-1])
+          return self.as(HDLRuby::High.top_user.signed[self.type.width]).as(HDLRuby::High.top_user.signed[n])
         end
 
         # # Match the type with +typ+:
@@ -3741,6 +3779,9 @@ module HDLRuby::High
         # Creates a new reference from a +base+ reference and named +object+.
         def initialize(base,object)
             # puts "New RefObjet with base=#{base}, object=#{object}"
+            unless object
+              raise AnyError, "Empty object for reference."
+            end
             if object.respond_to?(:type) then
                 # Typed object, so typed reference.
                 super(object.type)
@@ -4636,6 +4677,16 @@ module HDLRuby::High
             self.add_statement(Case.new(value))
         end
 
+        # Creates a new case statement taking z as wildcard with a +value+ used for deciding which
+        # block to execute.
+        #
+        # NOTE: the when part is defined through the hwhen method.
+        def hcasez(value)
+            return if self.metacase(value)
+            # Creates the case statement.
+            self.add_statement(Case.new(value, :casez))
+        end
+
         # Sets the block of a case structure executed when the +match+ is met
         # to the block in +mode+ generated by the execution of +ruby_block+.
         #
@@ -5247,6 +5298,7 @@ module HDLRuby::High
     class ::Float
         # Converts to a new high-level expression.
         def to_expr
+          raise "Float not supported yet."
             return Value.new(Real,self)
         end
 
@@ -5399,6 +5451,38 @@ module HDLRuby::High
             expr
         end
 
+        # Casts to +typ+.
+        def as(typ)
+          return self.to_expr.as(typ)
+        end
+
+        # Converts to a bit vector.
+        def to_bit
+          return self.to_expr.to_bit
+        end
+
+        # Casts to an unsigned bit vector type.
+        def to_unsigned
+          return self.to_bit.to_unsigned
+        end
+
+        # Casts to a signed bit vector type.
+        def to_signed
+            return self.to_bit_to_signed
+        end
+
+        # Extends on the left to +n+ bits filling with 0.
+        def zext(n)
+          return self.to_bit.zext(n)
+        end
+
+        # Extends on the left to +n+ bits preserving the signe.
+        def sext(n)
+          return self.to_bit.sext(n)
+        end
+
+        # Add the methods of HExpression
+
         # Converts to a new high-level reference.
         def to_ref
             expr = RefConcat.new(TypeTuple.new(:"",:little,*self.map do |elem|
@@ -5467,6 +5551,17 @@ module HDLRuby::High
             end
         end
 
+        # Creates a hcase statement taking z as wildcard executing +ruby_block+ on the element of
+        # the array selected by +value+
+        def hcasez(value,&ruby_block)
+            # Ensure there is a block.
+            ruby_block = proc {} unless block_given?
+            High.cur_block.hcasez(value)
+            self.each.with_index do |elem,i|
+                High.cur_block.hwhen(i) { ruby_block.call(elem) }
+            end
+        end
+
         # Moved to HArrow.
         # # Add support of the left arrow operator.
         # def <=(expr)
@@ -5792,6 +5887,20 @@ def self.configure_high
     end
 
 
+
+    ## Handling the properties that can be added to HDLRuby objects.
+
+    ## Add to object +obj+, property +prop+.
+    def self.add_property(obj,prop)
+      HDLRuby::Low.add_property(obj,prop)
+    end
+
+    ## Iterate on the properties of object +obj+.
+    def self.each_property(obj,&ruby_block)
+      HDLRuby::Low.each_property(obj,&ruby_block)
+    end
+
+
 end
 
 

data/lib/HDLRuby/hruby_low.rb

@@ -36,8 +36,6 @@ module HDLRuby::Low
     end
 
 
-    # Hdecorator = HDLRuby::Hdecorator
-
     ##
     # Gives parent definition and access properties to an hardware object.
     module Hparent
@@ -162,9 +160,6 @@ module HDLRuby::Low
             end
         end
 
-        # # Add decorator capability (modifies intialize to put after).
-        # include Hdecorator
-
         # Comparison for hash: structural comparison.
         def eql?(obj)
             return false unless obj.is_a?(SystemT)
@@ -529,9 +524,6 @@ module HDLRuby::Low
             @behaviors = []
         end
 
-        # # Add decorator capability (modifies intialize to put after).
-        # include Hdecorator
-
         # Comparison for hash: structural comparison.
         def eql?(obj)
             return false unless obj.is_a?(Scope)
@@ -1293,8 +1285,11 @@ module HDLRuby::Low
             @name = name.to_sym
         end
 
-        # # Add decorator capability (modifies intialize to put after).
-        # include Hdecorator
+        # Converts the system to HDLRuby::Low.
+        # Here already low.
+        def to_low
+          return self
+        end
 
         # Comparison for hash: structural comparison.
         def eql?(obj)
@@ -1989,6 +1984,11 @@ module HDLRuby::Low
             return true
         end
 
+        # Gets thebitwidth
+        def width
+          return self.reduce(0) {|sum,elem| sum + elem.width }
+        end
+
         # Hash function.
         def hash
             return [super,@types].hash
@@ -2330,9 +2330,6 @@ module HDLRuby::Low
             # @block = block
         end
 
-        # # Add decorator capability (modifies intialize to put after).
-        # include Hdecorator
-
         # Sets the block if not already set.
         def block=(block)
             # Check the block.
@@ -2561,9 +2558,6 @@ module HDLRuby::Low
             ref.parent = self
         end
 
-        # # Add decorator capability (modifies intialize to put after).
-        # include Hdecorator
-
         # Comparison for hash: structural comparison.
         def eql?(obj)
             return false unless obj.is_a?(Event)
@@ -2698,9 +2692,6 @@ module HDLRuby::Low
             @signals.each(&ruby_block) if @signals
         end
 
-        # # Add decorator capability (modifies intialize to put after).
-        # include Hdecorator
-
         # Iterates over each object deeply.
         #
         # Returns an enumerator if no ruby block is given.
@@ -2783,9 +2774,6 @@ module HDLRuby::Low
             @systemTs = [ @systemT ]
         end
 
-        # # Add decorator capability (modifies intialize to put after).
-        # include Hdecorator
-
         # Iterates over each object deeply.
         #
         # Returns an enumerator if no ruby block is given.
@@ -2919,9 +2907,6 @@ module HDLRuby::Low
             lumps.each { |lump| self.add_lump(lump) }
         end
 
-        # # Add decorator capability (modifies intialize to put after).
-        # include Hdecorator
-
         # Adds a +lump+ of code, it is ment to become an expression or
         # some text.
         def add_lump(lump)
@@ -3101,9 +3086,6 @@ module HDLRuby::Low
             @chunks = HashName.new
         end
 
-        # # Add decorator capability (modifies intialize to put after).
-        # include Hdecorator
-
         # Adds a +chunk+ to the sensitivity list.
         def add_chunk(chunk)
             # Check and add the chunk.
@@ -3212,7 +3194,6 @@ module HDLRuby::Low
     # NOTE: this is an abstract class which is not to be used directly.
     class Statement
         include Hparent
-        # include Hdecorator
         
         # Clones (deeply)
         def clone
@@ -3700,9 +3681,6 @@ module HDLRuby::Low
             match.parent = statement.parent = self
         end
 
-        # # Add decorator capability (modifies intialize to put after).
-        # include Hdecorator
-
         # Iterates over each object deeply.
         #
         # Returns an enumerator if no ruby block is given.
@@ -3818,15 +3796,18 @@ module HDLRuby::Low
         attr_reader :default
 
         # Creates a new case statement whose excution flow is decided from
-        # +value+ with a possible cases given in +whens+ and +default
-        # + (can be set later)
-        def initialize(value, default = nil, whens = [])
+        # +value+ with a possible cases given in +whens+ and +default+
+        # (can be set later)
+        # +mode+ is the mode the case should run in. For now there are two
+        # possible modes: normal case :"", and in a mode where z are taken as wildcards :casez.
+        def initialize(value, mode = :"", default = nil, whens = [])
             # Check and set the value.
             unless value.is_a?(Expression)
                 raise AnyError, "Invalid class for a value: #{value.class}"
             end
             super()
             @value = value
+            @mode = mode.to_sym
             # And set its parent.
             value.parent = self
             # Checks and set the default case if any.
@@ -3994,7 +3975,7 @@ module HDLRuby::Low
             # Clone the default if any.
             default = @default ? @default.clone : nil
             # Clone the case.
-            return Case.new(@value.clone,default,(@whens.map do |w|
+            return Case.new(@value.clone,@mode,default,(@whens.map do |w|
                 w.clone
             end) )
         end
@@ -4025,9 +4006,6 @@ module HDLRuby::Low
             @unit = unit.to_sym
         end
 
-        # # Add decorator capability (modifies intialize to put after).
-        # include Hdecorator
-
         # Iterates over each object deeply.
         #
         # Returns an enumerator if no ruby block is given.
@@ -4918,8 +4896,10 @@ module HDLRuby::Low
             end
         end
 
-        # # Add decorator capability (modifies intialize to put after).
-        # include Hdecorator
+        # Gets the bit width of the expression.
+        def width
+            return @type.width
+        end
 
         # Comparison for hash: structural comparison.
         def eql?(obj)
@@ -5023,6 +5003,7 @@ module HDLRuby::Low
 
         # Creates a new value typed +type+ and containing +content+.
         def initialize(type,content)
+            # puts "New value with content=#{content} (content.class=#{content.class})"
             super(type)
             if content.nil? then
                 # Handle the nil content case.
@@ -5041,7 +5022,11 @@ module HDLRuby::Low
                 unless content.is_a?(Numeric) or
                         content.is_a?(HDLRuby::BitString)
                     # content = HDLRuby::BitString.new(content.to_s)
-                    content = content.to_s
+                    if content.is_a?(Array) then
+                      content = content.map(&:to_s).join
+                    else
+                      content = content.to_s
+                    end
                     if self.type.unsigned? && content[0] != "0" then
                         # content = "0" + content.rjust(self.type.width,content[0])
                         if content[0] == "1" then
@@ -5108,10 +5093,10 @@ module HDLRuby::Low
             return self.content <=> value
         end
 
-        # Gets the bit width of the value.
-        def width
-            return @type.width
-        end
+        # # Gets the bit width of the value.
+        # def width
+        #     return @type.width
+        # end
 
         # Tells if the value is even.
         def even?
@@ -6449,4 +6434,23 @@ module HDLRuby::Low
         end
 
     end
+
+
+    ## Handling the properties that can be added to HDLRuby objects.
+
+    Properties = Hash.new
+
+    ## Add to object +obj+, property +prop+.
+    def self.add_property(obj,prop)
+      Properties[obj] ||= Set.new
+      Properties[obj] << prop
+      obj
+    end
+
+    ## Iterate on the properties of object +obj+.
+    def self.each_property(obj,&ruby_block)
+      Properties[obj].each(&ruby_block)
+    end
+
+
 end

data/lib/HDLRuby/hruby_rcsim.rb

@@ -719,8 +719,13 @@ module HDLRuby::High
         # Generate the C description of the hardware case.
         def to_rcsim
             # Create the hardware case C object.
-            @rcstatement = RCSim.rcsim_make_hcase(self.value.to_rcsim,
-                                    self.default ? self.default.to_rcsim : nil)
+            if(@mode == :casez) then
+              @rcstatement = RCSim.rcsim_make_hcasez(self.value.to_rcsim,
+                               self.default ? self.default.to_rcsim : nil)
+            else
+              @rcstatement = RCSim.rcsim_make_hcase(self.value.to_rcsim,
+                               self.default ? self.default.to_rcsim : nil)
+            end
 
             # Add the hardware whens.
             rcsim_matches = self.each_when.map {|wh| wh.match.to_rcsim }

data/lib/HDLRuby/hruby_verilog.rb

@@ -1562,10 +1562,14 @@ module HDLRuby::Low
         # Converts the system to Verilog code.
         def to_verilog
             # if self.base.name.to_s != "bit"
+            first = self.range.first
+            first = first.to_verilog if first.is_a?(Expression)
+            last = self.range.last
+            last = last.to_verilog if last.is_a?(Expression)
             if VERILOG_BASE_TYPES.include?(self.base.name.to_s)
-                return " #{self.base.name.to_s}[#{self.range.first}:#{self.range.last}]"
+              return " #{self.base.name.to_s}[#{first}:#{last}]"
             end
-            return " [#{self.range.first}:#{self.range.last}]"
+            return " [#{first}:#{last}]"
         end
     end
 
@@ -1630,9 +1634,9 @@ module HDLRuby::Low
             res = ""
             sels = self.select.to_verilog
             @choices[0..-2].each_with_index do |choice,i|
-                res << "#{sels} == #{i} ? #{choice.to_verilog} : "
+                res << "(#{sels} == #{i} ? #{choice.to_verilog} : "
             end
-            res << @choices[-1].to_verilog
+            res << @choices[-1].to_verilog + (")" * @choices[0..-2].size)
             return res
         end
     end
@@ -1676,6 +1680,9 @@ module HDLRuby::Low
                 # return "#{self.type.width}'b#{str}"
             else
                 str = self.content.to_verilog
+                if str.length > self.type.width then
+                  str = str[str.length-self.type.width..-1]
+                end
                 if self.content.negative? then
                     return "#{str.length}'sb#{str}"
                 else
@@ -1738,7 +1745,11 @@ module HDLRuby::Low
 
             result = " " * spc # Indented based on space_count.
 
-            result << "case(#{self.value.to_verilog})\n"
+            if @mode == :casez then
+              result << "casez(#{self.value.to_verilog})\n"
+            else
+              result << "case(#{self.value.to_verilog})\n"
+            end
 
             # n the case statement, each branch is partitioned by when. Process each time when.
             self.each_when do |whens| 
@@ -2150,7 +2161,7 @@ module HDLRuby::Low
             inout = self.each_inout.to_a
 
             # Spelling necessary for simulation.
-            code = "`timescale 1ps/1ps\n\n"
+            code = "`timescale 10ps/1ps\n\n"
 
             # self.properties[:verilog_name] = vname
             # Output the module name.

data/lib/HDLRuby/std/decoder.rb

@@ -131,10 +131,10 @@ module HDLRuby::High::Std
             format = format.to_s
             width = format.size
             # For that purpose create the regular expression used to process it.
-            prs = "([0-1]+)|(a+)|(b+)|(c+)|(d+)|(e+)|(g+)|(h+)|(i+)|(j+)|(k+)|(l+)|(m+)|(n+)|(o+)|(p+)|(q+)|(r+)|(s+)|(t+)|(u+)|(v+)|(w+)|(x+)|(y+)|(z+)"
+            prs = "([0-1]+)|(a+)|(b+)|(c+)|(d+)|(e+)|(f+)|(g+)|(h+)|(i+)|(j+)|(k+)|(l+)|(m+)|(n+)|(o+)|(p+)|(q+)|(r+)|(s+)|(t+)|(u+)|(v+)|(w+)|(x+)|(y+)|(z+)"
             # Check if the format is compatible with it.
             unless format =~ Regexp.new("^(#{prs})+$") then
-                raise AnyError("Invalid format for a field: #{format}")
+                raise AnyError, "Invalid format for a field: #{format}"
             end
             # Split the format in fields.
             format = format.split(Regexp.new(prs)).select {|str| !str.empty?}

data/lib/HDLRuby/verilog_hruby.rb

@@ -889,6 +889,34 @@ module VerilogTools
         state.indent = indent
         state.level  = level
         return case_txt
+      when :casez
+        # Saves the state.
+        indent = state.indent
+        level = state.level
+        # Generate the hcase.
+        state.indent += "  "
+        case_txt = indent + "hcasez(" + ast[1].to_HDLRuby(state) + ")\n"
+        # Generate the case items.
+        case_txt += ast[2].map do |item|
+          res_txt = ""
+          if item[0] != "default" then
+            # hwhen case.
+            res_txt += indent + "hwhen(" 
+            res_txt += item[0].map {|e| e.to_HDLRuby(state) }.join(",")
+            res_txt += ") do\n"
+            res_txt += item[1].to_HDLRuby(state)
+            res_txt += indent + "end\n"
+          else
+            # helse case.
+            res_txt += indent + "helse do\n"
+            res_txt += item[1].to_HDLRuby(state) + indent + "end\n"
+          end
+          res_txt
+        end.join
+        # Restore the state and return the result.
+        state.indent = indent
+        state.level  = level
+        return case_txt
       when :blocking_assignment, :non_blocking_assignment
         return ast[0].to_HDLRuby(state)
       when :statement
@@ -1094,6 +1122,8 @@ module VerilogTools
       base = ast[1] ? ast[1].to_HDLRuby(state) : ""
       # Get the second number if any.
       number1 = ast[2] ? ast[2].to_HDLRuby(state) : ""
+      # In HDLRuby, for now, wildcards work like z.
+      number1 = number1.gsub("?","z")
       # Depending on the base.
       case base
       when "'b"

data/lib/HDLRuby/verilog_parser.rb

@@ -1220,7 +1220,7 @@ module VerilogTools
     CLOSE_BRA_COLON_TOKS = [ "\\" + CLOSE_BRA_TOK, COLON_TOK ]
     CLOSE_BRA_COLON_REX  = /\G#{S}(#{CLOSE_BRA_COLON_TOKS.join("|")})/
 
-    STATEMENT_TOKS = [ IF_TOK, CASE_TOK, CASEZ_TOK, CASEX_TOK, 
+    STATEMENT_TOKS = [ IF_TOK, CASEZ_TOK, CASEX_TOK, CASE_TOK,  
                        FOREVER_TOK, REPEAT_TOK, WHILE_TOK, FOR_TOK,
                        WAIT_TOK, RIGHT_ARROW_TOK, DISABLE_TOK,
                        ASSIGN_TOK, FORCE_TOK, DEASSIGN_TOK, RELEASE_TOK ]

data/lib/HDLRuby/version.rb

@@ -1,3 +1,3 @@
 module HDLRuby
-  VERSION = "3.9.5"
+  VERSION = "3.9.6"
 end

metadata

@@ -1,7 +1,7 @@
 --- !ruby/object:Gem::Specification
 name: HDLRuby
 version: !ruby/object:Gem::Version
-  version: 3.9.5
+  version: 3.9.6
 platform: ruby
 authors:
 - Lovic Gauthier
@@ -193,11 +193,13 @@ files:
 - lib/HDLRuby/hdr_samples/tuple.rb
 - lib/HDLRuby/hdr_samples/type_minmax_bench.rb
 - lib/HDLRuby/hdr_samples/verilog_parser_bench.rb
+- lib/HDLRuby/hdr_samples/with_assign_to_slice.rb
 - lib/HDLRuby/hdr_samples/with_board.rb
 - lib/HDLRuby/hdr_samples/with_board_sequencer.rb
 - lib/HDLRuby/hdr_samples/with_bram.rb
 - lib/HDLRuby/hdr_samples/with_bram_frame_stack.rb
 - lib/HDLRuby/hdr_samples/with_bram_stack.rb
+- lib/HDLRuby/hdr_samples/with_casez.rb
 - lib/HDLRuby/hdr_samples/with_casts.rb
 - lib/HDLRuby/hdr_samples/with_channel.rb
 - lib/HDLRuby/hdr_samples/with_channel_other.rb
@@ -502,7 +504,7 @@ required_rubygems_version: !ruby/object:Gem::Requirement
     - !ruby/object:Gem::Version
       version: '0'
 requirements: []
-rubygems_version: 4.0.14
+rubygems_version: 4.0.18
 specification_version: 4
 summary: HDLRuby is a library for describing and simulating digital electronic systems.
 test_files: []