HDLRuby 2.9.0 → 2.10.5

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@@ -184,20 +184,28 @@ module HDLRuby::Low
184
184
 
185
185
  # Adds input +signal+.
186
186
  def add_input(signal)
187
- # print "add_input with signal: #{signal.name}\n"
187
+ # print "In #{self} add_input with signal: #{signal.name}\n"
188
188
  # Check and add the signal.
189
189
  unless signal.is_a?(SignalI)
190
190
  raise AnyError,
191
191
  "Invalid class for a signal instance: #{signal.class}"
192
192
  end
193
+ # if @inputs.include?(signal) then
194
+ # raise AnyError, "SignalI #{signal.name} already present."
195
+ # end
193
196
  if @inputs.include?(signal) then
194
- raise AnyError, "SignalI #{signal.name} already present."
197
+ signal.parent = self
198
+ # Replace the signal.
199
+ old_signal = @inputs[signal.name]
200
+ @inputs.add(signal)
201
+ @interface[@interface.index(old_signal)] = signal
202
+ else
203
+ # Set the parent of the signal.
204
+ signal.parent = self
205
+ # And add the signal.
206
+ @inputs.add(signal)
207
+ @interface << signal
195
208
  end
196
- # Set the parent of the signal.
197
- signal.parent = self
198
- # And add the signal.
199
- @inputs.add(signal)
200
- @interface << signal
201
209
  return signal
202
210
  end
203
211
 
@@ -208,14 +216,22 @@ module HDLRuby::Low
208
216
  raise AnyError,
209
217
  "Invalid class for a signal instance: #{signal.class}"
210
218
  end
219
+ # if @outputs.include?(signal) then
220
+ # raise AnyError, "SignalI #{signal.name} already present."
221
+ # end
211
222
  if @outputs.include?(signal) then
212
- raise AnyError, "SignalI #{signal.name} already present."
223
+ signal.parent = self
224
+ # Replace the signal.
225
+ old_signal = @outputs[signal.name]
226
+ @outputs.add(signal)
227
+ @interface[@interface.index(old_signal)] = signal
228
+ else
229
+ # Set the parent of the signal.
230
+ signal.parent = self
231
+ # And add the signal.
232
+ @outputs.add(signal)
233
+ @interface << signal
213
234
  end
214
- # Set the parent of the signal.
215
- signal.parent = self
216
- # And add the signal.
217
- @outputs.add(signal)
218
- @interface << signal
219
235
  return signal
220
236
  end
221
237
 
@@ -226,14 +242,22 @@ module HDLRuby::Low
226
242
  raise AnyError,
227
243
  "Invalid class for a signal instance: #{signal.class}"
228
244
  end
245
+ # if @inouts.include?(signal) then
246
+ # raise AnyError, "SignalI #{signal.name} already present."
247
+ # end
229
248
  if @inouts.include?(signal) then
230
- raise AnyError, "SignalI #{signal.name} already present."
249
+ signal.parent = self
250
+ # Replace the signal.
251
+ old_signal = @inouts[signal.name]
252
+ @inouts.add(signal)
253
+ @interface[@interface.index(old_signal)] = signal
254
+ else
255
+ # Set the parent of the signal.
256
+ signal.parent = self
257
+ # And add the signal.
258
+ @inouts.add(signal)
259
+ @interface << signal
231
260
  end
232
- # Set the parent of the signal.
233
- signal.parent = self
234
- # And add the signal.
235
- @inouts.add(signal)
236
- @interface << signal
237
261
  return signal
238
262
  end
239
263
 
@@ -289,6 +313,8 @@ module HDLRuby::Low
289
313
  @inputs.each(&ruby_block)
290
314
  @outputs.each(&ruby_block)
291
315
  @inouts.each(&ruby_block)
316
+ # And each signal of the direct scope.
317
+ @scope.each_signal(&ruby_block)
292
318
  end
293
319
 
294
320
  # Iterates over all the signals of the system type and its scope.
@@ -297,7 +323,8 @@ module HDLRuby::Low
297
323
  return to_enum(:each_signal_deep) unless ruby_block
298
324
  # A ruby block?
299
325
  # First iterate over the current system type's signals.
300
- self.each_signal_all(&ruby_block)
326
+ # self.each_signal_all(&ruby_block)
327
+ self.each_signal(&ruby_block)
301
328
  # Then apply on the behaviors (since in HDLRuby:High, blocks can
302
329
  # include signals).
303
330
  @scope.each_signal_deep(&ruby_block)
@@ -568,9 +595,9 @@ module HDLRuby::Low
568
595
  raise AnyError,
569
596
  "Invalid class for a system type: #{systemT.class}"
570
597
  end
571
- if @systemTs.include?(systemT) then
572
- raise AnyError, "SystemT #{systemT.name} already present."
573
- end
598
+ # if @systemTs.include?(systemT) then
599
+ # raise AnyError, "SystemT #{systemT.name} already present."
600
+ # end
574
601
  # Set the parent of the instance
575
602
  systemT.parent = self
576
603
  # puts "systemT = #{systemT}, parent=#{self}"
@@ -620,9 +647,9 @@ module HDLRuby::Low
620
647
  raise AnyError,
621
648
  "Invalid class for a type: #{type.class}"
622
649
  end
623
- if @types.include?(type) then
624
- raise AnyError, "Type #{type.name} already present."
625
- end
650
+ # if @types.include?(type) then
651
+ # raise AnyError, "Type #{type.name} already present."
652
+ # end
626
653
  # Set the parent of the instance
627
654
  type.parent = self
628
655
  # puts "type = #{type}, parent=#{self}"
@@ -673,12 +700,14 @@ module HDLRuby::Low
673
700
  raise AnyError,
674
701
  "Invalid class for a system instance: #{scope.class}"
675
702
  end
676
- if @scopes.include?(scope) then
677
- raise AnyError, "Scope #{scope} already present."
678
- end
703
+ # if @scopes.include?(scope) then
704
+ # raise AnyError, "Scope #{scope} already present."
705
+ # end
679
706
  # Set the parent of the scope
680
707
  scope.parent = self
681
- # Add the instance
708
+ # Remove a former scope with same name if present (override)
709
+ @scopes.delete_if { |sc| sc.name && sc.name == scope.name }
710
+ # Add the scope
682
711
  @scopes << scope
683
712
  end
684
713
 
@@ -729,9 +758,9 @@ module HDLRuby::Low
729
758
  raise AnyError,
730
759
  "Invalid class for a system instance: #{systemI.class}"
731
760
  end
732
- if @systemIs.include?(systemI) then
733
- raise AnyError, "SystemI #{systemI.name} already present."
734
- end
761
+ # if @systemIs.include?(systemI) then
762
+ # raise AnyError, "SystemI #{systemI.name} already present."
763
+ # end
735
764
  # Set the parent of the instance
736
765
  systemI.parent = self
737
766
  # puts "systemI = #{systemI}, parent=#{self}"
@@ -780,9 +809,9 @@ module HDLRuby::Low
780
809
  raise AnyError,
781
810
  "Invalid class for a non-hDLRuby code chunk: #{code.class}"
782
811
  end
783
- if @codes.include?(code) then
784
- raise AnyError, "Code #{code.name} already present."
785
- end
812
+ # if @codes.include?(code) then
813
+ # raise AnyError, "Code #{code.name} already present."
814
+ # end
786
815
  # Set the parent of the code chunk.
787
816
  code.parent = self
788
817
  # puts "code = #{code}, parent=#{self}"
@@ -821,11 +850,9 @@ module HDLRuby::Low
821
850
  raise AnyError,
822
851
  "Invalid class for a signal instance: #{signal.class}"
823
852
  end
824
- # if @inners.has_key?(signal.name) then
825
- if @inners.include?(signal) then
826
- raise AnyError, "SignalI #{signal.name} already present."
827
- end
828
- # @inners[signal.name] = signal
853
+ # if @inners.include?(signal) then
854
+ # raise AnyError, "SignalI #{signal.name} already present."
855
+ # end
829
856
  # Set the parent of the signal.
830
857
  signal.parent = self
831
858
  # And add the signal.
@@ -2758,10 +2785,9 @@ module HDLRuby::Low
2758
2785
  raise AnyError,
2759
2786
  "Invalid class for a code chunk: #{chunk.class}"
2760
2787
  end
2761
- # if @chunks.has_key?(chunk.name) then
2762
- if @chunks.include?(chunk) then
2763
- raise AnyError, "Code chunk #{chunk.name} already present."
2764
- end
2788
+ # if @chunks.include?(chunk) then
2789
+ # raise AnyError, "Code chunk #{chunk.name} already present."
2790
+ # end
2765
2791
  # Set its parent.
2766
2792
  chunk.parent = self
2767
2793
  # And add it
@@ -4266,11 +4292,9 @@ module HDLRuby::Low
4266
4292
  raise AnyError,
4267
4293
  "Invalid class for a signal instance: #{signal.class}"
4268
4294
  end
4269
- # if @inners.has_key?(signal.name) then
4270
- if @inners.include?(signal) then
4271
- raise AnyError, "SignalI #{signal.name} already present."
4272
- end
4273
- # @inners[signal.name] = signal
4295
+ # if @inners.include?(signal) then
4296
+ # raise AnyError, "SignalI #{signal.name} already present."
4297
+ # end
4274
4298
  # Set its parent.
4275
4299
  signal.parent = self
4276
4300
  # And add it
@@ -2082,11 +2082,11 @@ module HDLRuby::Low
2082
2082
  if str =~ /^[01]+$/ && str.length <= 64 then
2083
2083
  # Yes, generate a numeral value.
2084
2084
  res << " " * (level+1)*3
2085
- # res << "static unsigned long long data[] = { "
2086
2085
  res << "static unsigned int data[] = { "
2087
2086
  res << str.scan(/.{1,#{Low2C.int_width}}/m).reverse.map do |sub|
2088
2087
  sub.to_i(2).to_s # + "ULL"
2089
2088
  end.join(",")
2089
+ res << ", 0" if (str.length <= 32)
2090
2090
  res << " };\n"
2091
2091
  # Create the value.
2092
2092
  res << " " * (level+1)*3
@@ -222,7 +222,7 @@ module HDLRuby::Low
222
222
  end
223
223
 
224
224
  # Deletes all the connections.
225
- def delete_all_conncetions!
225
+ def delete_all_connections!
226
226
  @connections.each { |cnx| cnx.parent = nil }
227
227
  @connections = []
228
228
  end
@@ -92,6 +92,7 @@ module HDLRuby::Low
92
92
  inputs_blk.add_statement(
93
93
  Transmit.new(right.clone,left.clone))
94
94
  elsif (left_is_o) then
95
+ # puts "left=#{left} right=#{right}"
95
96
  outputs_blk.add_statement(
96
97
  Transmit.new(right.clone,left.clone))
97
98
  elsif (right_is_o) then
@@ -147,7 +147,8 @@ module HDLRuby::Low
147
147
  cnxs = self.each_connection.to_a
148
148
  # Remove them from the scope.
149
149
  # cnxs.each { |cnx| self.delete_connection!(cnx) }
150
- cnxs.delete_all_connections!
150
+ # cnxs.delete_all_connections!
151
+ self.delete_all_connections!
151
152
  # Return the connections.
152
153
  return cnxs
153
154
  end
@@ -1871,10 +1871,11 @@ static Value equal_value_numeric(Value src0, Value src1, Value dst) {
1871
1871
  dst->type = src0->type;
1872
1872
  dst->numeric = 1;
1873
1873
 
1874
- // /* Perform the !XOR. */
1875
- // dst->data_int = ~(src0->data_int ^ src1->data_int);
1876
1874
  /* Perform the comparison. */
1877
1875
  dst->data_int = (src0->data_int == src1->data_int) ? 1 : 0;
1876
+ printf("scr0->data_int=%lld\n",src0->data_int);
1877
+ printf("scr1->data_int=%lld\n",src1->data_int);
1878
+ printf("dst->data_int=%lld\n",dst->data_int);
1878
1879
  return dst;
1879
1880
  }
1880
1881
 
@@ -0,0 +1,92 @@
1
+ module HDLRuby::High::Std
2
+
3
+ ##
4
+ # Standard HDLRuby::High library: delays
5
+ #
6
+ ########################################################################
7
+
8
+
9
+ ## Module describing a simple delay using handshake for working.
10
+ # @param num the number of clock cycles to delay.
11
+ system :delay do |num|
12
+ # Checks and process the number of clock to wait.
13
+ num = num.to_i
14
+ raise "The delay generic argument must be positive: #{num}" if (num < 0)
15
+
16
+ input :clk # The clock to make the delay on.
17
+ input :req # The handshake request.
18
+ output :ack # The handshake acknoledgment.
19
+
20
+ # The process of the delay.
21
+ if (num == 0) then
22
+ # No delay case.
23
+ ack <= req
24
+ else
25
+ # The is a delay.
26
+ inner run: 0 # Tell if the deayl is running.
27
+ [num.width+1].inner :count # The counter for computing the delay.
28
+ par(clk.posedge) do
29
+ # Is there a request to treat?
30
+ hif(req & ~run) do
31
+ # Yes, intialize the delay.
32
+ run <= 1
33
+ count <= 0
34
+ ack <= 0
35
+ end
36
+ # No, maybe there is a request in processing.
37
+ helsif(run) do
38
+ # Yes, increase the counter.
39
+ count <= count + 1
40
+ # Check if the delay is reached.
41
+ hif(count == num-1) do
42
+ # Yes, tells it and stop the count.
43
+ ack <= 1
44
+ run <= 0
45
+ end
46
+ end
47
+ end
48
+ end
49
+ end
50
+
51
+
52
+
53
+ ## Module describing a pipeline delay (supporting multiple successive delays)
54
+ # using handshake for working.
55
+ # @param num the number of clock cycles to delay.
56
+ system :delayp do |num|
57
+ # Checks and process the number of clock to wait.
58
+ num = num.to_i
59
+ raise "The delay generic argument must be positive: #{num}" if (num < 0)
60
+
61
+ input :clk # The clock to make the delay on.
62
+ input :req # The handshake request.
63
+ output :ack # The handshake acknoledgment.
64
+
65
+ if (num==0) then
66
+ # No delay.
67
+ ack <= req
68
+ else
69
+ # There is a delay.
70
+
71
+ [num].inner state: 0 # The shift register containing the progression
72
+ # of each requested delay.
73
+
74
+ # The acknoledgment is directly the last bit of the state register.
75
+ ack <= state[-1]
76
+
77
+
78
+ # The process controlling the delay.
79
+ seq(clk.posedge) do
80
+ # Update the state.
81
+ if (num > 1) then
82
+ state <= state << 1
83
+ else
84
+ state <= 0
85
+ end
86
+ # Handle the input.
87
+ ( state[0] <= 1 ).hif(req)
88
+ end
89
+ end
90
+ end
91
+
92
+ end
@@ -0,0 +1,60 @@
1
+ module HDLRuby::High::Std
2
+
3
+ ##
4
+ # Standard HDLRuby::High library: handshake protocols.
5
+ #
6
+ ########################################################################
7
+
8
+
9
+ ## Module describing a simple client handshake for working.
10
+ # @param event the event to synchronize the handshake.
11
+ # @param req the signal telling a request is there.
12
+ # @param cond the condition allowing the protocol.
13
+ system :hs_client do |event, req, cond=_1|
14
+ input :reqI
15
+ output ackI: 0
16
+
17
+ # A each synchronization event.
18
+ par(event) do
19
+ # Is the protocol is allowed and a request is present.
20
+ hif(cond & reqI) do
21
+ # Yes perform the action and tell the request has been treated.
22
+ req <= 1 if req
23
+ ackI <= 1
24
+ end
25
+ helse do
26
+ # No, do not perform the action, and do not acknowledge.
27
+ req <= 0 if req
28
+ ackI <= 0
29
+ end
30
+ end
31
+ end
32
+
33
+
34
+ ## Module describing a simple server handshake for working.
35
+ # @param event the event to synchronize the handshake.
36
+ # @param req the signal for asking a new request.
37
+ system :hs_server do |event, req|
38
+ output reqO: 0
39
+ input :ackO
40
+
41
+ # A each synchronization event.
42
+ par(event) do
43
+ # Shall we start the output?
44
+ hif(ackO) { reqO <= 0 }
45
+ hif(req) { reqO <= 1 }
46
+ end
47
+ end
48
+
49
+
50
+ ## Module describing a pipe with handshakes.
51
+ # @param event the event to synchronize the handshakes.
52
+ # @param read the signal telling there is a request from the client side
53
+ # @param write the signal used for asking the server to issue a request
54
+ system :hs_pipe do |event,read,write|
55
+ inner :cond
56
+ include(hs_client(event,read,cond))
57
+ include(hs_server(event,write))
58
+ cond <= ~reqO
59
+ end
60
+ end
@@ -1,3 +1,3 @@
1
1
  module HDLRuby
2
- VERSION = "2.9.0"
2
+ VERSION = "2.10.5"
3
3
  end
metadata CHANGED
@@ -1,14 +1,14 @@
1
1
  --- !ruby/object:Gem::Specification
2
2
  name: HDLRuby
3
3
  version: !ruby/object:Gem::Version
4
- version: 2.9.0
4
+ version: 2.10.5
5
5
  platform: ruby
6
6
  authors:
7
7
  - Lovic Gauthier
8
8
  autorequire:
9
9
  bindir: exe
10
10
  cert_chain: []
11
- date: 2022-05-15 00:00:00.000000000 Z
11
+ date: 2022-07-19 00:00:00.000000000 Z
12
12
  dependencies:
13
13
  - !ruby/object:Gem::Dependency
14
14
  name: bundler
@@ -91,6 +91,7 @@ files:
91
91
  - lib/HDLRuby/hdr_samples/dff.rb
92
92
  - lib/HDLRuby/hdr_samples/dff_bench.rb
93
93
  - lib/HDLRuby/hdr_samples/dff_counter.rb
94
+ - lib/HDLRuby/hdr_samples/dff_override.rb
94
95
  - lib/HDLRuby/hdr_samples/dff_properties.rb
95
96
  - lib/HDLRuby/hdr_samples/dff_unit.rb
96
97
  - lib/HDLRuby/hdr_samples/huge_rom.rb
@@ -152,9 +153,11 @@ files:
152
153
  - lib/HDLRuby/hdr_samples/with_connector_memory.rb
153
154
  - lib/HDLRuby/hdr_samples/with_decoder.rb
154
155
  - lib/HDLRuby/hdr_samples/with_def.rb
156
+ - lib/HDLRuby/hdr_samples/with_delay.rb
155
157
  - lib/HDLRuby/hdr_samples/with_fixpoint.rb
156
158
  - lib/HDLRuby/hdr_samples/with_fsm.rb
157
159
  - lib/HDLRuby/hdr_samples/with_function_generator.rb
160
+ - lib/HDLRuby/hdr_samples/with_handshake.rb
158
161
  - lib/HDLRuby/hdr_samples/with_init.rb
159
162
  - lib/HDLRuby/hdr_samples/with_instance.rb
160
163
  - lib/HDLRuby/hdr_samples/with_linear.rb
@@ -173,6 +176,7 @@ files:
173
176
  - lib/HDLRuby/hdr_samples/with_to_array.rb
174
177
  - lib/HDLRuby/hdr_samples/with_values.rb
175
178
  - lib/HDLRuby/hdrcc.rb
179
+ - lib/HDLRuby/hdrlib.rb
176
180
  - lib/HDLRuby/high_samples/_adder_fault.rb
177
181
  - lib/HDLRuby/high_samples/_generic_transmission2.rb
178
182
  - lib/HDLRuby/high_samples/adder.rb
@@ -324,9 +328,11 @@ files:
324
328
  - lib/HDLRuby/std/connector.rb
325
329
  - lib/HDLRuby/std/counters.rb
326
330
  - lib/HDLRuby/std/decoder.rb
331
+ - lib/HDLRuby/std/delays.rb
327
332
  - lib/HDLRuby/std/fixpoint.rb
328
333
  - lib/HDLRuby/std/fsm.rb
329
334
  - lib/HDLRuby/std/function_generator.rb
335
+ - lib/HDLRuby/std/handshakes.rb
330
336
  - lib/HDLRuby/std/hruby_unit.rb
331
337
  - lib/HDLRuby/std/linear.rb
332
338
  - lib/HDLRuby/std/loop.rb