HDLRuby 2.4.14 → 2.4.15

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@@ -125,20 +125,26 @@ end
125
125
  # Module for testing the connector.
126
126
  system :with_connectors do
127
127
  inner :clk, :rst
128
- [4].inner :counter, :res_0,:res_1,:res_2,:res_3
128
+ [4].inner :counter #, :res_0,:res_1,:res_2,:res_3
129
+ [4*4].inner :res
129
130
  inner :ack_in, :ack_out
130
131
 
131
132
  # The input queue.
132
133
  queue(bit[4],4,clk,rst).(:in_qu)
133
134
 
134
- # The first output queue.
135
- queue(bit[4],4,clk,rst).(:out_qu0)
136
- queue(bit[4],4,clk,rst).(:out_qu1)
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- queue(bit[4],4,clk,rst).(:out_qu2)
138
- queue(bit[4],4,clk,rst).(:out_qu3)
135
+ # The middle queues.
136
+ mid_qus = 4.times.map do |i|
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+ queue(bit[4],4,clk,rst).(:"mid_qu#{i}")
138
+ end
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+
140
+ # The output queue.
141
+ queue(bit[4*4],4,clk,rst).(:out_qu)
142
+
143
+ # Connect the input queue to the middle queues.
144
+ duplicator(bit[4],clk.negedge,in_qu,mid_qus)
139
145
 
140
- # Connect them
141
- duplicator([4],clk.negedge,in_qu,[out_qu0,out_qu1,out_qu2,out_qu3])
146
+ # Connect the middle queues to the output queue.
147
+ merger([bit[4]]*4,clk.negedge,mid_qus,out_qu)
142
148
 
143
149
  # # Slow version, always work
144
150
  # par(clk.posedge) do
@@ -154,10 +160,10 @@ system :with_connectors do
154
160
  # end
155
161
  # end
156
162
  # hif(ack_in) do
157
- # out_qu0.read(res_0)
158
- # out_qu1.read(res_1)
159
- # out_qu2.read(res_2)
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- # out_qu3.read(res_3) { ack_out <= 1 }
163
+ # mid_qu0.read(res_0)
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+ # mid_qu1.read(res_1)
165
+ # mid_qu2.read(res_2)
166
+ # mid_qu3.read(res_3) { ack_out <= 1 }
161
167
  # end
162
168
  # end
163
169
  # end
@@ -172,10 +178,11 @@ system :with_connectors do
172
178
  counter <= counter + 1
173
179
  end
174
180
  hif(ack_in) do
175
- out_qu0.read(res_0)
176
- out_qu1.read(res_1)
177
- out_qu2.read(res_2)
178
- out_qu3.read(res_3)
181
+ # mid_qu0.read(res_0)
182
+ # mid_qu1.read(res_1)
183
+ # mid_qu2.read(res_2)
184
+ # mid_qu3.read(res_3)
185
+ out_qu.read(res)
179
186
  end
180
187
  end
181
188
  end
@@ -1223,6 +1223,8 @@ static Value concat_value_bitstring_array(int num, int dir,
1223
1223
  }
1224
1224
  /* Resize the destination accordignly. */
1225
1225
  resize_value(dst,width);
1226
+ /* Ensure it is not numeric. */
1227
+ dst->numeric = 0;
1226
1228
 
1227
1229
  /* Access the data of the destination. */
1228
1230
  char* dst_data = dst->data_str;
@@ -1233,7 +1235,7 @@ static Value concat_value_bitstring_array(int num, int dir,
1233
1235
  unsigned int idx = dir ? (num-i-1) : i;
1234
1236
  Value value = args[idx];
1235
1237
  unsigned long long cw = type_width(value->type);
1236
- // printf("value=%s cw=%llu\n",value->data_str,cw);
1238
+ // printf("value=%s cw=%llu pos=%llu\n",value->data_str,cw,pos);
1237
1239
  memcpy(dst_data+pos,value->data_str,cw);
1238
1240
  pos += cw;
1239
1241
  }
@@ -6,34 +6,59 @@ module HDLRuby::High::Std
6
6
  ########################################################################
7
7
 
8
8
  # Function for generating a connector that duplicates the output of
9
- # channel +inch+ and connect it to channels +outchs+ with data of
9
+ # channel +in_ch+ and connect it to channels +out_chs+ with data of
10
10
  # +typ+.
11
11
  # The duplication is done according to event +ev+.
12
- function :duplicator do |typ, ev, inch, outchs|
12
+ function :duplicator do |typ, ev, in_ch, out_chs|
13
13
  ev = ev.poswedge unless ev.is_a?(Event)
14
14
  inner :in_ack, :in_req
15
- out_chacks = outchs.map.with_index do |ch,i|
16
- [ ch, inner(:"out_ack#{i}") ]
17
- end
15
+ out_acks = out_chs.size.times.map { |i| inner(:"out_ack#{i}") }
18
16
  typ.inner :data
19
17
  par(ev) do
20
18
  in_req <= 1
21
- out_chacks.each { |ch,ack| ack <= 0 }
22
- out_chacks.each do |ch,ack|
19
+ out_acks.each { |ack| ack <= 0 }
20
+ out_acks.each do |ack|
23
21
  hif(ack == 1) { in_req <= 0 }
24
22
  end
25
23
  hif(in_req) do
26
24
  in_ack <= 0
27
- inch.read(data) { in_ack <= 1 }
25
+ in_ch.read(data) { in_ack <= 1 }
28
26
  end
29
27
  hif(in_ack) do
30
- out_chacks.each do |ch,ack|
28
+ out_chs.zip(out_acks).each do |ch,ack|
31
29
  hif(ack == 0) { ch.write(data) { ack <= 1 } }
32
30
  end
33
- hif (out_chacks.reduce(_1) { |sum,(ch,ack)| ack & sum }) do
34
- out_chacks.each { |ch,ack| ack <= 0 }
31
+ hif (out_acks.reduce(_1) { |sum,ack| ack & sum }) do
32
+ out_acks.each { |ack| ack <= 0 }
33
+ end
34
+ end
35
+ end
36
+ end
37
+
38
+ # Function for generating a connector that merges the output of
39
+ # channels +in_chs+ and connects the result to channel +out_ch+ with
40
+ # data of +typ+.
41
+ # The merge is done according to event +ev+.
42
+ function :merger do |typs, ev, in_chs, out_ch|
43
+ ev = ev.posedge unless ev.is_a?(Event)
44
+ inner :out_ack
45
+ in_reqs = in_chs.size.times.map { |i| inner(:"in_req#{i}") }
46
+ in_acks = in_chs.size.times.map { |i| inner(:"in_ack#{i}") }
47
+ datas = typs.map.with_index { |typ,i| typ.inner(:"data#{i}") }
48
+ par(ev) do
49
+ in_reqs.each { |req| req <= 1 }
50
+ out_ack <= 0
51
+ hif(out_ack == 1) { in_reqs.each { |req| req <= 0 } }
52
+ hif(in_reqs.reduce(_1) { |sum,req| req & sum }) do
53
+ in_chs.each_with_index do |ch,i|
54
+ in_acks[i] <= 0
55
+ ch.read(datas[i]) { in_acks[i] <= 1 }
35
56
  end
36
57
  end
58
+ hif(in_acks.reduce(_1) { |sum,req| req & sum }) do
59
+ hif(out_ack == 0) { out_ch.write(datas) { out_ack <= 1 } }
60
+ hif (out_ack == 1) { out_ack <= 0 }
61
+ end
37
62
  end
38
63
  end
39
64
 
@@ -1,3 +1,3 @@
1
1
  module HDLRuby
2
- VERSION = "2.4.14"
2
+ VERSION = "2.4.15"
3
3
  end
metadata CHANGED
@@ -1,14 +1,14 @@
1
1
  --- !ruby/object:Gem::Specification
2
2
  name: HDLRuby
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3
  version: !ruby/object:Gem::Version
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- version: 2.4.14
4
+ version: 2.4.15
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5
  platform: ruby
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6
  authors:
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7
  - Lovic Gauthier
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8
  autorequire:
9
9
  bindir: exe
10
10
  cert_chain: []
11
- date: 2020-11-16 00:00:00.000000000 Z
11
+ date: 2020-11-20 00:00:00.000000000 Z
12
12
  dependencies:
13
13
  - !ruby/object:Gem::Dependency
14
14
  name: bundler