HDLRuby 2.3.6 → 2.4.8

data/lib/HDLRuby/std/channel.rb

@@ -325,6 +325,86 @@ module HDLRuby::High::Std
     end
 
 
+    ##
+    # Module giving the methods for accessing a channel instance.
+    module HchannelI
+        ## Performs a read on the channel using +args+ and +ruby_block+
+        #  as arguments.
+        #  NOTE:
+        #  * Will generate a port if not present.
+        #  * Will generate an error if a read is tempted while the read
+        #    port has been declared within another system.
+        def read(*args,&ruby_block)
+            # Is there a port to read?
+            unless self.read_port then
+                # No, generate a new one.
+                # Is it possible to be inout?
+                if self.inout? then
+                    # Yes, create an inout port.
+                    self.inout(HDLRuby.uniq_name)
+                else
+                    # No, create an input port.
+                    self.input(HDLRuby.uniq_name)
+                end
+            end
+            # Ensure the read port is within current system.
+            unless self.read_port.scope.system != HDLRuby::High.cur_system then
+                raise "Cannot read from a port external of current system for channel " + self.name
+            end
+            # Performs the read.
+            self.read_port.read(*args,&ruby_block)
+        end
+        
+        ## Performs a write on the channel using +args+ and +ruby_block+
+        #  as arguments.
+        #  NOTE:
+        #  * Will generate a port if not present.
+        #  * Will generate an error if a read is tempted while the read
+        #    port has been declared within another system.
+        def write(*args,&ruby_block)
+            # Is there a port to write?
+            unless self.write_port then
+                # No, generate a new one.
+                # Is it possible to be inout?
+                if self.inout? then
+                    # Yes, create an inout port.
+                    self.inout(HDLRuby.uniq_name)
+                else
+                    # No, create an output port.
+                    self.output(HDLRuby.uniq_name)
+                end
+            end
+            # Ensure the write port is within current system.
+            unless self.write_port.scope.system != HDLRuby::High.cur_system then
+                raise "Cannot write from a port external of current system for channel " + self.name
+            end
+            # Performs the write.
+            self.write_port.write(*args,&ruby_block)
+        end
+        
+
+        ## Performs a reset on the channel using +args+ and +ruby_block+
+        #  as arguments.
+        def reset(*args,&ruby_block)
+            # Gain access to the writer as local variable.
+            reseter_proc = @inout_reseter_proc
+            # # The context is the one of the writer.
+            # Execute the code generating the writer in context.
+            HDLRuby::High.space_push(@namespace)
+            HDLRuby::High.cur_block.open do
+                instance_exec(ruby_block,*args,&reseter_proc)
+            end
+            HDLRuby::High.space_pop
+        end
+
+
+        # Wrap with +args+ arguments.
+        def wrap(*args)
+            return ChannelB.new(self,*args)
+        end
+    end
+
+
 
     ## 
     # Describes a high-level channel instance.
@@ -864,12 +944,12 @@ module HDLRuby::High::Std
             # Ensure the port is not already existing.
             if @read_port then
                 raise "Read port already declared for channel instance: " +
-                    self.name
+                    self.name.to_s
             end
 
             if @write_port then
                 raise "Write port already declared for channel instance: " +
-                    self.name
+                    self.name.to_s
             end
 
             # Access the ports
@@ -1006,76 +1086,238 @@ module HDLRuby::High::Std
         #     return chp
         # end
 
+        # Standard channel access is given is HchannelI module.
+        include HchannelI
 
         
-        ## Performs a read on the channel using +args+ and +ruby_block+
-        #  as arguments.
-        #  NOTE:
-        #  * Will generate a port if not present.
-        #  * Will generate an error if a read is tempted while the read
-        #    port has been declared within another system.
-        def read(*args,&ruby_block)
-            # Is there a port to read?
-            unless self.read_port then
-                # No, generate a new one.
-                # Is it possible to be inout?
-                if self.inout? then
-                    # Yes, create an inout port.
-                    self.inout(HDLRuby.uniq_name)
-                else
-                    # No, create an input port.
-                    self.input(HDLRuby.uniq_name)
-                end
+        # ## Performs a read on the channel using +args+ and +ruby_block+
+        # #  as arguments.
+        # #  NOTE:
+        # #  * Will generate a port if not present.
+        # #  * Will generate an error if a read is tempted while the read
+        # #    port has been declared within another system.
+        # def read(*args,&ruby_block)
+        #     # Is there a port to read?
+        #     unless self.read_port then
+        #         # No, generate a new one.
+        #         # Is it possible to be inout?
+        #         if self.inout? then
+        #             # Yes, create an inout port.
+        #             self.inout(HDLRuby.uniq_name)
+        #         else
+        #             # No, create an input port.
+        #             self.input(HDLRuby.uniq_name)
+        #         end
+        #     end
+        #     # Ensure the read port is within current system.
+        #     unless self.read_port.scope.system != HDLRuby::High.cur_system then
+        #         raise "Cannot read from a port external of current system for channel " + self.name
+        #     end
+        #     # Performs the read.
+        #     self.read_port.read(*args,&ruby_block)
+        # end
+        # 
+        # ## Performs a write on the channel using +args+ and +ruby_block+
+        # #  as arguments.
+        # #  NOTE:
+        # #  * Will generate a port if not present.
+        # #  * Will generate an error if a read is tempted while the read
+        # #    port has been declared within another system.
+        # def write(*args,&ruby_block)
+        #     # Is there a port to write?
+        #     unless self.write_port then
+        #         # No, generate a new one.
+        #         # Is it possible to be inout?
+        #         if self.inout? then
+        #             # Yes, create an inout port.
+        #             self.inout(HDLRuby.uniq_name)
+        #         else
+        #             # No, create an output port.
+        #             self.output(HDLRuby.uniq_name)
+        #         end
+        #     end
+        #     # Ensure the write port is within current system.
+        #     unless self.write_port.scope.system != HDLRuby::High.cur_system then
+        #         raise "Cannot write from a port external of current system for channel " + self.name
+        #     end
+        #     # Performs the write.
+        #     self.write_port.write(*args,&ruby_block)
+        # end
+        # 
+
+        # ## Performs a reset on the channel using +args+ and +ruby_block+
+        # #  as arguments.
+        # def reset(*args,&ruby_block)
+        #     # Gain access to the writer as local variable.
+        #     reseter_proc = @inout_reseter_proc
+        #     # # The context is the one of the writer.
+        #     # Execute the code generating the writer in context.
+        #     HDLRuby::High.space_push(@namespace)
+        #     HDLRuby::High.cur_block.open do
+        #         instance_exec(ruby_block,*args,&reseter_proc)
+        #     end
+        #     HDLRuby::High.space_pop
+        # end
+    end
+
+    # Describes channel instance wrapper (Box) for fixing arugments.
+    class ChannelB
+        include HDLRuby::High::Hmissing
+        include HchannelI
+
+        # Create a new channel box over +channelI+ channel instance using
+        # +args+ for fixing the arguments as follows:
+        # It can also be three lists for seperate read, write and access
+        # procedures using named arguments as:
+        # read: <read arguments>, write: <write arguments>,
+        # access: <access arguments>
+        def initialize(channelI,*args)
+            # Ensure port is a channel port.
+            unless channelI.is_a?(ChannelI) || channel.is_a?(ChannelB)
+                raise "Invalid class for a channel instance: #{ch.class}"
             end
-            # Ensure the read port is within current system.
-            unless self.read_port.scope.system != HDLRuby::High.cur_system then
-                raise "Cannot read from a port external of current system for channel " + self.name
+            @channelI = channelI
+            # Process the arguments.
+            if args.size == 1 && args[0].is_a?(Hash) then
+                # Read, write and access are separated.
+                @args_read = args[0][:read]
+                @args_write = args[0][:write]
+                @args_access = args[0][:access]
+            else
+                @args_read = args
+                @args_write = args.clone
+                @args_access = args.clone
             end
-            # Performs the read.
-            self.read_port.read(*args,&ruby_block)
         end
+
+        # Delegates to the boxed channel instance.
+
+        # The name of the channel instance.
+        def name
+            return @channelI.name
+        end
+
+        # The scope the channel has been created in.
+        def scope
+            return @channelI.scope
+        end
+
+        # The namespace associated with the current execution when
+        # building a channel.
+        def namespace
+            return @channelI.namespace
+        end
+
+        # The read port if any.
+        def read_port
+            return @read_port
+        end
+
+        # The write port if any.
+        def write_port
+            return @write_port
+        end
+
+        # Methods used on the channel outside its definition.
         
-        ## Performs a write on the channel using +args+ and +ruby_block+
-        #  as arguments.
-        #  NOTE:
-        #  * Will generate a port if not present.
-        #  * Will generate an error if a read is tempted while the read
-        #    port has been declared within another system.
-        def write(*args,&ruby_block)
-            # Is there a port to write?
-            unless self.write_port then
-                # No, generate a new one.
-                # Is it possible to be inout?
-                if self.inout? then
-                    # Yes, create an inout port.
-                    self.inout(HDLRuby.uniq_name)
-                else
-                    # No, create an output port.
-                    self.output(HDLRuby.uniq_name)
-                end
+        # Gets branch channel +name+.
+        # NOTE: 
+        #  * +name+ can be of any type on purpose.
+        #  * The wrapping arguments are not transmitted to the branch.
+        def branch(name,*args)
+            return @channelI.branch(name,*args)
+        end
+
+        ## Tells if the channel support inout port.
+        def inout?
+            return @channelI.inout?
+        end
+
+
+        # Reader, writer and accesser side.
+
+        ## Declares the reader port as and assigned them to +name+.
+        def input(name = nil)
+            # Ensure name is a symbol.
+            name = HDLRuby.uniq_name unless name
+            name = name.to_sym
+            # Ensure the port is not already existing.
+            if @read_port then
+                raise "Read port already declared for channel instance: " +
+                    self.name
             end
-            # Ensure the write port is within current system.
-            unless self.write_port.scope.system != HDLRuby::High.cur_system then
-                raise "Cannot write from a port external of current system for channel " + self.name
+
+            # Create a read port for the encaspulted channel.
+            real_port = @channelI.read_port
+            real_port = @channelI.input unless real_port
+
+            # Wrap it to a new port using.
+            chp = real_port.wrap(read: @args_read)
+
+            HDLRuby::High.space_reg(name) { chp }
+            # Save the port in the channe to avoid conflicting declaration.
+            @read_port = chp
+            return chp
+        end
+
+        ## Declares the ports for the writer and assigned them to +name+.
+        def output(name = nil)
+            # Ensure name is a symbol.
+            name = HDLRuby.uniq_name unless name
+            name = name.to_sym
+            # Ensure the port is not already existing.
+            if @write_port then
+                raise "Read port already declared for channel instance: " +
+                    self.name
             end
-            # Performs the write.
-            self.write_port.write(*args,&ruby_block)
+
+            # Create a write port for the encaspulted channel.
+            real_port = @channelI.write_port
+            real_port = @channelI.output unless real_port
+
+            # Wrap it to a new port using.
+            chp = real_port.wrap(write: @args_write)
+
+            HDLRuby::High.space_reg(name) { chp }
+            # Save the port in the channe to avoid conflicting declaration.
+            @write_port = chp
+            return chp
         end
-        
 
-        ## Performs a reset on the channel using +args+ and +ruby_block+
-        #  as arguments.
-        def reset(*args,&ruby_block)
-            # Gain access to the writer as local variable.
-            reseter_proc = @inout_reseter_proc
-            # # The context is the one of the writer.
-            # Execute the code generating the writer in context.
-            HDLRuby::High.space_push(@namespace)
-            HDLRuby::High.cur_block.open do
-                instance_exec(ruby_block,*args,&reseter_proc)
+
+        ## Declares the accesser port and assigned them to +name+.
+        def inout(name = nil)
+            # Ensure name is a symbol.
+            name = HDLRuby.uniq_name unless name
+            name = name.to_sym
+            # Ensure the port is not already existing.
+            if @read_port then
+                raise "Read port already declared for channel instance: " +
+                    self.name
             end
-            HDLRuby::High.space_pop
+            if @write_port then
+                raise "Write port already declared for channel instance: " +
+                    self.name
+            end
+
+            # Create a write port for the encaspulted channel.
+            if @channelI.read_port == @channelI.write_port then
+                real_port = @channelI.read_port
+                real_port = @channelI.inout unless real_port
+            else
+                raise "Inout port not supported for channel #{@channelI}"
+            end
+
+            # Wrap it to a new port using.
+            chp = real_port.wrap(read: @args_read, write: @args_write)
+
+            HDLRuby::High.space_reg(name) { chp }
+            # Save the port in the channe to avoid conflicting declaration.
+            @write_port = chp
+            @read_port = chp
+            return chp
         end
+
     end
 
 

data/lib/HDLRuby/std/fixpoint.rb

@@ -52,10 +52,18 @@ module HDLRuby::High::Std
                         end
                         # Redefine the multiplication and division for fixed point.
                         typ.define_operator(:*) do |left,right|
-                            (left.as([isize+fsize*2])*right) >> fsize
+                            if (typ.signed?) then
+                                (left.as(signed[isize+fsize*2])*right) >> fsize
+                            else
+                                (left.as([isize+fsize*2])*right) >> fsize
+                            end
                         end
                         typ.define_operator(:/) do |left,right|
-                            (left.as([isize+fsize*2]) << fsize) / right
+                            if (typ.signed?) then
+                                (left.as(signed[isize+fsize*2]) << fsize) / right
+                            else
+                                (left.as([isize+fsize*2]) << fsize) / right
+                            end
                         end
                         typ
                     end

data/lib/HDLRuby/std/linear.rb

@@ -209,37 +209,57 @@ module HDLRuby::High::Std
         # lv and rv are valid.
         lvoks = lefts.each_with_index.map { |left,i| inner :"lvok#{i}" }
         inner :rvok
+        woks = lefts.each_with_index.map { |left,i| inner :"wok#{i}" }
         # Run flag
         inner :run
         par(ev) do
             ack <= 0
             run <= 0
+            hif(~run) do
+                rvok <= 0
+                lefts.each_with_index do |left,i|
+                    lvoks[i] <= 0
+                    # avs[i] <= 0
+                    woks[i] <= 0
+                end
+            end
             hif(req | run) do
                 run <= 1
                 # Computation request.
-                right.read(rv) { rvok <= 1 }
+                hif(~rvok) { right.read(rv) { rvok <= 1 } }
                 lefts.each_with_index do |left,i|
-                    left.read(lvs[i])  { lvoks[i] <= 1 }
+                    hif(~lvoks[i]) { left.read(lvs[i])  { lvoks[i] <= 1 } }
                     # accs[i].read(avs[i])
-                    hif(lvoks[i] & rvok) do
+                    hif(lvoks[i] & rvok & ~woks[i]) do
                         ack <= 1
                         run <= 0
-                        # accs[i].write(add.(avs[i],mul.(lvs[i],rv)))
                         seq do
                             avs[i] <= add.(avs[i],mul.(lvs[i],rv))
-                            accs[i].write(avs[i])
+                            accs[i].write(avs[i]) do
+                                woks[i] <= 1
+                                # seq do
+                                #     lvoks[i] <= 0
+                                #     rvok <= lvoks.reduce(:|)
+                                # end
+                            end
                         end
                     end
+                    hif (woks.reduce(:&)) do
+                        woks.each { |wok| wok <= 0 }
+                        lvoks.each { | lvok| lvok <=0 }
+                        rvok <= 0
+                    end
                 end
             end
-            helse do
-                rvok <= 0
-                lefts.each_with_index do |left,i|
-                    lvoks[i] <= 0
-                    # accs[i].write(0)
-                    avs[i] <= 0
-                end
-            end
+            helse { avs.each {|av| av <= 0 } }
+            # helse do
+            #     rvok <= 0
+            #     lefts.each_with_index do |left,i|
+            #         lvoks[i] <= 0
+            #         # accs[i].write(0)
+            #         avs[i] <= 0
+            #     end
+            # end
         end
     end