HDLRuby 2.3.6 → 2.3.7

checksums.yaml

@@ -1,7 +1,7 @@
 ---
 SHA256:
-  metadata.gz: 78fe6b35a5069fd78646d2486c3d03dd00c5b24efa6a9710e3acc1248cc35145
-  data.tar.gz: c98bd555da00c6d2cffd9b5f41d48d5b8e4dd9584dc42e943934dc438fede8be
+  metadata.gz: bb0dfd0d3f5fd062cd7e31f46eab82f0090e58eb8690a50a74106cfa32b5b9c2
+  data.tar.gz: 46f437035c02b4c8de14fb5033361b2d65cb6a7916887ca16a1dea67adadc8b9
 SHA512:
-  metadata.gz: 48acf3975e6f9d36b0257ad165b407ed27d949b61793a1628e983c793163668c0c09b2c734cf41c44343ad55f7195c3fc60eb168b9de18dac82e5ecd6f1c6d17
-  data.tar.gz: 7b028598447ab6bd940a077b184eb7bd27524e157185cb97ef28e25eb4760e187d8d7f0ea1fada54b549f6bd4bc6baf38706efe2505f6cfd26c215e6bce91955
+  metadata.gz: f6db11e75542e9b1f3e9064c32b3d8979ff3815ff661bfe8defc80f9625b671851a341366ad021a120305071e5f2099f95193e8a2332366460b967c6755a041f
+  data.tar.gz: 44a91392735fa86edc102ae6d20aa54dd85628e2efac5f4112731d2733bf7b555e4dce9bc39a086efbb5c3a1f1f0d2a4bb0e420be1f6251d26a505599bff526d

data/lib/HDLRuby/hdr_samples/with_linear.rb

@@ -22,9 +22,6 @@ system :testmat do
     mem_dual([8],256,clk,rst, rinc: :rst,winc: :rst).(:memL1)
     mem_dual([8],256,clk,rst, rinc: :rst,winc: :rst).(:memR)
     # Access ports.
-    # # memL0.branch(:rinc).inner :readL0
-    # # memL1.branch(:rinc).inner :readL1
-    # # memR.branch(:rinc).inner :readR
     # memL0.branch(:rinc).input :readL0
     # memL1.branch(:rinc).input :readL1
     # memR.branch(:rinc).input :readR
@@ -35,9 +32,9 @@ system :testmat do
 
     # Accumulators memory.
     mem_file([8],2,clk,rst,rinc: :rst).(:memAcc)
-    # # memAcc.branch(:anum).inner :accs
-    memAcc.branch(:anum).inout :accs
-    accs_out = [accs.wrap(0), accs.wrap(1)]
+    # memAcc.branch(:anum).inout :accs
+    # accs_out = [accs.wrap(0), accs.wrap(1)]
+    accs_out = [memAcc.branch(:anum).wrap(0), memAcc.branch(:anum).wrap(1)]
 
     # Layer 0 ack.
     inner :ack0
@@ -52,8 +49,6 @@ system :testmat do
     # Tarnslation result
     mem_file([8],2,clk,rst,rinc: :rst).(:memF)
     # Access ports.
-    # # memT.branch(:anum).inner :readT
-    # # memF.branch(:anum).inner :writeF
     memT.branch(:anum).input :readT
     memF.branch(:anum).output :writeF
     regRs = [ readT.wrap(0), readT.wrap(1) ]
@@ -72,8 +67,6 @@ system :testmat do
     # Input memories.
     mem_dual([8],2,clk,rst, rinc: :rst,winc: :rst).(:mem2L0)
     # Access ports.
-    # # mem2L0.branch(:rinc).inner :read2L0
-    # # memF.branch(:rinc).inner :readF
     # mem2L0.branch(:rinc).input :read2L0
     # memF.branch(:rinc).input :readF
 
@@ -93,11 +86,6 @@ system :testmat do
 
 
     # The memory initializer.
-    # # memL0.branch(:winc).inner :writeL0
-    # # memL1.branch(:winc).inner :writeL1
-    # # memR.branch(:winc).inner :writeR
-    # # memT.branch(:winc).inner :writeT
-    # # mem2L0.branch(:winc).inner :write2L0
     # memL0.branch(:winc).output :writeL0
     # memL1.branch(:winc).output :writeL1
     # memR.branch(:winc).output :writeR

data/lib/HDLRuby/std/channel.rb

@@ -325,6 +325,86 @@ module HDLRuby::High::Std
     end
 
 
+    ##
+    # Module giving the methods for accessing a channel instance.
+    module HchannelI
+        ## Performs a read on the channel using +args+ and +ruby_block+
+        #  as arguments.
+        #  NOTE:
+        #  * Will generate a port if not present.
+        #  * Will generate an error if a read is tempted while the read
+        #    port has been declared within another system.
+        def read(*args,&ruby_block)
+            # Is there a port to read?
+            unless self.read_port then
+                # No, generate a new one.
+                # Is it possible to be inout?
+                if self.inout? then
+                    # Yes, create an inout port.
+                    self.inout(HDLRuby.uniq_name)
+                else
+                    # No, create an input port.
+                    self.input(HDLRuby.uniq_name)
+                end
+            end
+            # Ensure the read port is within current system.
+            unless self.read_port.scope.system != HDLRuby::High.cur_system then
+                raise "Cannot read from a port external of current system for channel " + self.name
+            end
+            # Performs the read.
+            self.read_port.read(*args,&ruby_block)
+        end
+        
+        ## Performs a write on the channel using +args+ and +ruby_block+
+        #  as arguments.
+        #  NOTE:
+        #  * Will generate a port if not present.
+        #  * Will generate an error if a read is tempted while the read
+        #    port has been declared within another system.
+        def write(*args,&ruby_block)
+            # Is there a port to write?
+            unless self.write_port then
+                # No, generate a new one.
+                # Is it possible to be inout?
+                if self.inout? then
+                    # Yes, create an inout port.
+                    self.inout(HDLRuby.uniq_name)
+                else
+                    # No, create an output port.
+                    self.output(HDLRuby.uniq_name)
+                end
+            end
+            # Ensure the write port is within current system.
+            unless self.write_port.scope.system != HDLRuby::High.cur_system then
+                raise "Cannot write from a port external of current system for channel " + self.name
+            end
+            # Performs the write.
+            self.write_port.write(*args,&ruby_block)
+        end
+        
+
+        ## Performs a reset on the channel using +args+ and +ruby_block+
+        #  as arguments.
+        def reset(*args,&ruby_block)
+            # Gain access to the writer as local variable.
+            reseter_proc = @inout_reseter_proc
+            # # The context is the one of the writer.
+            # Execute the code generating the writer in context.
+            HDLRuby::High.space_push(@namespace)
+            HDLRuby::High.cur_block.open do
+                instance_exec(ruby_block,*args,&reseter_proc)
+            end
+            HDLRuby::High.space_pop
+        end
+
+
+        # Wrap with +args+ arguments.
+        def wrap(*args)
+            return ChannelB.new(self,*args)
+        end
+    end
+
+
 
     ## 
     # Describes a high-level channel instance.
@@ -864,12 +944,12 @@ module HDLRuby::High::Std
             # Ensure the port is not already existing.
             if @read_port then
                 raise "Read port already declared for channel instance: " +
-                    self.name
+                    self.name.to_s
             end
 
             if @write_port then
                 raise "Write port already declared for channel instance: " +
-                    self.name
+                    self.name.to_s
             end
 
             # Access the ports
@@ -1006,76 +1086,238 @@ module HDLRuby::High::Std
         #     return chp
         # end
 
+        # Standard channel access is given is HchannelI module.
+        include HchannelI
 
         
-        ## Performs a read on the channel using +args+ and +ruby_block+
-        #  as arguments.
-        #  NOTE:
-        #  * Will generate a port if not present.
-        #  * Will generate an error if a read is tempted while the read
-        #    port has been declared within another system.
-        def read(*args,&ruby_block)
-            # Is there a port to read?
-            unless self.read_port then
-                # No, generate a new one.
-                # Is it possible to be inout?
-                if self.inout? then
-                    # Yes, create an inout port.
-                    self.inout(HDLRuby.uniq_name)
-                else
-                    # No, create an input port.
-                    self.input(HDLRuby.uniq_name)
-                end
+        # ## Performs a read on the channel using +args+ and +ruby_block+
+        # #  as arguments.
+        # #  NOTE:
+        # #  * Will generate a port if not present.
+        # #  * Will generate an error if a read is tempted while the read
+        # #    port has been declared within another system.
+        # def read(*args,&ruby_block)
+        #     # Is there a port to read?
+        #     unless self.read_port then
+        #         # No, generate a new one.
+        #         # Is it possible to be inout?
+        #         if self.inout? then
+        #             # Yes, create an inout port.
+        #             self.inout(HDLRuby.uniq_name)
+        #         else
+        #             # No, create an input port.
+        #             self.input(HDLRuby.uniq_name)
+        #         end
+        #     end
+        #     # Ensure the read port is within current system.
+        #     unless self.read_port.scope.system != HDLRuby::High.cur_system then
+        #         raise "Cannot read from a port external of current system for channel " + self.name
+        #     end
+        #     # Performs the read.
+        #     self.read_port.read(*args,&ruby_block)
+        # end
+        # 
+        # ## Performs a write on the channel using +args+ and +ruby_block+
+        # #  as arguments.
+        # #  NOTE:
+        # #  * Will generate a port if not present.
+        # #  * Will generate an error if a read is tempted while the read
+        # #    port has been declared within another system.
+        # def write(*args,&ruby_block)
+        #     # Is there a port to write?
+        #     unless self.write_port then
+        #         # No, generate a new one.
+        #         # Is it possible to be inout?
+        #         if self.inout? then
+        #             # Yes, create an inout port.
+        #             self.inout(HDLRuby.uniq_name)
+        #         else
+        #             # No, create an output port.
+        #             self.output(HDLRuby.uniq_name)
+        #         end
+        #     end
+        #     # Ensure the write port is within current system.
+        #     unless self.write_port.scope.system != HDLRuby::High.cur_system then
+        #         raise "Cannot write from a port external of current system for channel " + self.name
+        #     end
+        #     # Performs the write.
+        #     self.write_port.write(*args,&ruby_block)
+        # end
+        # 
+
+        # ## Performs a reset on the channel using +args+ and +ruby_block+
+        # #  as arguments.
+        # def reset(*args,&ruby_block)
+        #     # Gain access to the writer as local variable.
+        #     reseter_proc = @inout_reseter_proc
+        #     # # The context is the one of the writer.
+        #     # Execute the code generating the writer in context.
+        #     HDLRuby::High.space_push(@namespace)
+        #     HDLRuby::High.cur_block.open do
+        #         instance_exec(ruby_block,*args,&reseter_proc)
+        #     end
+        #     HDLRuby::High.space_pop
+        # end
+    end
+
+    # Describes channel instance wrapper (Box) for fixing arugments.
+    class ChannelB
+        include HDLRuby::High::Hmissing
+        include HchannelI
+
+        # Create a new channel box over +channelI+ channel instance using
+        # +args+ for fixing the arguments as follows:
+        # It can also be three lists for seperate read, write and access
+        # procedures using named arguments as:
+        # read: <read arguments>, write: <write arguments>,
+        # access: <access arguments>
+        def initialize(channelI,*args)
+            # Ensure port is a channel port.
+            unless channelI.is_a?(ChannelI) || channel.is_a?(ChannelB)
+                raise "Invalid class for a channel instance: #{ch.class}"
             end
-            # Ensure the read port is within current system.
-            unless self.read_port.scope.system != HDLRuby::High.cur_system then
-                raise "Cannot read from a port external of current system for channel " + self.name
+            @channelI = channelI
+            # Process the arguments.
+            if args.size == 1 && args[0].is_a?(Hash) then
+                # Read, write and access are separated.
+                @args_read = args[0][:read]
+                @args_write = args[0][:write]
+                @args_access = args[0][:access]
+            else
+                @args_read = args
+                @args_write = args.clone
+                @args_access = args.clone
             end
-            # Performs the read.
-            self.read_port.read(*args,&ruby_block)
         end
+
+        # Delegates to the boxed channel instance.
+
+        # The name of the channel instance.
+        def name
+            return @channelI.name
+        end
+
+        # The scope the channel has been created in.
+        def scope
+            return @channelI.scope
+        end
+
+        # The namespace associated with the current execution when
+        # building a channel.
+        def namespace
+            return @channelI.namespace
+        end
+
+        # The read port if any.
+        def read_port
+            return @read_port
+        end
+
+        # The write port if any.
+        def write_port
+            return @write_port
+        end
+
+        # Methods used on the channel outside its definition.
         
-        ## Performs a write on the channel using +args+ and +ruby_block+
-        #  as arguments.
-        #  NOTE:
-        #  * Will generate a port if not present.
-        #  * Will generate an error if a read is tempted while the read
-        #    port has been declared within another system.
-        def write(*args,&ruby_block)
-            # Is there a port to write?
-            unless self.write_port then
-                # No, generate a new one.
-                # Is it possible to be inout?
-                if self.inout? then
-                    # Yes, create an inout port.
-                    self.inout(HDLRuby.uniq_name)
-                else
-                    # No, create an output port.
-                    self.output(HDLRuby.uniq_name)
-                end
+        # Gets branch channel +name+.
+        # NOTE: 
+        #  * +name+ can be of any type on purpose.
+        #  * The wrapping arguments are not transmitted to the branch.
+        def branch(name,*args)
+            return @channelI.branch(name,*args)
+        end
+
+        ## Tells if the channel support inout port.
+        def inout?
+            return @channelI.inout?
+        end
+
+
+        # Reader, writer and accesser side.
+
+        ## Declares the reader port as and assigned them to +name+.
+        def input(name = nil)
+            # Ensure name is a symbol.
+            name = HDLRuby.uniq_name unless name
+            name = name.to_sym
+            # Ensure the port is not already existing.
+            if @read_port then
+                raise "Read port already declared for channel instance: " +
+                    self.name
             end
-            # Ensure the write port is within current system.
-            unless self.write_port.scope.system != HDLRuby::High.cur_system then
-                raise "Cannot write from a port external of current system for channel " + self.name
+
+            # Create a read port for the encaspulted channel.
+            real_port = @channelI.read_port
+            real_port = @channelI.input unless real_port
+
+            # Wrap it to a new port using.
+            chp = real_port.wrap(read: @args_read)
+
+            HDLRuby::High.space_reg(name) { chp }
+            # Save the port in the channe to avoid conflicting declaration.
+            @read_port = chp
+            return chp
+        end
+
+        ## Declares the ports for the writer and assigned them to +name+.
+        def output(name = nil)
+            # Ensure name is a symbol.
+            name = HDLRuby.uniq_name unless name
+            name = name.to_sym
+            # Ensure the port is not already existing.
+            if @write_port then
+                raise "Read port already declared for channel instance: " +
+                    self.name
             end
-            # Performs the write.
-            self.write_port.write(*args,&ruby_block)
+
+            # Create a write port for the encaspulted channel.
+            real_port = @channelI.write_port
+            real_port = @channelI.output unless real_port
+
+            # Wrap it to a new port using.
+            chp = real_port.wrap(write: @args_write)
+
+            HDLRuby::High.space_reg(name) { chp }
+            # Save the port in the channe to avoid conflicting declaration.
+            @write_port = chp
+            return chp
         end
-        
 
-        ## Performs a reset on the channel using +args+ and +ruby_block+
-        #  as arguments.
-        def reset(*args,&ruby_block)
-            # Gain access to the writer as local variable.
-            reseter_proc = @inout_reseter_proc
-            # # The context is the one of the writer.
-            # Execute the code generating the writer in context.
-            HDLRuby::High.space_push(@namespace)
-            HDLRuby::High.cur_block.open do
-                instance_exec(ruby_block,*args,&reseter_proc)
+
+        ## Declares the accesser port and assigned them to +name+.
+        def inout(name = nil)
+            # Ensure name is a symbol.
+            name = HDLRuby.uniq_name unless name
+            name = name.to_sym
+            # Ensure the port is not already existing.
+            if @read_port then
+                raise "Read port already declared for channel instance: " +
+                    self.name
             end
-            HDLRuby::High.space_pop
+            if @write_port then
+                raise "Write port already declared for channel instance: " +
+                    self.name
+            end
+
+            # Create a write port for the encaspulted channel.
+            if @channelI.read_port == @channelI.write_port then
+                real_port = @channelI.read_port
+                real_port = @channelI.inout unless real_port
+            else
+                raise "Inout port not supported for channel #{@channelI}"
+            end
+
+            # Wrap it to a new port using.
+            chp = real_port.wrap(read: @args_read, write: @args_write)
+
+            HDLRuby::High.space_reg(name) { chp }
+            # Save the port in the channe to avoid conflicting declaration.
+            @write_port = chp
+            @read_port = chp
+            return chp
         end
+
     end
 
 

data/lib/HDLRuby/version.rb

@@ -1,3 +1,3 @@
 module HDLRuby
-  VERSION = "2.3.6"
+  VERSION = "2.3.7"
 end

metadata

@@ -1,14 +1,14 @@
 --- !ruby/object:Gem::Specification
 name: HDLRuby
 version: !ruby/object:Gem::Version
-  version: 2.3.6
+  version: 2.3.7
 platform: ruby
 authors:
 - Lovic Gauthier
 autorequire: 
 bindir: exe
 cert_chain: []
-date: 2020-08-30 00:00:00.000000000 Z
+date: 2020-09-06 00:00:00.000000000 Z
 dependencies:
 - !ruby/object:Gem::Dependency
   name: bundler