HDLRuby 2.3.4 → 2.4.1
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- checksums.yaml +4 -4
- data/README.md +1 -0
- data/lib/HDLRuby/hdr_samples/with_fixpoint.rb +9 -0
- data/lib/HDLRuby/hdr_samples/with_linear.rb +3 -15
- data/lib/HDLRuby/hdr_samples/with_multi_channels.rb +290 -0
- data/lib/HDLRuby/hdrcc.rb +10 -1
- data/lib/HDLRuby/hruby_high.rb +14 -3
- data/lib/HDLRuby/hruby_low.rb +107 -8
- data/lib/HDLRuby/hruby_low2c.rb +10 -5
- data/lib/HDLRuby/hruby_low_mutable.rb +90 -2
- data/lib/HDLRuby/hruby_low_resolve.rb +1 -0
- data/lib/HDLRuby/hruby_low_without_connection.rb +14 -0
- data/lib/HDLRuby/hruby_tools.rb +2 -2
- data/lib/HDLRuby/sim/hruby_sim.h +75 -37
- data/lib/HDLRuby/sim/hruby_sim_calc.c +69 -0
- data/lib/HDLRuby/sim/hruby_sim_core.c +29 -6
- data/lib/HDLRuby/sim/hruby_sim_vcd.c +215 -0
- data/lib/HDLRuby/sim/hruby_sim_vizualize.c +51 -12
- data/lib/HDLRuby/std/channel.rb +311 -63
- data/lib/HDLRuby/std/linear.rb +16 -8
- data/lib/HDLRuby/std/memory.rb +1 -1
- data/lib/HDLRuby/version.rb +1 -1
- metadata +4 -2
data/lib/HDLRuby/std/linear.rb
CHANGED
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@@ -214,6 +214,14 @@ module HDLRuby::High::Std
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par(ev) do
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ack <= 0
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run <= 0
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+
hif(~run) do
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+
rvok <= 0
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+
lefts.each_with_index do |left,i|
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lvoks[i] <= 0
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+
# accs[i].write(0)
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avs[i] <= 0
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end
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+
end
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hif(req | run) do
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run <= 1
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# Computation request.
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@@ -232,14 +240,14 @@ module HDLRuby::High::Std
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end
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end
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end
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-
helse do
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-
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-
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-
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-
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-
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-
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-
end
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+
# helse do
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# rvok <= 0
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# lefts.each_with_index do |left,i|
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# lvoks[i] <= 0
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# # accs[i].write(0)
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# avs[i] <= 0
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# end
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# end
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end
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end
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data/lib/HDLRuby/std/memory.rb
CHANGED
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@@ -568,7 +568,7 @@ HDLRuby::High::Std.channel(:mem_dual) do |typ,size,clk,rst,br_rsts = {}|
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568
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# using +target+ as target of access result.
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569
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writer do |blk,target|
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# On reset the read trigger is 0.
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-
rst
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+
rst = send(rst_name)
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top_block.unshift do
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# Initialize the address so that the next access is at address 0.
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hif(rst == 1) { abus_w <= -1 }
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data/lib/HDLRuby/version.rb
CHANGED
metadata
CHANGED
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@@ -1,14 +1,14 @@
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1
1
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--- !ruby/object:Gem::Specification
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2
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name: HDLRuby
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version: !ruby/object:Gem::Version
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-
version: 2.
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+
version: 2.4.1
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platform: ruby
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authors:
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- Lovic Gauthier
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autorequire:
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bindir: exe
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cert_chain: []
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-
date: 2020-
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+
date: 2020-09-24 00:00:00.000000000 Z
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dependencies:
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- !ruby/object:Gem::Dependency
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name: bundler
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@@ -123,6 +123,7 @@ files:
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- lib/HDLRuby/hdr_samples/with_linear.rb
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- lib/HDLRuby/hdr_samples/with_loop.rb
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- lib/HDLRuby/hdr_samples/with_memory.rb
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+
- lib/HDLRuby/hdr_samples/with_multi_channels.rb
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- lib/HDLRuby/hdr_samples/with_reconf.rb
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- lib/HDLRuby/hdrcc.rb
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- lib/HDLRuby/high_samples/_adder_fault.rb
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@@ -262,6 +263,7 @@ files:
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- lib/HDLRuby/sim/hruby_sim_calc.c
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- lib/HDLRuby/sim/hruby_sim_core.c
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- lib/HDLRuby/sim/hruby_sim_list.c
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+
- lib/HDLRuby/sim/hruby_sim_vcd.c
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- lib/HDLRuby/sim/hruby_sim_vizualize.c
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- lib/HDLRuby/sim/hruby_value_pool.c
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- lib/HDLRuby/std/channel.rb
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