HDLRuby 2.11.8 → 2.11.9

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data/lib/HDLRuby/hdrcc.rb CHANGED
@@ -641,23 +641,23 @@ elsif $options[:clang] then
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  # top_system = $top_system
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  # Preprocess the HW description for valid C generation.
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  $top_system.each_systemT_deep do |systemT|
644
- HDLRuby.show "seq2seq step..."
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+ HDLRuby.show? "seq2seq step..."
645
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  # Coverts the par blocks in seq blocks to seq blocks to match
646
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  # the simulation engine.
647
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  systemT.par_in_seq2seq!
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- HDLRuby.show "#{Time.now}#{show_mem}"
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- HDLRuby.show "connections_to_behaviors step..."
648
+ HDLRuby.show? "#{Time.now}#{show_mem}"
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+ HDLRuby.show? "connections_to_behaviors step..."
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  # Converts the connections to behaviors.
651
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  systemT.connections_to_behaviors!
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- HDLRuby.show "#{Time.now}#{show_mem}"
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+ HDLRuby.show? "#{Time.now}#{show_mem}"
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  # Break the RefConcat.
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- HDLRuby.show "concat_assigns step..."
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+ HDLRuby.show? "concat_assigns step..."
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  systemT.break_concat_assigns!
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- HDLRuby.show "#{Time.now}#{show_mem}"
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+ HDLRuby.show? "#{Time.now}#{show_mem}"
657
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  # Explicits the types.
658
- HDLRuby.show "explicit_types step..."
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+ HDLRuby.show? "explicit_types step..."
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  systemT.explicit_types!
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- HDLRuby.show "#{Time.now}#{show_mem}"
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+ HDLRuby.show? "#{Time.now}#{show_mem}"
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  end
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  # Generate the C.
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  if $options[:multiple] then
@@ -788,8 +788,12 @@ elsif $options[:clang] then
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  " Then execute:\n hruby_simulator"
789
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  end
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  # Use it.
791
+ HDLRuby.show "Compiling C code of the simulator..."
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  Kernel.system("#{cc_cmd} -o3 -o hruby_simulator *.c -lpthread")
793
+ HDLRuby.show "#{Time.now}#{show_mem}"
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+ HDLRuby.show "Executing the simulator..."
792
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  Kernel.system("./hruby_simulator")
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+ HDLRuby.show "#{Time.now}#{show_mem}"
793
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  end
794
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  elsif $options[:verilog] then
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  # warn("Verilog HDL output is not available yet... but it will be soon, promise!")
@@ -800,25 +804,25 @@ elsif $options[:verilog] then
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  # HDLRuby.show "casts_without_expression! step..."
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  # systemT.casts_without_expression!
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  # HDLRuby.show Time.now
803
- HDLRuby.show "to_upper_space! step..."
807
+ HDLRuby.show? "to_upper_space! step..."
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  systemT.to_upper_space!
805
- HDLRuby.show "#{Time.now}#{show_mem}"
809
+ HDLRuby.show? "#{Time.now}#{show_mem}"
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  end
807
- HDLRuby.show "to_global_space! step (global)..."
811
+ HDLRuby.show? "to_global_space! step (global)..."
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  $top_system.to_global_systemTs!
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- HDLRuby.show "#{Time.now}#{show_mem}"
813
+ HDLRuby.show? "#{Time.now}#{show_mem}"
810
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  $top_system.each_systemT_deep do |systemT|
811
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  ## systemT.break_types!
812
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  ## systemT.expand_types!
813
- HDLRuby.show "par_in_seq2seq! step..."
817
+ HDLRuby.show? "par_in_seq2seq! step..."
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  systemT.par_in_seq2seq!
815
- HDLRuby.show "#{Time.now}#{show_mem}"
816
- HDLRuby.show "initial_concat_to_timed! step..."
819
+ HDLRuby.show? "#{Time.now}#{show_mem}"
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+ HDLRuby.show? "initial_concat_to_timed! step..."
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  systemT.initial_concat_to_timed!
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- HDLRuby.show "#{Time.now}#{show_mem}"
819
- HDLRuby.show "with_port! step..."
822
+ HDLRuby.show? "#{Time.now}#{show_mem}"
823
+ HDLRuby.show? "with_port! step..."
820
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  systemT.with_port!
821
- HDLRuby.show "#{Time.now}#{show_mem}"
825
+ HDLRuby.show? "#{Time.now}#{show_mem}"
822
826
  end
823
827
  # # Verilog generation
824
828
  # $output << top_system.to_verilog
@@ -1,3 +1,3 @@
1
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  module HDLRuby
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- VERSION = "2.11.8"
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+ VERSION = "2.11.9"
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  end
metadata CHANGED
@@ -1,14 +1,14 @@
1
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  --- !ruby/object:Gem::Specification
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  name: HDLRuby
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3
  version: !ruby/object:Gem::Version
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- version: 2.11.8
4
+ version: 2.11.9
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  platform: ruby
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  authors:
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  - Lovic Gauthier
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  autorequire:
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9
  bindir: exe
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  cert_chain: []
11
- date: 2022-11-10 00:00:00.000000000 Z
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+ date: 2022-11-11 00:00:00.000000000 Z
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  dependencies:
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  - !ruby/object:Gem::Dependency
14
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  name: bundler