HDLRuby 2.11.8 → 2.11.10
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- checksums.yaml +4 -4
- data/ext/hruby_sim/hruby_sim_calc.c +1 -1
- data/lib/HDLRuby/hdrcc.rb +22 -18
- data/lib/HDLRuby/version.rb +1 -1
- metadata +2 -2
checksums.yaml
CHANGED
@@ -1,7 +1,7 @@
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1
1
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---
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SHA256:
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metadata.gz:
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data.tar.gz:
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metadata.gz: e1abbd8fa7d81751f96e4728d9de4feca367a2fd279f53ba819403de04ed32a7
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4
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data.tar.gz: b820d83dffce7d785de1ec0ebffdab501fbd555808b694c5df70c96f4f599fbd
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5
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SHA512:
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metadata.gz:
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data.tar.gz:
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metadata.gz: 03d6925eef2143a0eead9c30147abe8617597dddddb2911a7b4cee3998a01df9d55a310eab0464676e6f1e58d7f300a377ed6da9cfda96fa66c8d8fa01dadd3e
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7
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data.tar.gz: fe6e7c90d8f4913d5cf680c3a65993624f90585d52387d2c04a94d454a6c2d295e22c0d152f4248fd678c13183c6d7c33e58824063a32dc76b58eb0651c341fd
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@@ -1874,7 +1874,7 @@ static Value sub_value_numeric(Value src0, Value src1, Value dst) {
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1874
1874
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* @param dst the destination value
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1875
1875
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* @return dst */
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1876
1876
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static Value mul_value_numeric(Value src0, Value src1, Value dst) {
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1877
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-
printf("mul_value_numeric with src0->data_int=%llx src1->data_int=%llx\n",src0->data_int, src1->data_int);
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1877
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+
// printf("mul_value_numeric with src0->data_int=%llx src1->data_int=%llx\n",src0->data_int, src1->data_int);
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1878
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/* Sets state of the destination using the first source. */
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1879
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dst->type = src0->type;
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1880
1880
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dst->numeric = 1;
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data/lib/HDLRuby/hdrcc.rb
CHANGED
@@ -641,23 +641,23 @@ elsif $options[:clang] then
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641
641
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# top_system = $top_system
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642
642
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# Preprocess the HW description for valid C generation.
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643
643
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$top_system.each_systemT_deep do |systemT|
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644
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-
HDLRuby.show "seq2seq step..."
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644
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+
HDLRuby.show? "seq2seq step..."
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645
645
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# Coverts the par blocks in seq blocks to seq blocks to match
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646
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# the simulation engine.
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647
647
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systemT.par_in_seq2seq!
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648
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-
HDLRuby.show "#{Time.now}#{show_mem}"
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649
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-
HDLRuby.show "connections_to_behaviors step..."
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648
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+
HDLRuby.show? "#{Time.now}#{show_mem}"
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649
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+
HDLRuby.show? "connections_to_behaviors step..."
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650
650
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# Converts the connections to behaviors.
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651
651
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systemT.connections_to_behaviors!
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652
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-
HDLRuby.show "#{Time.now}#{show_mem}"
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652
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+
HDLRuby.show? "#{Time.now}#{show_mem}"
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653
653
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# Break the RefConcat.
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654
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-
HDLRuby.show "concat_assigns step..."
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654
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+
HDLRuby.show? "concat_assigns step..."
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655
655
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systemT.break_concat_assigns!
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656
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-
HDLRuby.show "#{Time.now}#{show_mem}"
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656
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+
HDLRuby.show? "#{Time.now}#{show_mem}"
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657
657
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# Explicits the types.
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658
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-
HDLRuby.show "explicit_types step..."
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658
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+
HDLRuby.show? "explicit_types step..."
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659
659
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systemT.explicit_types!
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660
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-
HDLRuby.show "#{Time.now}#{show_mem}"
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660
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+
HDLRuby.show? "#{Time.now}#{show_mem}"
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661
661
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end
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662
662
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# Generate the C.
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663
663
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if $options[:multiple] then
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@@ -788,8 +788,12 @@ elsif $options[:clang] then
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788
788
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" Then execute:\n hruby_simulator"
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789
789
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end
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790
790
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# Use it.
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791
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+
HDLRuby.show "Compiling C code of the simulator..."
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791
792
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Kernel.system("#{cc_cmd} -o3 -o hruby_simulator *.c -lpthread")
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793
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+
HDLRuby.show "#{Time.now}#{show_mem}"
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794
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HDLRuby.show "Executing the simulator..."
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792
795
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Kernel.system("./hruby_simulator")
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796
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+
HDLRuby.show "#{Time.now}#{show_mem}"
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793
797
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end
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794
798
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elsif $options[:verilog] then
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795
799
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# warn("Verilog HDL output is not available yet... but it will be soon, promise!")
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@@ -800,25 +804,25 @@ elsif $options[:verilog] then
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800
804
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# HDLRuby.show "casts_without_expression! step..."
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801
805
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# systemT.casts_without_expression!
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802
806
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# HDLRuby.show Time.now
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803
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-
HDLRuby.show "to_upper_space! step..."
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807
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+
HDLRuby.show? "to_upper_space! step..."
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804
808
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systemT.to_upper_space!
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805
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-
HDLRuby.show "#{Time.now}#{show_mem}"
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809
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+
HDLRuby.show? "#{Time.now}#{show_mem}"
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806
810
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end
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807
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-
HDLRuby.show "to_global_space! step (global)..."
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811
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+
HDLRuby.show? "to_global_space! step (global)..."
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808
812
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$top_system.to_global_systemTs!
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809
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-
HDLRuby.show "#{Time.now}#{show_mem}"
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813
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+
HDLRuby.show? "#{Time.now}#{show_mem}"
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810
814
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$top_system.each_systemT_deep do |systemT|
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811
815
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## systemT.break_types!
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812
816
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## systemT.expand_types!
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813
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-
HDLRuby.show "par_in_seq2seq! step..."
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817
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+
HDLRuby.show? "par_in_seq2seq! step..."
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814
818
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systemT.par_in_seq2seq!
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815
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-
HDLRuby.show "#{Time.now}#{show_mem}"
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816
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-
HDLRuby.show "initial_concat_to_timed! step..."
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819
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+
HDLRuby.show? "#{Time.now}#{show_mem}"
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820
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+
HDLRuby.show? "initial_concat_to_timed! step..."
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817
821
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systemT.initial_concat_to_timed!
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818
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-
HDLRuby.show "#{Time.now}#{show_mem}"
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819
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-
HDLRuby.show "with_port! step..."
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822
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+
HDLRuby.show? "#{Time.now}#{show_mem}"
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823
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HDLRuby.show? "with_port! step..."
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820
824
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systemT.with_port!
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821
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-
HDLRuby.show "#{Time.now}#{show_mem}"
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825
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+
HDLRuby.show? "#{Time.now}#{show_mem}"
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822
826
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end
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823
827
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# # Verilog generation
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824
828
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# $output << top_system.to_verilog
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data/lib/HDLRuby/version.rb
CHANGED
metadata
CHANGED
@@ -1,14 +1,14 @@
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1
1
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--- !ruby/object:Gem::Specification
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2
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name: HDLRuby
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3
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version: !ruby/object:Gem::Version
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4
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-
version: 2.11.
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+
version: 2.11.10
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platform: ruby
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authors:
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- Lovic Gauthier
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autorequire:
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bindir: exe
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cert_chain: []
|
11
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-
date: 2022-
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11
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+
date: 2022-12-01 00:00:00.000000000 Z
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dependencies:
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13
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- !ruby/object:Gem::Dependency
|
14
14
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name: bundler
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