GBRb 0.1.0 → 0.2.0
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- checksums.yaml +4 -4
- data/.gitignore +0 -1
- data/README.md +9 -1
- data/bin/gbrb +3 -3
- data/doc/images/blargg_cpu.png +0 -0
- data/doc/images/cpu_01.png +0 -0
- data/doc/images/cpu_03.png +0 -0
- data/doc/images/cpu_04.png +0 -0
- data/doc/images/cpu_05.png +0 -0
- data/doc/images/cpu_06.png +0 -0
- data/doc/images/cpu_07.png +0 -0
- data/doc/images/cpu_08.png +0 -0
- data/doc/images/cpu_09.png +0 -0
- data/doc/images/cpu_10.png +0 -0
- data/doc/images/cpu_11.png +0 -0
- data/doc/images/nintendo_logo.png +0 -0
- data/doc/images/opus5.png +0 -0
- data/doc/images/test.gb.png +0 -0
- data/doc/images/ttt.png +0 -0
- data/lib/gbrb.rb +7 -0
- data/lib/gbrb/cartridge.rb +21 -8
- data/lib/gbrb/cartridge/cartridge.rb +187 -0
- data/lib/gbrb/cpu/concatenated_register.rb +1 -1
- data/lib/gbrb/cpu/z80.rb +575 -498
- data/lib/gbrb/gb.rb +102 -32
- data/lib/gbrb/graphics.rb +1 -1
- data/lib/gbrb/graphics/gpu.rb +38 -30
- data/lib/gbrb/graphics/mode_clock.rb +31 -30
- data/lib/gbrb/graphics/screen_client.rb +3 -2
- data/lib/gbrb/instruction_set.rb +16 -0
- data/lib/gbrb/instruction_set/arithmetic.rb +238 -0
- data/lib/gbrb/instruction_set/bitwise.rb +64 -0
- data/lib/gbrb/instruction_set/boolean.rb +61 -0
- data/lib/gbrb/instruction_set/call.rb +40 -0
- data/lib/gbrb/instruction_set/carry.rb +23 -0
- data/lib/gbrb/instruction_set/cpl.rb +12 -0
- data/lib/gbrb/instruction_set/daa.rb +33 -0
- data/lib/gbrb/instruction_set/instruction.rb +23 -0
- data/lib/gbrb/instruction_set/jump.rb +47 -0
- data/lib/gbrb/instruction_set/ld.rb +241 -0
- data/lib/gbrb/instruction_set/return.rb +43 -0
- data/lib/gbrb/instruction_set/rotate.rb +178 -0
- data/lib/gbrb/instruction_set/rst.rb +16 -0
- data/lib/gbrb/instruction_set/special.rb +37 -0
- data/lib/gbrb/instruction_set/stack.rb +34 -0
- data/lib/gbrb/instruction_set/swap.rb +32 -0
- data/lib/gbrb/mmu.rb +60 -35
- data/lib/gbrb/options.rb +54 -0
- data/lib/gbrb/timer.rb +114 -0
- data/lib/gbrb/version.rb +1 -1
- data/misc/dump_diff +133 -0
- data/perf/cpu_perf_spec.rb +2 -2
- data/spec/gbrb/cartridge/cartridge_spec.rb +19 -0
- data/spec/gbrb/cartridge/mbc1_spec.rb +83 -0
- data/spec/gbrb/cpu/z80_spec.rb +92 -2
- data/spec/gbrb/{cpu/instruction_spec.rb → instruction_set/arithmetic_spec.rb} +21 -100
- data/spec/gbrb/instruction_set/boolean_spec.rb +50 -0
- data/spec/gbrb/instruction_set/instruction_spec.rb +22 -0
- data/spec/gbrb/instruction_set/ld_spec.rb +21 -0
- data/spec/gbrb/instruction_set/special_spec.rb +22 -0
- data/spec/gbrb/mmu_spec.rb +1 -1
- data/spec/gbrb/timer_spec.rb +26 -0
- metadata +53 -9
- data/lib/gbrb/cpu/instruction.rb +0 -648
- data/spec/gbrb/cartridge_spec.rb +0 -19
- data/spec/gbrb/graphics/mode_clock_spec.rb +0 -82
checksums.yaml
CHANGED
@@ -1,7 +1,7 @@
|
|
1
1
|
---
|
2
2
|
SHA1:
|
3
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-
metadata.gz:
|
4
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-
data.tar.gz:
|
3
|
+
metadata.gz: 53ae49f1e3bd7aa96606a792468a02387302ee0a
|
4
|
+
data.tar.gz: ac9ef838d2b6768abf31269ff20c1f76606e2e5e
|
5
5
|
SHA512:
|
6
|
-
metadata.gz:
|
7
|
-
data.tar.gz:
|
6
|
+
metadata.gz: 9ab562b51196b84d6ab2401f39ef11130deeb5d070d389dc3388b6a01a92826cb72dbe5ca7e37b512cdff657f01e6ede9f08f1cf99b974bd5a79145f3b5475ab
|
7
|
+
data.tar.gz: ee7b759ed9298ff9fcd552fa5826ad2247876027b51b082a6f9d524258175a4b25faa5b61b7110259e2ee10f975fcc28239c0ba7c4fc5bea432b397ea5a1e898
|
data/.gitignore
CHANGED
data/README.md
CHANGED
@@ -27,10 +27,18 @@ Nintendo's Game Boy is well documented across the internet and a quick search wi
|
|
27
27
|
Or you can save some time and visit the [wiki](https://github.com/rampantmonkey/GBRb/wiki) which has links to my research.
|
28
28
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29
29
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## Code Status
|
30
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-
[![Build Status](https://travis-ci.org/rampantmonkey/GBRb.png?branch=master)](https://travis-ci.org/rampantmonkey/GBRb)
|
30
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+
[![Build Status](https://travis-ci.org/rampantmonkey/GBRb.png?branch=master)](https://travis-ci.org/rampantmonkey/GBRb)
|
31
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+
[![Code Climate](https://codeclimate.com/github/rampantmonkey/GBRb.png)](https://codeclimate.com/github/rampantmonkey/GBRb)
|
32
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+
[![Coverage Status](https://coveralls.io/repos/rampantmonkey/GBRb/badge.png)](https://coveralls.io/r/rampantmonkey/GBRb)
|
31
33
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32
34
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## Progress
|
33
35
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![Boot Sequence which displays the Nintendo Logo](https://github.com/rampantmonkey/GBRb/raw/master/doc/images/nintendo_logo.png)
|
36
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+
![Background tiles drawn for Tic-Tac-Toe](https://github.com/rampantmonkey/GBRb/raw/master/doc/images/ttt.png)
|
37
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+
![Background for OPUS-5 test game discussed in jsGB](https://github.com/rampantmonkey/GBRb/raw/master/doc/images/opus5.png)
|
38
|
+
### Testing
|
39
|
+
![Basic Character and Graphics Test (TEST.GB)](https://github.com/rampantmonkey/GBRb/raw/master/doc/images/test.gb.png)
|
40
|
+
![Blargg CPU Tests](https://github.com/rampantmonkey/GBRb/raw/master/doc/images/blargg_cpu.png)
|
41
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+
|
34
42
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|
35
43
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## Roadmap
|
36
44
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- Improve Performance
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data/bin/gbrb
CHANGED
@@ -2,11 +2,11 @@
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2
2
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|
3
3
|
$:.unshift File.expand_path('../../lib', __FILE__)
|
4
4
|
|
5
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+
require 'gbrb/options'
|
5
6
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require 'gbrb/gb'
|
6
7
|
|
7
|
-
|
8
|
-
debug = ARGV.length > 1 and ARGV[1] == '-D'
|
8
|
+
options = GBRb::Options.new ARGV
|
9
9
|
|
10
|
-
gameboy = GBRb::GB.new
|
10
|
+
gameboy = GBRb::GB.new options
|
11
11
|
gameboy.power_on
|
12
12
|
|
Binary file
|
Binary file
|
Binary file
|
Binary file
|
Binary file
|
Binary file
|
Binary file
|
Binary file
|
Binary file
|
Binary file
|
Binary file
|
Binary file
|
Binary file
|
Binary file
|
data/doc/images/ttt.png
ADDED
Binary file
|
data/lib/gbrb.rb
CHANGED
@@ -1,9 +1,16 @@
|
|
1
1
|
require "gbrb/version"
|
2
2
|
require "gbrb/cpu"
|
3
3
|
require "gbrb/mmu"
|
4
|
+
require "gbrb/cartridge"
|
4
5
|
|
5
6
|
module GBRb
|
6
7
|
MEMORY_BANK_SIZE = 0x4000
|
7
8
|
|
9
|
+
INTERRUPT_ENABLED_FLAG_ADDR = 0xffff
|
10
|
+
INTERRUPT_FLAG_ADDR = 0xff0f
|
11
|
+
TIMER_OVERFLOW_IRQ = 0x04
|
12
|
+
TIMER_OVERFLOW_IR_ADDR = 0x50
|
13
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+
|
14
|
+
|
8
15
|
class InvalidCartridge < StandardError; end
|
9
16
|
end
|
data/lib/gbrb/cartridge.rb
CHANGED
@@ -1,15 +1,28 @@
|
|
1
|
-
require_relative '
|
2
|
-
|
3
|
-
require 'pathname'
|
1
|
+
require_relative 'cartridge/cartridge'
|
4
2
|
|
5
3
|
module GBRb
|
6
|
-
|
7
|
-
def
|
8
|
-
|
4
|
+
module Cartridge
|
5
|
+
def self.load_cartridge path
|
6
|
+
f = File.open(path, 'r')
|
7
|
+
c = build_cartridge f
|
8
|
+
f.close
|
9
|
+
puts "Cartridge Info"
|
10
|
+
puts c.info
|
11
|
+
puts "File Path: #{File.absolute_path(path)}"
|
12
|
+
puts '*'*80
|
13
|
+
c
|
14
|
+
rescue Errno::ENOENT
|
15
|
+
raise InvalidCartridge, path
|
9
16
|
end
|
10
17
|
|
11
|
-
|
12
|
-
|
18
|
+
private
|
19
|
+
def self.build_cartridge file
|
20
|
+
c = BaseCartridge.new file
|
21
|
+
file.rewind
|
22
|
+
if c.type.include? 'MBC1'
|
23
|
+
c = MBC1.new file
|
24
|
+
end
|
25
|
+
c
|
13
26
|
end
|
14
27
|
end
|
15
28
|
end
|
@@ -0,0 +1,187 @@
|
|
1
|
+
require_relative '../../gbrb'
|
2
|
+
|
3
|
+
require 'pathname'
|
4
|
+
|
5
|
+
module GBRb
|
6
|
+
class BaseCartridge
|
7
|
+
HEADER_START = 0x0100
|
8
|
+
HEADER_END = 0x014f
|
9
|
+
TITLE_OFFSET = 0x34
|
10
|
+
TITLE_LENGTH = 0xf
|
11
|
+
TYPE_OFFSET = 0x47
|
12
|
+
DESTINATION_OFFSET = 0x4a
|
13
|
+
RAM_BANK_SIZE = 0x2000
|
14
|
+
def initialize raw_data
|
15
|
+
@rom_banks = raw_data.read.each_byte.each_slice(MEMORY_BANK_SIZE).to_a
|
16
|
+
@header = rom_bank(0)[HEADER_START..HEADER_END]
|
17
|
+
@current_rom_bank = rom_bank 1
|
18
|
+
@rom_bank_number = 1
|
19
|
+
post_initialize
|
20
|
+
end
|
21
|
+
|
22
|
+
def post_initialize; end
|
23
|
+
|
24
|
+
def rom_bank number=0
|
25
|
+
@rom_banks.fetch(number) { Array.new MEMORY_BANK_SIZE, 0 }
|
26
|
+
end
|
27
|
+
|
28
|
+
def ram_bank number=0
|
29
|
+
@ram_banks.fetch(number) { Array.new 0x1fff, 0 }
|
30
|
+
end
|
31
|
+
|
32
|
+
def read_byte addr
|
33
|
+
case addr
|
34
|
+
when 0x0000..0x3fff
|
35
|
+
@rom_banks[0][addr & (MEMORY_BANK_SIZE - 1)]
|
36
|
+
when 0x4000..0x7fff
|
37
|
+
rom_bank(@rom_bank_number)[addr & (MEMORY_BANK_SIZE - 1)]
|
38
|
+
when 0xa000..0xbfff
|
39
|
+
if @current_ram_bank
|
40
|
+
@current_ram_bank[addr & (RAM_BANK_SIZE - 1)]
|
41
|
+
else
|
42
|
+
0
|
43
|
+
end
|
44
|
+
end
|
45
|
+
end
|
46
|
+
|
47
|
+
def write_byte addr, value
|
48
|
+
@current_ram_bank[addr & (ram_bank_size - 1)] = value if (0xa000..0xbfff).cover? addr
|
49
|
+
end
|
50
|
+
|
51
|
+
def info
|
52
|
+
"Title: #{title}\n" <<
|
53
|
+
"Type: #{type}\n" <<
|
54
|
+
"Destination: #{destination}\n" <<
|
55
|
+
""
|
56
|
+
end
|
57
|
+
|
58
|
+
def title
|
59
|
+
header_field(TITLE_OFFSET, TITLE_LENGTH).select{|el| (0x20..0x7e).cover? el}
|
60
|
+
.map(&:chr)
|
61
|
+
.join
|
62
|
+
end
|
63
|
+
|
64
|
+
def type
|
65
|
+
case header_field TYPE_OFFSET
|
66
|
+
when 0x00
|
67
|
+
"ROM ONLY"
|
68
|
+
when 0x01
|
69
|
+
"MBC1"
|
70
|
+
when 0x02
|
71
|
+
"MBC1+RAM"
|
72
|
+
when 0x03
|
73
|
+
"MBC1+RAM+BATTERY"
|
74
|
+
when 0x05
|
75
|
+
"MBC2"
|
76
|
+
when 0x06
|
77
|
+
"MBC2+BATTERY"
|
78
|
+
when 0x08
|
79
|
+
"ROM+RAM"
|
80
|
+
when 0x09
|
81
|
+
"ROM+RAM+BATTERY"
|
82
|
+
when 0x0b
|
83
|
+
"MMM01"
|
84
|
+
when 0x0c
|
85
|
+
"MMM01+RAM"
|
86
|
+
when 0x0d
|
87
|
+
"MMM01+RAM+BATTERY"
|
88
|
+
when 0x0f
|
89
|
+
"MBC3+TIMER+BATTERY"
|
90
|
+
when 0x10
|
91
|
+
"MBC3+TIMER+RAM+BATTERY"
|
92
|
+
when 0x11
|
93
|
+
"MBC3"
|
94
|
+
when 0x12
|
95
|
+
"MBC3+RAM"
|
96
|
+
when 0x13
|
97
|
+
"MBC3+RAM+BATTERY"
|
98
|
+
when 0x15
|
99
|
+
"MBC4"
|
100
|
+
when 0x16
|
101
|
+
"MBC4+RAM"
|
102
|
+
when 0x17
|
103
|
+
"MBC4+RAM+BATTERY"
|
104
|
+
when 0x19
|
105
|
+
"MBC5"
|
106
|
+
when 0x1a
|
107
|
+
"MBC5+RAM"
|
108
|
+
when 0x1b
|
109
|
+
"MBC5+RAM+BATTERY"
|
110
|
+
when 0x1c
|
111
|
+
"MBC5+RUMBLE"
|
112
|
+
when 0x1d
|
113
|
+
"MBC5+RUMBLE+RAM"
|
114
|
+
when 0x1e
|
115
|
+
"MBC5+RUMBLE+RAM+BATTERY"
|
116
|
+
when 0xfc
|
117
|
+
"POCKET CAMERA"
|
118
|
+
when 0xfd
|
119
|
+
"BANDAI TAMA5"
|
120
|
+
when 0xfe
|
121
|
+
"HuC3"
|
122
|
+
when 0xff
|
123
|
+
"HuC1+RAM+BATTERY"
|
124
|
+
else
|
125
|
+
"INVALID"
|
126
|
+
end
|
127
|
+
end
|
128
|
+
|
129
|
+
def destination
|
130
|
+
case header_field DESTINATION_OFFSET
|
131
|
+
when 0x00
|
132
|
+
"Japanese"
|
133
|
+
when 0x01
|
134
|
+
"Non-Japanese"
|
135
|
+
else
|
136
|
+
"Unknown"
|
137
|
+
end
|
138
|
+
end
|
139
|
+
|
140
|
+
def header_field offset, length=1
|
141
|
+
if length == 1
|
142
|
+
@header[offset]
|
143
|
+
else
|
144
|
+
@header.slice offset, length
|
145
|
+
end
|
146
|
+
end
|
147
|
+
end
|
148
|
+
|
149
|
+
class MBC1 < BaseCartridge
|
150
|
+
def post_initialize
|
151
|
+
@mode = :rom
|
152
|
+
@rom_bank_number = 1
|
153
|
+
@ram_bank_number = 0
|
154
|
+
@ram_status = :disabled
|
155
|
+
@ram_banks = Array.new 3, Array.new(0x1fff, 0)
|
156
|
+
@current_rom_bank = rom_bank @rom_bank_number
|
157
|
+
end
|
158
|
+
|
159
|
+
def write_byte addr, value
|
160
|
+
STDERR.puts "Cartridge Write #{value.to_s 16} @ #{addr.to_s 16}"
|
161
|
+
case addr
|
162
|
+
when 0x0000..0x1fff
|
163
|
+
@ram_status = value & 0xf == 0xa ? :enabled : :disabled
|
164
|
+
when 0x2000..0x3fff
|
165
|
+
value += 1 if value % 0x20 == 0
|
166
|
+
@rom_bank_number = (@rom_bank_number & 0b11100000) | (value & 0b00011111)
|
167
|
+
@current_rom_bank = rom_bank @rom_bank_number
|
168
|
+
when 0x4000..0x5fff
|
169
|
+
if @mode == :rom
|
170
|
+
@rom_bank_number |= (value & 0b11) << 5
|
171
|
+
@current_rom_bank = rom_bank @rom_bank_number
|
172
|
+
elsif @mode == :ram
|
173
|
+
@ram_bank_number = value & 0b11
|
174
|
+
@current_ram_bank = ram_bank @ram_bank_number
|
175
|
+
end
|
176
|
+
when 0x6000..0x7fff
|
177
|
+
if value == 0x00
|
178
|
+
@mode = :rom
|
179
|
+
elsif value == 0x01
|
180
|
+
@mode = :ram
|
181
|
+
end
|
182
|
+
when 0xa000..0xbfff
|
183
|
+
@current_ram_bank[addr & 0x1fff] = value
|
184
|
+
end
|
185
|
+
end
|
186
|
+
end
|
187
|
+
end
|
data/lib/gbrb/cpu/z80.rb
CHANGED
@@ -1,7 +1,7 @@
|
|
1
1
|
require_relative '../cpu'
|
2
2
|
require_relative '../mmu'
|
3
|
+
require_relative '../instruction_set'
|
3
4
|
require_relative 'register_ensemble'
|
4
|
-
require_relative 'instruction'
|
5
5
|
|
6
6
|
module GBRb
|
7
7
|
module CPU
|
@@ -11,6 +11,8 @@ module GBRb
|
|
11
11
|
|
12
12
|
attr_reader :mmu
|
13
13
|
|
14
|
+
attr_writer :halted, :interrupts, :interrupt_before_halt
|
15
|
+
|
14
16
|
def initialize mmu=MMU.new
|
15
17
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@mmu = mmu
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reset
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@@ -24,257 +26,275 @@ module GBRb
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@registers.pc.store 0x0000
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@last_m = 0
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end
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def instructions
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i[
|
37
|
+
i[0x00] = InstructionSet::Instruction.new
|
38
|
+
i[0x01] = InstructionSet::LdD16.new :bc
|
39
|
+
i[0x02] = InstructionSet::Ldnna.new :bc
|
40
|
+
i[0x03] = InstructionSet::Inc.new(:bc, 2, 8, false)
|
41
|
+
i[0x04] = InstructionSet::Inc.new(:b)
|
42
|
+
i[0x05] = InstructionSet::Dec.new(:b)
|
43
|
+
i[0x06] = InstructionSet::LdD8.new :b
|
44
|
+
i[0x07] = InstructionSet::Rl.new :a, true, false, 1, 4, false
|
45
|
+
i[0x08] = InstructionSet::Lda16sp.new
|
46
|
+
i[0x09] = InstructionSet::AddHl.new(:bc)
|
47
|
+
i[0x0a] = InstructionSet::Ldann.new :bc
|
48
|
+
i[0x0b] = InstructionSet::Dec.new(:bc, 2, 8, false)
|
49
|
+
i[0x0c] = InstructionSet::Inc.new(:c)
|
50
|
+
i[0x0d] = InstructionSet::Dec.new(:c)
|
51
|
+
i[0x0e] = InstructionSet::LdD8.new :c
|
52
|
+
i[0x0f] = InstructionSet::Rr.new :a, true, false, 1, 4, false
|
53
|
+
|
54
|
+
i[0x10] = InstructionSet::Stop.new
|
55
|
+
i[0x11] = InstructionSet::LdD16.new :de
|
56
|
+
i[0x12] = InstructionSet::Ldnna.new :de
|
57
|
+
i[0x13] = InstructionSet::Inc.new(:de, 2, 8, false)
|
58
|
+
i[0x14] = InstructionSet::Inc.new(:d)
|
59
|
+
i[0x15] = InstructionSet::Dec.new(:d)
|
60
|
+
i[0x16] = InstructionSet::LdD8.new :d
|
61
|
+
i[0x17] = InstructionSet::Rl.new :a, false, false, 1, 4, false
|
62
|
+
i[0x18] = InstructionSet::Jump.new :none
|
63
|
+
i[0x19] = InstructionSet::AddHl.new(:de)
|
64
|
+
i[0x1a] = InstructionSet::Ldann.new :de
|
65
|
+
i[0x1b] = InstructionSet::Dec.new(:de, 2, 8, false)
|
66
|
+
i[0x1c] = InstructionSet::Inc.new(:e)
|
67
|
+
i[0x1d] = InstructionSet::Dec.new(:e)
|
68
|
+
i[0x1e] = InstructionSet::LdD8.new :e
|
69
|
+
i[0x1f] = InstructionSet::Rr.new :a, false, false, 1, 4, false
|
70
|
+
|
71
|
+
i[0x20] = InstructionSet::Jump.new(:nz)
|
72
|
+
i[0x21] = InstructionSet::LdD16.new :hl
|
73
|
+
i[0x22] = InstructionSet::Ldhlia.new
|
74
|
+
i[0x23] = InstructionSet::Inc.new(:hl, 2, 8, false)
|
75
|
+
i[0x24] = InstructionSet::Inc.new(:h)
|
76
|
+
i[0x25] = InstructionSet::Dec.new(:h)
|
77
|
+
i[0x26] = InstructionSet::LdD8.new :h
|
78
|
+
i[0x27] = InstructionSet::Daa.new
|
79
|
+
i[0x28] = InstructionSet::Jump.new :z
|
80
|
+
i[0x29] = InstructionSet::AddHl.new(:hl)
|
81
|
+
i[0x2a] = InstructionSet::Ldahli.new
|
82
|
+
i[0x2b] = InstructionSet::Dec.new(:hl, 2, 8, false)
|
83
|
+
i[0x2c] = InstructionSet::Inc.new(:l)
|
84
|
+
i[0x2d] = InstructionSet::Dec.new(:l)
|
85
|
+
i[0x2e] = InstructionSet::LdD8.new :l
|
86
|
+
i[0x2f] = InstructionSet::Cpl.new(1, 4)
|
87
|
+
|
88
|
+
i[0x30] = InstructionSet::Jump.new :nc
|
89
|
+
i[0x31] = InstructionSet::LdD16.new :sp
|
90
|
+
i[0x32] = InstructionSet::Ldhlda.new
|
91
|
+
i[0x33] = InstructionSet::Inc.new(:sp, 2, 8, false)
|
92
|
+
i[0x34] = InstructionSet::Inc.new(:hl, 3, 12, true, true)
|
93
|
+
i[0x35] = InstructionSet::Dec.new(:hl, 3, 12, true, true)
|
94
|
+
i[0x36] = InstructionSet::LdhlD8.new
|
95
|
+
i[0x37] = InstructionSet::Scf.new
|
96
|
+
i[0x38] = InstructionSet::Jump.new :c
|
97
|
+
i[0x39] = InstructionSet::AddHl.new(:sp)
|
98
|
+
i[0x3a] = InstructionSet::Ldahld.new
|
99
|
+
i[0x3b] = InstructionSet::Dec.new(:sp, 2, 8, false)
|
100
|
+
i[0x3c] = InstructionSet::Inc.new(:a)
|
101
|
+
i[0x3d] = InstructionSet::Dec.new(:a)
|
102
|
+
i[0x3e] = InstructionSet::LdD8.new :a
|
103
|
+
i[0x3f] = InstructionSet::Ccf.new
|
104
|
+
|
105
|
+
i[0x40] = InstructionSet::Ld.new(:b, :b)
|
106
|
+
i[0x41] = InstructionSet::Ld.new(:b, :c)
|
107
|
+
i[0x42] = InstructionSet::Ld.new(:b, :d)
|
108
|
+
i[0x43] = InstructionSet::Ld.new(:b, :e)
|
109
|
+
i[0x44] = InstructionSet::Ld.new(:b, :h)
|
110
|
+
i[0x45] = InstructionSet::Ld.new(:b, :l)
|
111
|
+
i[0x46] = InstructionSet::Ldnhl.new(:b)
|
112
|
+
i[0x47] = InstructionSet::Ld.new(:b, :a)
|
113
|
+
i[0x48] = InstructionSet::Ld.new(:c, :b)
|
114
|
+
i[0x49] = InstructionSet::Ld.new(:c, :c)
|
115
|
+
i[0x4a] = InstructionSet::Ld.new(:c, :d)
|
116
|
+
i[0x4b] = InstructionSet::Ld.new(:c, :e)
|
117
|
+
i[0x4c] = InstructionSet::Ld.new(:c, :h)
|
118
|
+
i[0x4d] = InstructionSet::Ld.new(:c, :l)
|
119
|
+
i[0x4e] = InstructionSet::Ldnhl.new(:c)
|
120
|
+
i[0x4f] = InstructionSet::Ld.new(:c, :a)
|
121
|
+
|
122
|
+
i[0x50] = InstructionSet::Ld.new(:d, :b)
|
123
|
+
i[0x51] = InstructionSet::Ld.new(:d, :c)
|
124
|
+
i[0x52] = InstructionSet::Ld.new(:d, :d)
|
125
|
+
i[0x53] = InstructionSet::Ld.new(:d, :e)
|
126
|
+
i[0x54] = InstructionSet::Ld.new(:d, :h)
|
127
|
+
i[0x55] = InstructionSet::Ld.new(:d, :l)
|
128
|
+
i[0x56] = InstructionSet::Ldnhl.new(:d)
|
129
|
+
i[0x57] = InstructionSet::Ld.new(:d, :a)
|
130
|
+
i[0x58] = InstructionSet::Ld.new(:e, :b)
|
131
|
+
i[0x59] = InstructionSet::Ld.new(:e, :c)
|
132
|
+
i[0x5a] = InstructionSet::Ld.new(:e, :d)
|
133
|
+
i[0x5b] = InstructionSet::Ld.new(:e, :e)
|
134
|
+
i[0x5c] = InstructionSet::Ld.new(:e, :h)
|
135
|
+
i[0x5d] = InstructionSet::Ld.new(:e, :l)
|
136
|
+
i[0x5e] = InstructionSet::Ldnhl.new(:e)
|
137
|
+
i[0x5f] = InstructionSet::Ld.new(:e, :a)
|
138
|
+
|
139
|
+
i[0x60] = InstructionSet::Ld.new(:h, :b)
|
140
|
+
i[0x61] = InstructionSet::Ld.new(:h, :c)
|
141
|
+
i[0x62] = InstructionSet::Ld.new(:h, :d)
|
142
|
+
i[0x63] = InstructionSet::Ld.new(:h, :e)
|
143
|
+
i[0x64] = InstructionSet::Ld.new(:h, :h)
|
144
|
+
i[0x65] = InstructionSet::Ld.new(:h, :l)
|
145
|
+
i[0x66] = InstructionSet::Ldnhl.new(:h)
|
146
|
+
i[0x67] = InstructionSet::Ld.new(:h, :a)
|
147
|
+
i[0x68] = InstructionSet::Ld.new(:l, :b)
|
148
|
+
i[0x69] = InstructionSet::Ld.new(:l, :c)
|
149
|
+
i[0x6a] = InstructionSet::Ld.new(:l, :d)
|
150
|
+
i[0x6b] = InstructionSet::Ld.new(:l, :e)
|
151
|
+
i[0x6c] = InstructionSet::Ld.new(:l, :h)
|
152
|
+
i[0x6d] = InstructionSet::Ld.new(:l, :l)
|
153
|
+
i[0x6e] = InstructionSet::Ldnhl.new(:l)
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i[0x6f] = InstructionSet::Ld.new(:l, :a)
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i[0x70] = InstructionSet::Ldhln.new :b
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i[0x71] = InstructionSet::Ldhln.new :c
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i[0x72] = InstructionSet::Ldhln.new :d
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i[0x73] = InstructionSet::Ldhln.new :e
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i[0x74] = InstructionSet::Ldhln.new :h
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i[0x75] = InstructionSet::Ldhln.new :l
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i[0x76] = InstructionSet::Halt.new
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i[0x77] = InstructionSet::Ldhln.new :a
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i[0x78] = InstructionSet::Ld.new(:a, :b)
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+
i[0x79] = InstructionSet::Ld.new(:a, :c)
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+
i[0x7a] = InstructionSet::Ld.new(:a, :d)
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+
i[0x7b] = InstructionSet::Ld.new(:a, :e)
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+
i[0x7c] = InstructionSet::Ld.new(:a, :h)
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+
i[0x7d] = InstructionSet::Ld.new(:a, :l)
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+
i[0x7e] = InstructionSet::Ldnhl.new(:a)
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i[0x7f] = InstructionSet::Ld.new(:a, :a)
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+
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i[0x80] = InstructionSet::Add.new(:b)
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+
i[0x81] = InstructionSet::Add.new(:c)
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175
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+
i[0x82] = InstructionSet::Add.new(:d)
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+
i[0x83] = InstructionSet::Add.new(:e)
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177
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+
i[0x84] = InstructionSet::Add.new(:h)
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+
i[0x85] = InstructionSet::Add.new(:l)
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+
i[0x86] = InstructionSet::Add.new(:hl, 2, 8, true)
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+
i[0x87] = InstructionSet::Add.new(:a)
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+
i[0x88] = InstructionSet::Adc.new(:b)
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182
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+
i[0x89] = InstructionSet::Adc.new(:c)
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183
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+
i[0x8a] = InstructionSet::Adc.new(:d)
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184
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+
i[0x8b] = InstructionSet::Adc.new(:e)
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185
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+
i[0x8c] = InstructionSet::Adc.new(:h)
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186
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+
i[0x8d] = InstructionSet::Adc.new(:l)
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187
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+
i[0x8e] = InstructionSet::Adc.new(:hl, 2, 8, true)
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+
i[0x8f] = InstructionSet::Adc.new(:a)
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+
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+
i[0x90] = InstructionSet::Sub.new(:b)
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191
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+
i[0x91] = InstructionSet::Sub.new(:c)
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+
i[0x92] = InstructionSet::Sub.new(:d)
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+
i[0x93] = InstructionSet::Sub.new(:e)
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194
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+
i[0x94] = InstructionSet::Sub.new(:h)
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+
i[0x95] = InstructionSet::Sub.new(:l)
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+
i[0x96] = InstructionSet::Sub.new(:hl, 2, 8, true)
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197
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+
i[0x97] = InstructionSet::Sub.new(:a)
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+
i[0x98] = InstructionSet::Sbc.new(:b)
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+
i[0x99] = InstructionSet::Sbc.new(:c)
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+
i[0x9a] = InstructionSet::Sbc.new(:d)
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+
i[0x9b] = InstructionSet::Sbc.new(:e)
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202
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+
i[0x9c] = InstructionSet::Sbc.new(:h)
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+
i[0x9d] = InstructionSet::Sbc.new(:l)
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+
i[0x9e] = InstructionSet::Sbc.new(:hl, 2, 8, true)
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+
i[0x9f] = InstructionSet::Sbc.new(:a)
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+
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+
i[0xa0] = InstructionSet::And.new(:b)
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208
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+
i[0xa1] = InstructionSet::And.new(:c)
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|
+
i[0xa2] = InstructionSet::And.new(:d)
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|
+
i[0xa3] = InstructionSet::And.new(:e)
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211
|
+
i[0xa4] = InstructionSet::And.new(:h)
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212
|
+
i[0xa5] = InstructionSet::And.new(:l)
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213
|
+
i[0xa6] = InstructionSet::And.new(:hl, 2, 8, true)
|
214
|
+
i[0xa7] = InstructionSet::And.new(:a)
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215
|
+
i[0xa8] = InstructionSet::Xor.new(:b)
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216
|
+
i[0xa9] = InstructionSet::Xor.new(:c)
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217
|
+
i[0xaa] = InstructionSet::Xor.new(:d)
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+
i[0xab] = InstructionSet::Xor.new(:e)
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219
|
+
i[0xac] = InstructionSet::Xor.new(:h)
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220
|
+
i[0xad] = InstructionSet::Xor.new(:l)
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221
|
+
i[0xae] = InstructionSet::Xor.new(:hl, 2, 8, true)
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222
|
+
i[0xaf] = InstructionSet::Xor.new(:a)
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223
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+
|
224
|
+
i[0xb0] = InstructionSet::Or.new(:b)
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225
|
+
i[0xb1] = InstructionSet::Or.new(:c)
|
226
|
+
i[0xb2] = InstructionSet::Or.new(:d)
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227
|
+
i[0xb3] = InstructionSet::Or.new(:e)
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228
|
+
i[0xb4] = InstructionSet::Or.new(:h)
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229
|
+
i[0xb5] = InstructionSet::Or.new(:l)
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|
+
i[0xb6] = InstructionSet::Or.new(:hl, 2, 8, true)
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+
i[0xb7] = InstructionSet::Or.new(:a)
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|
+
i[0xb8] = InstructionSet::Cp.new(:b)
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|
+
i[0xb9] = InstructionSet::Cp.new(:c)
|
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|
+
i[0xba] = InstructionSet::Cp.new(:d)
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|
+
i[0xbb] = InstructionSet::Cp.new(:e)
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|
+
i[0xbc] = InstructionSet::Cp.new(:h)
|
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|
+
i[0xbd] = InstructionSet::Cp.new(:l)
|
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|
+
i[0xbe] = InstructionSet::Cp.new(:hl, 2, 8, true)
|
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|
+
i[0xbf] = InstructionSet::Cp.new(:a)
|
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+
|
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|
+
i[0xc0] = InstructionSet::Ret.new :nz
|
242
|
+
i[0xc1] = InstructionSet::Pop.new(:bc)
|
243
|
+
i[0xc2] = InstructionSet::Jump.new(:nz, 3, 16, 12, 2)
|
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|
+
i[0xc3] = InstructionSet::Jump.new :none, 4, 16, 16, 2
|
245
|
+
i[0xc4] = InstructionSet::Call.new :nz
|
246
|
+
i[0xc5] = InstructionSet::Push.new(:bc)
|
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|
+
i[0xc6] = InstructionSet::Add.new :a, 2, 8, false, 1
|
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|
+
i[0xc7] = InstructionSet::Rst.new(0x00)
|
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|
+
i[0xc8] = InstructionSet::Ret.new :z
|
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|
+
i[0xc9] = InstructionSet::Ret.new :none, 4, 16, 16
|
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|
+
i[0xca] = InstructionSet::Jump.new :z, 3, 16, 12, 2
|
252
|
+
i[0xcb] = InstructionSet::Instruction.new
|
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|
+
i[0xcc] = InstructionSet::Call.new :z
|
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|
+
i[0xcd] = InstructionSet::Call.new :none
|
255
|
+
i[0xce] = InstructionSet::Adc.new(:a, 2, 8, false, 1)
|
256
|
+
i[0xcf] = InstructionSet::Rst.new(0x08)
|
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|
+
|
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|
+
i[0xd0] = InstructionSet::Ret.new :nc
|
259
|
+
i[0xd1] = InstructionSet::Pop.new(:de)
|
260
|
+
i[0xd2] = InstructionSet::Jump.new :nc, 3, 16, 12, 2
|
261
|
+
i[0xd4] = InstructionSet::Call.new :nc
|
262
|
+
i[0xd5] = InstructionSet::Push.new(:de)
|
263
|
+
i[0xd6] = InstructionSet::Sub.new :a, 2, 8, false, 1
|
264
|
+
i[0xd7] = InstructionSet::Rst.new(0x10)
|
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|
+
i[0xd8] = InstructionSet::Ret.new :c
|
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|
+
i[0xd9] = InstructionSet::Ret.new :none
|
267
|
+
i[0xda] = InstructionSet::Jump.new :c, 3, 16, 12, 2
|
268
|
+
i[0xdc] = InstructionSet::Call.new :c
|
269
|
+
i[0xdd] = InstructionSet::Instruction.new 0, 0
|
270
|
+
i[0xde] = InstructionSet::Sbc.new(:a, 2, 8, false, 1)
|
271
|
+
i[0xdf] = InstructionSet::Rst.new(0x18)
|
272
|
+
|
273
|
+
i[0xe0] = InstructionSet::Ldh.new nil, :a, true, false
|
274
|
+
i[0xe1] = InstructionSet::Pop.new(:hl)
|
275
|
+
i[0xe2] = InstructionSet::Ldca.new
|
276
|
+
i[0xe5] = InstructionSet::Push.new(:hl)
|
277
|
+
i[0xe6] = InstructionSet::And.new(nil, 2, 8, false, 1)
|
278
|
+
i[0xe7] = InstructionSet::Rst.new(0x20)
|
279
|
+
i[0xe8] = InstructionSet::AddSpR8.new
|
280
|
+
i[0xe9] = InstructionSet::Jump.new :none, 1, 4, 4, 0
|
281
|
+
i[0xea] = InstructionSet::Lda16a.new
|
282
|
+
i[0xee] = InstructionSet::Xor.new(:a, 2, 8, false, 1)
|
283
|
+
i[0xef] = InstructionSet::Rst.new(0x28)
|
284
|
+
|
285
|
+
i[0xf0] = InstructionSet::Ldh.new :a, nil, false, true
|
286
|
+
i[0xf1] = InstructionSet::Pop.new(:af)
|
287
|
+
i[0xf2] = InstructionSet::Ldac.new
|
288
|
+
i[0xf3] = InstructionSet::DisableInterrupts.new
|
289
|
+
i[0xf5] = InstructionSet::Push.new(:af)
|
290
|
+
i[0xf6] = InstructionSet::Or.new :a, 2, 8, false, 1
|
291
|
+
i[0xf7] = InstructionSet::Rst.new(0x30)
|
292
|
+
i[0xf8] = InstructionSet::Ldhlsp.new
|
293
|
+
i[0xf9] = InstructionSet::Ldsphl.new
|
294
|
+
i[0xfa] = InstructionSet::Ldaa16.new
|
295
|
+
i[0xfb] = InstructionSet::EnableInterrupts.new
|
296
|
+
i[0xfe] = InstructionSet::Cp.new nil, 2, 8, false, 1
|
297
|
+
i[0xff] = InstructionSet::Rst.new(0x38)
|
278
298
|
|
279
299
|
@instructions = i
|
280
300
|
end
|
@@ -284,252 +304,277 @@ module GBRb
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i = Array.new 256, :not_implemented
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i[0x00] = Rl.new :b, true
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i[0x01] = Rl.new :c, true
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i[0x02] = Rl.new :d, true
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i[0x03] = Rl.new :e, true
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i[0x04] = Rl.new :h, true
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i[0x05] = Rl.new :l, true
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i[0x06] = Rl.new :hl, true, true
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i[0x07] = Rl.new :a, true
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i[0x08] = Rr.new :b, true
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i[0x09] = Rr.new :c, true
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i[0x0a] = Rr.new :d, true
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i[0x0b] = Rr.new :e, true
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i[0x0c] = Rr.new :h, true
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i[0x0d] = Rr.new :l, true
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i[0x0e] = Rr.new :hl, true, true
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i[0x0f] = Rr.new :a, true
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-
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i[0x10] = Rl.new :b
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i[0x11] = Rl.new :c
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i[0x12] = Rl.new :d
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i[0x13] = Rl.new :e
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i[0x14] = Rl.new :h
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i[0x15] = Rl.new :l
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i[0x16] = Rl.new :hl, false, true
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i[0x17] = Rl.new :a
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i[0x18] = Rr.new :b
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i[0x19] = Rr.new :c
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i[0x1a] = Rr.new :d
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i[0x1b] = Rr.new :e
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i[0x1c] = Rr.new :h
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i[0x1d] = Rr.new :l
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i[0x1e] = Rr.new :hl, false, true
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i[0x1f] = Rr.new :a
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492
|
-
i[
|
493
|
-
i[
|
494
|
-
i[
|
495
|
-
i[
|
496
|
-
i[
|
497
|
-
i[
|
498
|
-
i[
|
499
|
-
|
500
|
-
i[
|
501
|
-
i[
|
502
|
-
i[
|
503
|
-
i[
|
504
|
-
i[
|
505
|
-
i[
|
506
|
-
i[
|
507
|
-
|
508
|
-
i[
|
509
|
-
i[
|
510
|
-
i[
|
511
|
-
i[
|
512
|
-
i[
|
513
|
-
i[
|
514
|
-
i[
|
515
|
-
i[
|
516
|
-
|
517
|
-
i[
|
518
|
-
i[
|
519
|
-
i[
|
520
|
-
i[
|
521
|
-
i[
|
522
|
-
i[
|
523
|
-
i[
|
524
|
-
|
525
|
-
i[
|
526
|
-
i[
|
527
|
-
i[
|
528
|
-
i[
|
529
|
-
i[
|
530
|
-
i[
|
531
|
-
i[
|
532
|
-
i[
|
307
|
+
i[0x00] = InstructionSet::Rl.new :b, true
|
308
|
+
i[0x01] = InstructionSet::Rl.new :c, true
|
309
|
+
i[0x02] = InstructionSet::Rl.new :d, true
|
310
|
+
i[0x03] = InstructionSet::Rl.new :e, true
|
311
|
+
i[0x04] = InstructionSet::Rl.new :h, true
|
312
|
+
i[0x05] = InstructionSet::Rl.new :l, true
|
313
|
+
i[0x06] = InstructionSet::Rl.new :hl, true, true
|
314
|
+
i[0x07] = InstructionSet::Rl.new :a, true
|
315
|
+
i[0x08] = InstructionSet::Rr.new :b, true
|
316
|
+
i[0x09] = InstructionSet::Rr.new :c, true
|
317
|
+
i[0x0a] = InstructionSet::Rr.new :d, true
|
318
|
+
i[0x0b] = InstructionSet::Rr.new :e, true
|
319
|
+
i[0x0c] = InstructionSet::Rr.new :h, true
|
320
|
+
i[0x0d] = InstructionSet::Rr.new :l, true
|
321
|
+
i[0x0e] = InstructionSet::Rr.new :hl, true, true
|
322
|
+
i[0x0f] = InstructionSet::Rr.new :a, true
|
323
|
+
|
324
|
+
i[0x10] = InstructionSet::Rl.new :b
|
325
|
+
i[0x11] = InstructionSet::Rl.new :c
|
326
|
+
i[0x12] = InstructionSet::Rl.new :d
|
327
|
+
i[0x13] = InstructionSet::Rl.new :e
|
328
|
+
i[0x14] = InstructionSet::Rl.new :h
|
329
|
+
i[0x15] = InstructionSet::Rl.new :l
|
330
|
+
i[0x16] = InstructionSet::Rl.new :hl, false, true
|
331
|
+
i[0x17] = InstructionSet::Rl.new :a
|
332
|
+
i[0x18] = InstructionSet::Rr.new :b
|
333
|
+
i[0x19] = InstructionSet::Rr.new :c
|
334
|
+
i[0x1a] = InstructionSet::Rr.new :d
|
335
|
+
i[0x1b] = InstructionSet::Rr.new :e
|
336
|
+
i[0x1c] = InstructionSet::Rr.new :h
|
337
|
+
i[0x1d] = InstructionSet::Rr.new :l
|
338
|
+
i[0x1e] = InstructionSet::Rr.new :hl, false, true
|
339
|
+
i[0x1f] = InstructionSet::Rr.new :a
|
340
|
+
|
341
|
+
i[0x20] = InstructionSet::Sla.new :b
|
342
|
+
i[0x21] = InstructionSet::Sla.new :c
|
343
|
+
i[0x22] = InstructionSet::Sla.new :d
|
344
|
+
i[0x23] = InstructionSet::Sla.new :e
|
345
|
+
i[0x24] = InstructionSet::Sla.new :h
|
346
|
+
i[0x25] = InstructionSet::Sla.new :l
|
347
|
+
i[0x26] = InstructionSet::Sla.new :hl, true, 3, 12
|
348
|
+
i[0x27] = InstructionSet::Sla.new :a
|
349
|
+
i[0x28] = InstructionSet::Sra.new :b
|
350
|
+
i[0x29] = InstructionSet::Sra.new :c
|
351
|
+
i[0x2a] = InstructionSet::Sra.new :d
|
352
|
+
i[0x2b] = InstructionSet::Sra.new :e
|
353
|
+
i[0x2c] = InstructionSet::Sra.new :h
|
354
|
+
i[0x2d] = InstructionSet::Sra.new :l
|
355
|
+
i[0x2e] = InstructionSet::Sra.new :hl, true, 3, 12
|
356
|
+
i[0x2f] = InstructionSet::Sra.new :a
|
357
|
+
|
358
|
+
i[0x30] = InstructionSet::Swap.new :b
|
359
|
+
i[0x31] = InstructionSet::Swap.new :c
|
360
|
+
i[0x32] = InstructionSet::Swap.new :d
|
361
|
+
i[0x33] = InstructionSet::Swap.new :e
|
362
|
+
i[0x34] = InstructionSet::Swap.new :h
|
363
|
+
i[0x35] = InstructionSet::Swap.new :l
|
364
|
+
i[0x36] = InstructionSet::Swap.new :hl, 2, 16, true
|
365
|
+
i[0x37] = InstructionSet::Swap.new :a
|
366
|
+
i[0x38] = InstructionSet::Srl.new :b
|
367
|
+
i[0x39] = InstructionSet::Srl.new :c
|
368
|
+
i[0x3a] = InstructionSet::Srl.new :d
|
369
|
+
i[0x3b] = InstructionSet::Srl.new :e
|
370
|
+
i[0x3c] = InstructionSet::Srl.new :h
|
371
|
+
i[0x3d] = InstructionSet::Srl.new :l
|
372
|
+
i[0x3e] = InstructionSet::Srl.new :hl, true, 2, 16
|
373
|
+
i[0x3f] = InstructionSet::Srl.new :a
|
374
|
+
|
375
|
+
i[0x40] = InstructionSet::Bit.new 0, :b
|
376
|
+
i[0x41] = InstructionSet::Bit.new 0, :c
|
377
|
+
i[0x42] = InstructionSet::Bit.new 0, :d
|
378
|
+
i[0x43] = InstructionSet::Bit.new 0, :e
|
379
|
+
i[0x44] = InstructionSet::Bit.new 0, :h
|
380
|
+
i[0x45] = InstructionSet::Bit.new 0, :l
|
381
|
+
i[0x46] = InstructionSet::Bit.new 0, :hl, true
|
382
|
+
i[0x47] = InstructionSet::Bit.new 0, :a
|
383
|
+
i[0x48] = InstructionSet::Bit.new 1, :b
|
384
|
+
i[0x49] = InstructionSet::Bit.new 1, :c
|
385
|
+
i[0x4a] = InstructionSet::Bit.new 1, :d
|
386
|
+
i[0x4b] = InstructionSet::Bit.new 1, :e
|
387
|
+
i[0x4c] = InstructionSet::Bit.new 1, :h
|
388
|
+
i[0x4d] = InstructionSet::Bit.new 1, :l
|
389
|
+
i[0x4e] = InstructionSet::Bit.new 1, :hl, true
|
390
|
+
i[0x4f] = InstructionSet::Bit.new 1, :a
|
391
|
+
|
392
|
+
i[0x50] = InstructionSet::Bit.new 2, :b
|
393
|
+
i[0x51] = InstructionSet::Bit.new 2, :c
|
394
|
+
i[0x52] = InstructionSet::Bit.new 2, :d
|
395
|
+
i[0x53] = InstructionSet::Bit.new 2, :e
|
396
|
+
i[0x54] = InstructionSet::Bit.new 2, :h
|
397
|
+
i[0x55] = InstructionSet::Bit.new 2, :l
|
398
|
+
i[0x56] = InstructionSet::Bit.new 2, :hl, true
|
399
|
+
i[0x57] = InstructionSet::Bit.new 2, :a
|
400
|
+
i[0x58] = InstructionSet::Bit.new 3, :b
|
401
|
+
i[0x59] = InstructionSet::Bit.new 3, :c
|
402
|
+
i[0x5a] = InstructionSet::Bit.new 3, :d
|
403
|
+
i[0x5b] = InstructionSet::Bit.new 3, :e
|
404
|
+
i[0x5c] = InstructionSet::Bit.new 3, :h
|
405
|
+
i[0x5d] = InstructionSet::Bit.new 3, :l
|
406
|
+
i[0x5e] = InstructionSet::Bit.new 3, :hl, true
|
407
|
+
i[0x5f] = InstructionSet::Bit.new 3, :a
|
408
|
+
|
409
|
+
i[0x60] = InstructionSet::Bit.new 4, :b
|
410
|
+
i[0x61] = InstructionSet::Bit.new 4, :c
|
411
|
+
i[0x62] = InstructionSet::Bit.new 4, :d
|
412
|
+
i[0x63] = InstructionSet::Bit.new 4, :e
|
413
|
+
i[0x64] = InstructionSet::Bit.new 4, :h
|
414
|
+
i[0x65] = InstructionSet::Bit.new 4, :l
|
415
|
+
i[0x66] = InstructionSet::Bit.new 4, :hl, true
|
416
|
+
i[0x67] = InstructionSet::Bit.new 4, :a
|
417
|
+
i[0x68] = InstructionSet::Bit.new 5, :b
|
418
|
+
i[0x69] = InstructionSet::Bit.new 5, :c
|
419
|
+
i[0x6a] = InstructionSet::Bit.new 5, :d
|
420
|
+
i[0x6b] = InstructionSet::Bit.new 5, :e
|
421
|
+
i[0x6c] = InstructionSet::Bit.new 5, :h
|
422
|
+
i[0x6d] = InstructionSet::Bit.new 5, :l
|
423
|
+
i[0x6e] = InstructionSet::Bit.new 5, :hl, true
|
424
|
+
i[0x6f] = InstructionSet::Bit.new 5, :a
|
425
|
+
|
426
|
+
i[0x70] = InstructionSet::Bit.new 6, :b
|
427
|
+
i[0x71] = InstructionSet::Bit.new 6, :c
|
428
|
+
i[0x72] = InstructionSet::Bit.new 6, :d
|
429
|
+
i[0x73] = InstructionSet::Bit.new 6, :e
|
430
|
+
i[0x74] = InstructionSet::Bit.new 6, :h
|
431
|
+
i[0x75] = InstructionSet::Bit.new 6, :l
|
432
|
+
i[0x76] = InstructionSet::Bit.new 6, :hl, true
|
433
|
+
i[0x77] = InstructionSet::Bit.new 6, :a
|
434
|
+
i[0x78] = InstructionSet::Bit.new 7, :b
|
435
|
+
i[0x79] = InstructionSet::Bit.new 7, :c
|
436
|
+
i[0x7a] = InstructionSet::Bit.new 7, :d
|
437
|
+
i[0x7b] = InstructionSet::Bit.new 7, :e
|
438
|
+
i[0x7c] = InstructionSet::Bit.new 7, :h
|
439
|
+
i[0x7d] = InstructionSet::Bit.new 7, :l
|
440
|
+
i[0x7e] = InstructionSet::Bit.new 7, :hl, true
|
441
|
+
i[0x7f] = InstructionSet::Bit.new 7, :a
|
442
|
+
|
443
|
+
i[0x80] = InstructionSet::Res.new 0, :b
|
444
|
+
i[0x81] = InstructionSet::Res.new 0, :c
|
445
|
+
i[0x82] = InstructionSet::Res.new 0, :d
|
446
|
+
i[0x83] = InstructionSet::Res.new 0, :e
|
447
|
+
i[0x84] = InstructionSet::Res.new 0, :h
|
448
|
+
i[0x85] = InstructionSet::Res.new 0, :l
|
449
|
+
i[0x86] = InstructionSet::Res.new 0, :hl, true
|
450
|
+
i[0x87] = InstructionSet::Res.new 0, :a
|
451
|
+
i[0x88] = InstructionSet::Res.new 1, :b
|
452
|
+
i[0x89] = InstructionSet::Res.new 1, :c
|
453
|
+
i[0x8a] = InstructionSet::Res.new 1, :d
|
454
|
+
i[0x8b] = InstructionSet::Res.new 1, :e
|
455
|
+
i[0x8c] = InstructionSet::Res.new 1, :h
|
456
|
+
i[0x8d] = InstructionSet::Res.new 1, :l
|
457
|
+
i[0x8e] = InstructionSet::Res.new 1, :hl, true
|
458
|
+
i[0x8f] = InstructionSet::Res.new 1, :a
|
459
|
+
|
460
|
+
i[0x90] = InstructionSet::Res.new 2, :b
|
461
|
+
i[0x91] = InstructionSet::Res.new 2, :c
|
462
|
+
i[0x92] = InstructionSet::Res.new 2, :d
|
463
|
+
i[0x93] = InstructionSet::Res.new 2, :e
|
464
|
+
i[0x94] = InstructionSet::Res.new 2, :h
|
465
|
+
i[0x95] = InstructionSet::Res.new 2, :l
|
466
|
+
i[0x96] = InstructionSet::Res.new 2, :hl, true
|
467
|
+
i[0x97] = InstructionSet::Res.new 2, :a
|
468
|
+
i[0x98] = InstructionSet::Res.new 3, :b
|
469
|
+
i[0x99] = InstructionSet::Res.new 3, :c
|
470
|
+
i[0x9a] = InstructionSet::Res.new 3, :d
|
471
|
+
i[0x9b] = InstructionSet::Res.new 3, :e
|
472
|
+
i[0x9c] = InstructionSet::Res.new 3, :h
|
473
|
+
i[0x9d] = InstructionSet::Res.new 3, :l
|
474
|
+
i[0x9e] = InstructionSet::Res.new 3, :hl, true
|
475
|
+
i[0x9f] = InstructionSet::Res.new 3, :a
|
476
|
+
|
477
|
+
i[0xa0] = InstructionSet::Res.new 4, :b
|
478
|
+
i[0xa1] = InstructionSet::Res.new 4, :c
|
479
|
+
i[0xa2] = InstructionSet::Res.new 4, :d
|
480
|
+
i[0xa3] = InstructionSet::Res.new 4, :e
|
481
|
+
i[0xa4] = InstructionSet::Res.new 4, :h
|
482
|
+
i[0xa5] = InstructionSet::Res.new 4, :l
|
483
|
+
i[0xa6] = InstructionSet::Res.new 4, :hl, true
|
484
|
+
i[0xa7] = InstructionSet::Res.new 4, :a
|
485
|
+
i[0xa8] = InstructionSet::Res.new 5, :b
|
486
|
+
i[0xa9] = InstructionSet::Res.new 5, :c
|
487
|
+
i[0xaa] = InstructionSet::Res.new 5, :d
|
488
|
+
i[0xab] = InstructionSet::Res.new 5, :e
|
489
|
+
i[0xac] = InstructionSet::Res.new 5, :h
|
490
|
+
i[0xad] = InstructionSet::Res.new 5, :l
|
491
|
+
i[0xae] = InstructionSet::Res.new 5, :hl, true
|
492
|
+
i[0xaf] = InstructionSet::Res.new 5, :a
|
493
|
+
|
494
|
+
i[0xb0] = InstructionSet::Res.new 6, :b
|
495
|
+
i[0xb1] = InstructionSet::Res.new 6, :c
|
496
|
+
i[0xb2] = InstructionSet::Res.new 6, :d
|
497
|
+
i[0xb3] = InstructionSet::Res.new 6, :e
|
498
|
+
i[0xb4] = InstructionSet::Res.new 6, :h
|
499
|
+
i[0xb5] = InstructionSet::Res.new 6, :l
|
500
|
+
i[0xb6] = InstructionSet::Res.new 6, :hl, true
|
501
|
+
i[0xb7] = InstructionSet::Res.new 6, :a
|
502
|
+
i[0xb8] = InstructionSet::Res.new 7, :b
|
503
|
+
i[0xb9] = InstructionSet::Res.new 7, :c
|
504
|
+
i[0xba] = InstructionSet::Res.new 7, :d
|
505
|
+
i[0xbb] = InstructionSet::Res.new 7, :e
|
506
|
+
i[0xbc] = InstructionSet::Res.new 7, :h
|
507
|
+
i[0xbd] = InstructionSet::Res.new 7, :l
|
508
|
+
i[0xbe] = InstructionSet::Res.new 7, :hl, true
|
509
|
+
i[0xbf] = InstructionSet::Res.new 7, :a
|
510
|
+
|
511
|
+
i[0xc0] = InstructionSet::Set.new 0, :b
|
512
|
+
i[0xc1] = InstructionSet::Set.new 0, :c
|
513
|
+
i[0xc2] = InstructionSet::Set.new 0, :d
|
514
|
+
i[0xc3] = InstructionSet::Set.new 0, :e
|
515
|
+
i[0xc4] = InstructionSet::Set.new 0, :h
|
516
|
+
i[0xc5] = InstructionSet::Set.new 0, :l
|
517
|
+
i[0xc6] = InstructionSet::Set.new 0, :hl, true
|
518
|
+
i[0xc7] = InstructionSet::Set.new 0, :a
|
519
|
+
i[0xc8] = InstructionSet::Set.new 1, :b
|
520
|
+
i[0xc9] = InstructionSet::Set.new 1, :c
|
521
|
+
i[0xca] = InstructionSet::Set.new 1, :d
|
522
|
+
i[0xcb] = InstructionSet::Set.new 1, :e
|
523
|
+
i[0xcc] = InstructionSet::Set.new 1, :h
|
524
|
+
i[0xcd] = InstructionSet::Set.new 1, :l
|
525
|
+
i[0xce] = InstructionSet::Set.new 1, :hl, true
|
526
|
+
i[0xcf] = InstructionSet::Set.new 1, :a
|
527
|
+
|
528
|
+
i[0xd0] = InstructionSet::Set.new 2, :b
|
529
|
+
i[0xd1] = InstructionSet::Set.new 2, :c
|
530
|
+
i[0xd2] = InstructionSet::Set.new 2, :d
|
531
|
+
i[0xd3] = InstructionSet::Set.new 2, :e
|
532
|
+
i[0xd4] = InstructionSet::Set.new 2, :h
|
533
|
+
i[0xd5] = InstructionSet::Set.new 2, :l
|
534
|
+
i[0xd6] = InstructionSet::Set.new 2, :hl, true
|
535
|
+
i[0xd7] = InstructionSet::Set.new 2, :a
|
536
|
+
i[0xd8] = InstructionSet::Set.new 3, :b
|
537
|
+
i[0xd9] = InstructionSet::Set.new 3, :c
|
538
|
+
i[0xda] = InstructionSet::Set.new 3, :d
|
539
|
+
i[0xdb] = InstructionSet::Set.new 3, :e
|
540
|
+
i[0xdc] = InstructionSet::Set.new 3, :h
|
541
|
+
i[0xdd] = InstructionSet::Set.new 3, :l
|
542
|
+
i[0xde] = InstructionSet::Set.new 3, :hl, true
|
543
|
+
i[0xdf] = InstructionSet::Set.new 3, :a
|
544
|
+
|
545
|
+
i[0xe0] = InstructionSet::Set.new 4, :b
|
546
|
+
i[0xe1] = InstructionSet::Set.new 4, :c
|
547
|
+
i[0xe2] = InstructionSet::Set.new 4, :d
|
548
|
+
i[0xe3] = InstructionSet::Set.new 4, :e
|
549
|
+
i[0xe4] = InstructionSet::Set.new 4, :h
|
550
|
+
i[0xe5] = InstructionSet::Set.new 4, :l
|
551
|
+
i[0xe6] = InstructionSet::Set.new 4, :hl, true
|
552
|
+
i[0xe7] = InstructionSet::Set.new 4, :a
|
553
|
+
i[0xe8] = InstructionSet::Set.new 5, :b
|
554
|
+
i[0xe9] = InstructionSet::Set.new 5, :c
|
555
|
+
i[0xea] = InstructionSet::Set.new 5, :d
|
556
|
+
i[0xeb] = InstructionSet::Set.new 5, :e
|
557
|
+
i[0xec] = InstructionSet::Set.new 5, :h
|
558
|
+
i[0xed] = InstructionSet::Set.new 5, :l
|
559
|
+
i[0xee] = InstructionSet::Set.new 5, :hl, true
|
560
|
+
i[0xef] = InstructionSet::Set.new 5, :a
|
561
|
+
|
562
|
+
i[0xf0] = InstructionSet::Set.new 6, :b
|
563
|
+
i[0xf1] = InstructionSet::Set.new 6, :c
|
564
|
+
i[0xf2] = InstructionSet::Set.new 6, :d
|
565
|
+
i[0xf3] = InstructionSet::Set.new 6, :e
|
566
|
+
i[0xf4] = InstructionSet::Set.new 6, :h
|
567
|
+
i[0xf5] = InstructionSet::Set.new 6, :l
|
568
|
+
i[0xf6] = InstructionSet::Set.new 6, :hl, true
|
569
|
+
i[0xf7] = InstructionSet::Set.new 6, :a
|
570
|
+
i[0xf8] = InstructionSet::Set.new 7, :b
|
571
|
+
i[0xf9] = InstructionSet::Set.new 7, :c
|
572
|
+
i[0xfa] = InstructionSet::Set.new 7, :d
|
573
|
+
i[0xfb] = InstructionSet::Set.new 7, :e
|
574
|
+
i[0xfc] = InstructionSet::Set.new 7, :h
|
575
|
+
i[0xfd] = InstructionSet::Set.new 7, :l
|
576
|
+
i[0xfe] = InstructionSet::Set.new 7, :hl, true
|
577
|
+
i[0xff] = InstructionSet::Set.new 7, :a
|
533
578
|
|
534
579
|
@cb_instructions = i
|
535
580
|
end
|
@@ -538,8 +583,33 @@ module GBRb
|
|
538
583
|
@clock ||= { m: 0, t: 0 }
|
539
584
|
end
|
540
585
|
|
586
|
+
def check_for_interrupts
|
587
|
+
if @interrupts == :enabled
|
588
|
+
ie = @mmu.read_byte INTERRUPT_ENABLED_FLAG_ADDR
|
589
|
+
iflag = @mmu.read_byte INTERRUPT_FLAG_ADDR
|
590
|
+
interrupt = ie & iflag
|
591
|
+
|
592
|
+
if interrupt != 0x00
|
593
|
+
if interrupt & TIMER_OVERFLOW_IRQ == TIMER_OVERFLOW_IRQ
|
594
|
+
@mmu.write_byte INTERRUPT_FLAG_ADDR, iflag & 0xfb
|
595
|
+
r.sp.store r.sp.read - 2
|
596
|
+
@mmu.write_word r.sp.read, r.pc.read
|
597
|
+
r.pc.store TIMER_OVERFLOW_IR_ADDR
|
598
|
+
@interrupts = :disabled
|
599
|
+
end
|
600
|
+
end
|
601
|
+
end
|
602
|
+
end
|
603
|
+
|
541
604
|
def step
|
542
|
-
|
605
|
+
|
606
|
+
if @halted
|
607
|
+
@halted = false if @interrupt_before_halt != @mmu.read_byte(INTERRUPT_FLAG_ADDR)
|
608
|
+
@last_m
|
609
|
+
else
|
610
|
+
check_for_interrupts
|
611
|
+
dispatch decode fetch
|
612
|
+
end
|
543
613
|
end
|
544
614
|
|
545
615
|
def fetch
|
@@ -549,11 +619,11 @@ module GBRb
|
|
549
619
|
end
|
550
620
|
|
551
621
|
def decode opcode
|
552
|
-
if
|
553
|
-
@cb_prefix =
|
554
|
-
cb_instructions[
|
622
|
+
if opcode == 0xcb
|
623
|
+
@cb_prefix = true
|
624
|
+
cb_instructions[fetch].dup
|
555
625
|
else
|
556
|
-
@cb_prefix =
|
626
|
+
@cb_prefix = false
|
557
627
|
instructions[opcode.to_i]
|
558
628
|
end
|
559
629
|
end
|
@@ -570,14 +640,21 @@ module GBRb
|
|
570
640
|
immediates = (immediates.last << 8) + immediates.first
|
571
641
|
end
|
572
642
|
instruction.call @registers, @mmu, immediates
|
643
|
+
elsif instruction.immediate_count < 0
|
644
|
+
instruction.call self
|
573
645
|
else
|
574
646
|
instruction.call @registers, @mmu
|
575
647
|
end
|
576
648
|
|
649
|
+
if @cb_prefix
|
650
|
+
instruction.m += 1
|
651
|
+
instruction.t += 4
|
652
|
+
end
|
653
|
+
|
577
654
|
@clock[:m] += instruction.m
|
578
655
|
@clock[:t] += instruction.t
|
579
|
-
@last_m = instruction.m
|
580
656
|
@last_t = instruction.t
|
657
|
+
@last_m = instruction.m
|
581
658
|
end
|
582
659
|
end
|
583
660
|
end
|