tridec 0.1.0__tar.gz
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- tridec-0.1.0/LICENSE +202 -0
- tridec-0.1.0/PKG-INFO +204 -0
- tridec-0.1.0/README.md +167 -0
- tridec-0.1.0/pyproject.toml +62 -0
- tridec-0.1.0/setup.cfg +4 -0
- tridec-0.1.0/src/tridec/__init__.py +47 -0
- tridec-0.1.0/src/tridec/adapters/__init__.py +258 -0
- tridec-0.1.0/src/tridec/api.py +417 -0
- tridec-0.1.0/src/tridec/backends/__init__.py +11 -0
- tridec-0.1.0/src/tridec/backends/bp_numpy.py +221 -0
- tridec-0.1.0/src/tridec/backends/bp_torch.py +358 -0
- tridec-0.1.0/src/tridec/backends/bp_triton.py +480 -0
- tridec-0.1.0/src/tridec/backends/relay_triton.py +549 -0
- tridec-0.1.0/src/tridec/dem.py +49 -0
- tridec-0.1.0/src/tridec/sinter.py +115 -0
- tridec-0.1.0/src/tridec/tanner.py +48 -0
- tridec-0.1.0/src/tridec/validation/__init__.py +40 -0
- tridec-0.1.0/src/tridec/validation/analysis.py +239 -0
- tridec-0.1.0/src/tridec/validation/harness.py +231 -0
- tridec-0.1.0/src/tridec/validation/stats.py +63 -0
- tridec-0.1.0/src/tridec.egg-info/PKG-INFO +204 -0
- tridec-0.1.0/src/tridec.egg-info/SOURCES.txt +35 -0
- tridec-0.1.0/src/tridec.egg-info/dependency_links.txt +1 -0
- tridec-0.1.0/src/tridec.egg-info/requires.txt +22 -0
- tridec-0.1.0/src/tridec.egg-info/top_level.txt +1 -0
- tridec-0.1.0/tests/test_adapters.py +69 -0
- tridec-0.1.0/tests/test_api.py +192 -0
- tridec-0.1.0/tests/test_bp_numpy.py +152 -0
- tridec-0.1.0/tests/test_bp_torch.py +110 -0
- tridec-0.1.0/tests/test_bp_triton.py +102 -0
- tridec-0.1.0/tests/test_dem_hash_gate.py +104 -0
- tridec-0.1.0/tests/test_metal.py +187 -0
- tridec-0.1.0/tests/test_no_regression_cell.py +144 -0
- tridec-0.1.0/tests/test_relay_triton.py +119 -0
- tridec-0.1.0/tests/test_sinter.py +138 -0
- tridec-0.1.0/tests/test_surface_code.py +75 -0
- tridec-0.1.0/tests/test_validation.py +154 -0
tridec-0.1.0/LICENSE
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tridec-0.1.0/PKG-INFO
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Metadata-Version: 2.4
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Name: tridec
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Version: 0.1.0
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Summary: Vendor-portable GPU decoders for quantum LDPC codes: Triton min-sum BP and Relay-BP on NVIDIA (CUDA) and AMD (ROCm), with CPU reference implementations, consuming any stim DetectorErrorModel or raw parity-check matrices.
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Author: Blake Ledden
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License: Apache-2.0
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Project-URL: Repository, https://github.com/bledden/tridec
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Project-URL: Documentation, https://github.com/bledden/tridec/blob/master/docs/benchmark.md
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Project-URL: Issues, https://github.com/bledden/tridec/issues
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Keywords: quantum error correction,qLDPC,decoder,belief propagation,triton,stim,GPU
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Classifier: Development Status :: 3 - Alpha
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Classifier: Intended Audience :: Science/Research
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Classifier: License :: OSI Approved :: Apache Software License
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Classifier: Programming Language :: Python :: 3
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Classifier: Topic :: Scientific/Engineering :: Physics
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Requires-Python: >=3.10
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Description-Content-Type: text/markdown
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License-File: LICENSE
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Requires-Dist: numpy>=1.24
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Requires-Dist: scipy>=1.10
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Requires-Dist: stim>=1.13
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Provides-Extra: torch
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Requires-Dist: torch>=2.4; extra == "torch"
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Provides-Extra: gpu
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Requires-Dist: torch>=2.4; extra == "gpu"
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Requires-Dist: triton>=3.0; extra == "gpu"
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Provides-Extra: decoders
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Requires-Dist: ldpc>=2.4.1; extra == "decoders"
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Requires-Dist: relay-bp[stim]>=0.2.2; extra == "decoders"
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Provides-Extra: sinter
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Requires-Dist: sinter>=1.15; extra == "sinter"
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Provides-Extra: dev
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Requires-Dist: pytest>=8.0; extra == "dev"
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Requires-Dist: sinter>=1.15; extra == "dev"
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Requires-Dist: pymatching>=2.1; extra == "dev"
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Dynamic: license-file
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# tridec
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[](https://github.com/bledden/tridec/actions/workflows/ci.yml)
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*Badge honesty: CI is CPU-only (ubuntu + macos arm64; the macos lane binds the
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strict exact-count receipt gates). There are no GPU runners — the CUDA/ROCm
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kernel paths are validated by the carried H200/MI300X receipts in
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`bench/receipts/`, and the experimental Metal tier runs on a local machine.*
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An open, vendor-portable GPU decoder library for quantum LDPC codes — Triton
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min-sum BP and Relay-BP decoders that consume any stim `DetectorErrorModel` or
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raw parity-check matrices, with CPU reference implementations, validated
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against the standard CPU references (`ldpc`, `relay-bp`), running on NVIDIA
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(CUDA) and AMD (ROCm) GPUs.
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+
The same Triton kernels run unmodified on both vendors: the Relay-BP kernel
|
|
54
|
+
reproduces its logical-error-rate validation numbers identically on an NVIDIA
|
|
55
|
+
H200 (CUDA 12.4, triton 3.0) and an AMD MI300X (ROCm 7.0, triton 3.4) — see
|
|
56
|
+
[docs/benchmark.md](docs/benchmark.md) and the raw receipts in
|
|
57
|
+
`bench/receipts/`. Validated scope is NVIDIA + AMD; Apple silicon runs the
|
|
58
|
+
same kernels through [triton-metal](https://github.com/bledden/triton-metal)
|
|
59
|
+
as an **experimental** backend (see below).
|
|
60
|
+
|
|
61
|
+
## Install
|
|
62
|
+
|
|
63
|
+
Most users want `pip install "tridec[torch,decoders]"` (CPU+GPU torch backend
|
|
64
|
+
plus the reference adapters). The bare install is the **numpy CPU reference
|
|
65
|
+
only** — correct but slow.
|
|
66
|
+
|
|
67
|
+
```bash
|
|
68
|
+
pip install tridec # numpy CPU reference only
|
|
69
|
+
pip install "tridec[torch]" # + batched torch backend (CPU/GPU)
|
|
70
|
+
pip install "tridec[gpu]" # + Triton GPU kernels (CUDA or ROCm)
|
|
71
|
+
pip install "tridec[decoders]" # + ldpc / relay-bp reference adapters
|
|
72
|
+
pip install "tridec[sinter]" # + sinter.collect integration
|
|
73
|
+
```
|
|
74
|
+
|
|
75
|
+
## Quickstart
|
|
76
|
+
|
|
77
|
+
```python
|
|
78
|
+
import stim
|
|
79
|
+
import tridec
|
|
80
|
+
|
|
81
|
+
circuit = stim.Circuit.from_file("memory.stim")
|
|
82
|
+
dem = circuit.detector_error_model(decompose_errors=False)
|
|
83
|
+
|
|
84
|
+
decoder = tridec.from_dem(dem, backend="auto") # triton > torch > numpy
|
|
85
|
+
|
|
86
|
+
dets, obs = circuit.compile_detector_sampler(seed=0).sample(
|
|
87
|
+
100_000, separate_observables=True)
|
|
88
|
+
pred = decoder.decode_batch(dets) # (shots, n_obs) bool
|
|
89
|
+
print("logical error rate:", (pred != obs).any(axis=1).mean())
|
|
90
|
+
```
|
|
91
|
+
|
|
92
|
+
Raw matrices work too: `tridec.from_matrices(H, priors, observables=Lo)`.
|
|
93
|
+
Relay-BP: `tridec.from_dem(dem, algorithm="relay")` (Triton kernels only).
|
|
94
|
+
|
|
95
|
+
With [sinter](https://pypi.org/project/sinter/) (the `[sinter]` extra):
|
|
96
|
+
|
|
97
|
+
```python
|
|
98
|
+
import sinter
|
|
99
|
+
from tridec.sinter import sinter_decoders
|
|
100
|
+
|
|
101
|
+
stats = sinter.collect(
|
|
102
|
+
num_workers=4, tasks=tasks,
|
|
103
|
+
decoders=["tridec_bp", "pymatching"],
|
|
104
|
+
custom_decoders=sinter_decoders(),
|
|
105
|
+
max_shots=1_000_000)
|
|
106
|
+
```
|
|
107
|
+
|
|
108
|
+
## Backend × algorithm matrix (honest availability)
|
|
109
|
+
|
|
110
|
+
| Algorithm | `numpy` | `torch` | `triton` | `metal` (experimental) |
|
|
111
|
+
|---|---|---|---|---|
|
|
112
|
+
| min-sum BP | yes (CPU reference) | yes (CPU + CUDA/ROCm) | yes (CUDA + ROCm) | yes (fp32) |
|
|
113
|
+
| Relay-BP | no | no | yes (CUDA + ROCm) | yes (fp32, slow — see below) |
|
|
114
|
+
|
|
115
|
+
There is no in-package CPU Relay-BP; its CPU reference is IBM's `relay-bp`
|
|
116
|
+
Rust decoder, wrapped in `tridec.adapters` and used as the validation
|
|
117
|
+
oracle for the Triton path.
|
|
118
|
+
|
|
119
|
+
## What's validated where
|
|
120
|
+
|
|
121
|
+
| Environment | Status |
|
|
122
|
+
|---|---|
|
|
123
|
+
| CPU (any) | numpy BP reference; torch BP bit-identical to numpy at fp64 (one iteration), LER-identical full decode |
|
|
124
|
+
| NVIDIA H200, CUDA 12.4, torch 2.4.1, triton 3.0.0 | Triton BP: ≥99.5% hard-decision agreement vs fp64 references, LER-identical (156 = 156 = 156 fails / 2000 shots vs numpy/torch). Triton Relay-BP: LER-matches the `relay-bp` Rust oracle (31 vs 38 fails / 2000, overlapping Wilson CIs) — carried source-repo receipts |
|
|
125
|
+
| AMD MI300X, ROCm 7.0.0, torch 2.9, triton 3.4.0 | Same kernels, unmodified: identical primitive-identity numbers (pre-leg posterior max-diff 1.8e-15) and the same oracle-vs-Triton LER identity (carried receipts) — **and validated through the installed package for v0.1.0** (`bench/receipts/mi300x_packaged.json`): full suite 88 passed / 10 skipped on gfx942 (GPU tiers bind, darwin-only strict tiers skip), packaged-API BP 166 = numpy 166 fails / 2000, Relay-BP fp32 34 vs Rust oracle 31 (overlapping CIs), throughput within ±2.2% of the carried receipt |
|
|
126
|
+
| Apple silicon (M4 Max), triton-metal | **Experimental, spike-validated only** (`bench/receipts/metal_spike.md`): both kernels pass the same correctness gates at fp32; see the section below |
|
|
127
|
+
|
|
128
|
+
## Experimental: Apple silicon (Metal)
|
|
129
|
+
|
|
130
|
+
The same Triton kernels run on Apple-silicon GPUs through
|
|
131
|
+
[triton-metal](https://github.com/bledden/triton-metal), with **zero changes
|
|
132
|
+
to the kernel source**. This is experimental: validated at spike level on one
|
|
133
|
+
machine (M4 Max), fp32 only (Metal has no fp64), and not part of the
|
|
134
|
+
official receipt set.
|
|
135
|
+
|
|
136
|
+
```bash
|
|
137
|
+
# triton-metal + a triton >= 3.6 build + torch must be importable, then:
|
|
138
|
+
pip install tridec
|
|
139
|
+
python -c "import tridec; print(tridec.available_backends())" # ['metal', ...]
|
|
140
|
+
```
|
|
141
|
+
|
|
142
|
+
`backend="auto"` detects the triton-metal environment (darwin, `triton` +
|
|
143
|
+
`triton_metal` importable, no CUDA/ROCm device) and selects `"metal"`;
|
|
144
|
+
`backend="triton"` resolves to `"metal"` there too, and `backend="metal"`
|
|
145
|
+
asserts the environment is present. The execution pattern is triton-metal's
|
|
146
|
+
documented one — **CPU torch tensors** (zero-copy via unified memory; not
|
|
147
|
+
`mps`) — so no device arguments are needed.
|
|
148
|
+
|
|
149
|
+
What the spike measured (2000 canonical shots, seed 0, M4 Max — re-validated
|
|
150
|
+
through this API path in `tests/test_metal.py`):
|
|
151
|
+
|
|
152
|
+
- **min-sum BP (fp32)**: all correctness gates pass — one-iteration hard
|
|
153
|
+
agreement 1.000 vs the fp64 numpy reference on both the surface-code and
|
|
154
|
+
BB-code fixtures; LER 76 = 76 / 2000 (surface) and 167 vs 168 / 2000 (BB).
|
|
155
|
+
Batched decode of 2000 shots in 28 ms (surface) / 167 ms (BB) — **37–56×
|
|
156
|
+
the per-shot numpy baseline on the same machine**.
|
|
157
|
+
- **Relay-BP (fp32)**: correct but slow — LER matches the `relay-bp` Rust
|
|
158
|
+
oracle (31 vs 39 fails / 2000, per-shot agreement 99.3%), but
|
|
159
|
+
`decode_batch(2000)` takes **31 s** vs 1.26 s for the Rust CPU oracle:
|
|
160
|
+
relay's per-iteration host loop (~7k small kernel launches) is
|
|
161
|
+
launch-overhead dominated on Metal. Use it for validation, not production.
|
|
162
|
+
- Relay-BP on metal enforces fp32: `dtype="float64"` raises with a clear
|
|
163
|
+
error; the default resolves to `float32`.
|
|
164
|
+
|
|
165
|
+
No claims beyond the spike: no official LER receipts, no cross-machine
|
|
166
|
+
validation, no performance tuning. CUDA/ROCm remain the supported GPU paths.
|
|
167
|
+
|
|
168
|
+
Compatibility floors in `pyproject.toml`; known-good pins: stim 1.15.0,
|
|
169
|
+
ldpc 2.4.1, relay-bp 0.2.2, torch 2.4.1 / 2.9, triton 3.0 / 3.4.
|
|
170
|
+
|
|
171
|
+
## Validation discipline
|
|
172
|
+
|
|
173
|
+
`tridec.validation` ships the matched-protocol harness the numbers were
|
|
174
|
+
produced with: `dem_hash` (sha256 of the DEM's canonical bytes), `run_matched`
|
|
175
|
+
(one shared DEM, one shot set, fail-fast DEM-identity and tie-break gates),
|
|
176
|
+
Wilson/TOST statistics and a paired per-shot gap-to-MLE bootstrap. The test
|
|
177
|
+
suite pins the extraction byte-for-byte: 8 canonical BB-code fixture circuits
|
|
178
|
+
must hash to the exact DEM sha256s recorded in the carried `zoo_grid.json`
|
|
179
|
+
receipt, and a full 16,667-shot cell must reproduce the recorded
|
|
180
|
+
logical-failure counts of the `ldpc` reference adapters exactly.
|
|
181
|
+
|
|
182
|
+
For v0.1.0 the WHOLE grid was re-decoded in the receipt environment
|
|
183
|
+
(`bench/full_grid_noregression.py`): 31 of 32 (cell, decoder) failure counts
|
|
184
|
+
reproduce **exactly** — all 24 BP / BP-OSD-0 / BP-OSD-10 counts, and 7 of 8
|
|
185
|
+
BPLSD counts. The single deviation (BPLSD, p=0.002/X: 879 vs 880, one shot
|
|
186
|
+
in 200,000) is attributed by a same-environment repeat experiment to
|
|
187
|
+
run-to-run nondeterminism inside ldpc's `BpLsdDecoder` itself (identical
|
|
188
|
+
shots, fresh instances: 879/880/879) — documented in
|
|
189
|
+
`bench/receipts/full_grid_noregression.json`.
|
|
190
|
+
|
|
191
|
+
## Status
|
|
192
|
+
|
|
193
|
+
`0.1.0` — first release. The kernels and their validation receipts are
|
|
194
|
+
stable; the public API surface is young and may still move before 1.0.
|
|
195
|
+
Minor `0.x` releases may rename or remove public API; `1.0` will lock the
|
|
196
|
+
surface. GPU paths require triton + a CUDA/ROCm GPU (or the experimental
|
|
197
|
+
triton-metal environment); the GPU/metal test tiers skip cleanly where
|
|
198
|
+
unavailable.
|
|
199
|
+
Validated through the installed package on MI300X/ROCm (v0.1.0) and via
|
|
200
|
+
carried receipts on H200/CUDA; Metal is experimental.
|
|
201
|
+
|
|
202
|
+
## License
|
|
203
|
+
|
|
204
|
+
Apache-2.0.
|
tridec-0.1.0/README.md
ADDED
|
@@ -0,0 +1,167 @@
|
|
|
1
|
+
# tridec
|
|
2
|
+
|
|
3
|
+
[](https://github.com/bledden/tridec/actions/workflows/ci.yml)
|
|
4
|
+
|
|
5
|
+
*Badge honesty: CI is CPU-only (ubuntu + macos arm64; the macos lane binds the
|
|
6
|
+
strict exact-count receipt gates). There are no GPU runners — the CUDA/ROCm
|
|
7
|
+
kernel paths are validated by the carried H200/MI300X receipts in
|
|
8
|
+
`bench/receipts/`, and the experimental Metal tier runs on a local machine.*
|
|
9
|
+
|
|
10
|
+
An open, vendor-portable GPU decoder library for quantum LDPC codes — Triton
|
|
11
|
+
min-sum BP and Relay-BP decoders that consume any stim `DetectorErrorModel` or
|
|
12
|
+
raw parity-check matrices, with CPU reference implementations, validated
|
|
13
|
+
against the standard CPU references (`ldpc`, `relay-bp`), running on NVIDIA
|
|
14
|
+
(CUDA) and AMD (ROCm) GPUs.
|
|
15
|
+
|
|
16
|
+
The same Triton kernels run unmodified on both vendors: the Relay-BP kernel
|
|
17
|
+
reproduces its logical-error-rate validation numbers identically on an NVIDIA
|
|
18
|
+
H200 (CUDA 12.4, triton 3.0) and an AMD MI300X (ROCm 7.0, triton 3.4) — see
|
|
19
|
+
[docs/benchmark.md](docs/benchmark.md) and the raw receipts in
|
|
20
|
+
`bench/receipts/`. Validated scope is NVIDIA + AMD; Apple silicon runs the
|
|
21
|
+
same kernels through [triton-metal](https://github.com/bledden/triton-metal)
|
|
22
|
+
as an **experimental** backend (see below).
|
|
23
|
+
|
|
24
|
+
## Install
|
|
25
|
+
|
|
26
|
+
Most users want `pip install "tridec[torch,decoders]"` (CPU+GPU torch backend
|
|
27
|
+
plus the reference adapters). The bare install is the **numpy CPU reference
|
|
28
|
+
only** — correct but slow.
|
|
29
|
+
|
|
30
|
+
```bash
|
|
31
|
+
pip install tridec # numpy CPU reference only
|
|
32
|
+
pip install "tridec[torch]" # + batched torch backend (CPU/GPU)
|
|
33
|
+
pip install "tridec[gpu]" # + Triton GPU kernels (CUDA or ROCm)
|
|
34
|
+
pip install "tridec[decoders]" # + ldpc / relay-bp reference adapters
|
|
35
|
+
pip install "tridec[sinter]" # + sinter.collect integration
|
|
36
|
+
```
|
|
37
|
+
|
|
38
|
+
## Quickstart
|
|
39
|
+
|
|
40
|
+
```python
|
|
41
|
+
import stim
|
|
42
|
+
import tridec
|
|
43
|
+
|
|
44
|
+
circuit = stim.Circuit.from_file("memory.stim")
|
|
45
|
+
dem = circuit.detector_error_model(decompose_errors=False)
|
|
46
|
+
|
|
47
|
+
decoder = tridec.from_dem(dem, backend="auto") # triton > torch > numpy
|
|
48
|
+
|
|
49
|
+
dets, obs = circuit.compile_detector_sampler(seed=0).sample(
|
|
50
|
+
100_000, separate_observables=True)
|
|
51
|
+
pred = decoder.decode_batch(dets) # (shots, n_obs) bool
|
|
52
|
+
print("logical error rate:", (pred != obs).any(axis=1).mean())
|
|
53
|
+
```
|
|
54
|
+
|
|
55
|
+
Raw matrices work too: `tridec.from_matrices(H, priors, observables=Lo)`.
|
|
56
|
+
Relay-BP: `tridec.from_dem(dem, algorithm="relay")` (Triton kernels only).
|
|
57
|
+
|
|
58
|
+
With [sinter](https://pypi.org/project/sinter/) (the `[sinter]` extra):
|
|
59
|
+
|
|
60
|
+
```python
|
|
61
|
+
import sinter
|
|
62
|
+
from tridec.sinter import sinter_decoders
|
|
63
|
+
|
|
64
|
+
stats = sinter.collect(
|
|
65
|
+
num_workers=4, tasks=tasks,
|
|
66
|
+
decoders=["tridec_bp", "pymatching"],
|
|
67
|
+
custom_decoders=sinter_decoders(),
|
|
68
|
+
max_shots=1_000_000)
|
|
69
|
+
```
|
|
70
|
+
|
|
71
|
+
## Backend × algorithm matrix (honest availability)
|
|
72
|
+
|
|
73
|
+
| Algorithm | `numpy` | `torch` | `triton` | `metal` (experimental) |
|
|
74
|
+
|---|---|---|---|---|
|
|
75
|
+
| min-sum BP | yes (CPU reference) | yes (CPU + CUDA/ROCm) | yes (CUDA + ROCm) | yes (fp32) |
|
|
76
|
+
| Relay-BP | no | no | yes (CUDA + ROCm) | yes (fp32, slow — see below) |
|
|
77
|
+
|
|
78
|
+
There is no in-package CPU Relay-BP; its CPU reference is IBM's `relay-bp`
|
|
79
|
+
Rust decoder, wrapped in `tridec.adapters` and used as the validation
|
|
80
|
+
oracle for the Triton path.
|
|
81
|
+
|
|
82
|
+
## What's validated where
|
|
83
|
+
|
|
84
|
+
| Environment | Status |
|
|
85
|
+
|---|---|
|
|
86
|
+
| CPU (any) | numpy BP reference; torch BP bit-identical to numpy at fp64 (one iteration), LER-identical full decode |
|
|
87
|
+
| NVIDIA H200, CUDA 12.4, torch 2.4.1, triton 3.0.0 | Triton BP: ≥99.5% hard-decision agreement vs fp64 references, LER-identical (156 = 156 = 156 fails / 2000 shots vs numpy/torch). Triton Relay-BP: LER-matches the `relay-bp` Rust oracle (31 vs 38 fails / 2000, overlapping Wilson CIs) — carried source-repo receipts |
|
|
88
|
+
| AMD MI300X, ROCm 7.0.0, torch 2.9, triton 3.4.0 | Same kernels, unmodified: identical primitive-identity numbers (pre-leg posterior max-diff 1.8e-15) and the same oracle-vs-Triton LER identity (carried receipts) — **and validated through the installed package for v0.1.0** (`bench/receipts/mi300x_packaged.json`): full suite 88 passed / 10 skipped on gfx942 (GPU tiers bind, darwin-only strict tiers skip), packaged-API BP 166 = numpy 166 fails / 2000, Relay-BP fp32 34 vs Rust oracle 31 (overlapping CIs), throughput within ±2.2% of the carried receipt |
|
|
89
|
+
| Apple silicon (M4 Max), triton-metal | **Experimental, spike-validated only** (`bench/receipts/metal_spike.md`): both kernels pass the same correctness gates at fp32; see the section below |
|
|
90
|
+
|
|
91
|
+
## Experimental: Apple silicon (Metal)
|
|
92
|
+
|
|
93
|
+
The same Triton kernels run on Apple-silicon GPUs through
|
|
94
|
+
[triton-metal](https://github.com/bledden/triton-metal), with **zero changes
|
|
95
|
+
to the kernel source**. This is experimental: validated at spike level on one
|
|
96
|
+
machine (M4 Max), fp32 only (Metal has no fp64), and not part of the
|
|
97
|
+
official receipt set.
|
|
98
|
+
|
|
99
|
+
```bash
|
|
100
|
+
# triton-metal + a triton >= 3.6 build + torch must be importable, then:
|
|
101
|
+
pip install tridec
|
|
102
|
+
python -c "import tridec; print(tridec.available_backends())" # ['metal', ...]
|
|
103
|
+
```
|
|
104
|
+
|
|
105
|
+
`backend="auto"` detects the triton-metal environment (darwin, `triton` +
|
|
106
|
+
`triton_metal` importable, no CUDA/ROCm device) and selects `"metal"`;
|
|
107
|
+
`backend="triton"` resolves to `"metal"` there too, and `backend="metal"`
|
|
108
|
+
asserts the environment is present. The execution pattern is triton-metal's
|
|
109
|
+
documented one — **CPU torch tensors** (zero-copy via unified memory; not
|
|
110
|
+
`mps`) — so no device arguments are needed.
|
|
111
|
+
|
|
112
|
+
What the spike measured (2000 canonical shots, seed 0, M4 Max — re-validated
|
|
113
|
+
through this API path in `tests/test_metal.py`):
|
|
114
|
+
|
|
115
|
+
- **min-sum BP (fp32)**: all correctness gates pass — one-iteration hard
|
|
116
|
+
agreement 1.000 vs the fp64 numpy reference on both the surface-code and
|
|
117
|
+
BB-code fixtures; LER 76 = 76 / 2000 (surface) and 167 vs 168 / 2000 (BB).
|
|
118
|
+
Batched decode of 2000 shots in 28 ms (surface) / 167 ms (BB) — **37–56×
|
|
119
|
+
the per-shot numpy baseline on the same machine**.
|
|
120
|
+
- **Relay-BP (fp32)**: correct but slow — LER matches the `relay-bp` Rust
|
|
121
|
+
oracle (31 vs 39 fails / 2000, per-shot agreement 99.3%), but
|
|
122
|
+
`decode_batch(2000)` takes **31 s** vs 1.26 s for the Rust CPU oracle:
|
|
123
|
+
relay's per-iteration host loop (~7k small kernel launches) is
|
|
124
|
+
launch-overhead dominated on Metal. Use it for validation, not production.
|
|
125
|
+
- Relay-BP on metal enforces fp32: `dtype="float64"` raises with a clear
|
|
126
|
+
error; the default resolves to `float32`.
|
|
127
|
+
|
|
128
|
+
No claims beyond the spike: no official LER receipts, no cross-machine
|
|
129
|
+
validation, no performance tuning. CUDA/ROCm remain the supported GPU paths.
|
|
130
|
+
|
|
131
|
+
Compatibility floors in `pyproject.toml`; known-good pins: stim 1.15.0,
|
|
132
|
+
ldpc 2.4.1, relay-bp 0.2.2, torch 2.4.1 / 2.9, triton 3.0 / 3.4.
|
|
133
|
+
|
|
134
|
+
## Validation discipline
|
|
135
|
+
|
|
136
|
+
`tridec.validation` ships the matched-protocol harness the numbers were
|
|
137
|
+
produced with: `dem_hash` (sha256 of the DEM's canonical bytes), `run_matched`
|
|
138
|
+
(one shared DEM, one shot set, fail-fast DEM-identity and tie-break gates),
|
|
139
|
+
Wilson/TOST statistics and a paired per-shot gap-to-MLE bootstrap. The test
|
|
140
|
+
suite pins the extraction byte-for-byte: 8 canonical BB-code fixture circuits
|
|
141
|
+
must hash to the exact DEM sha256s recorded in the carried `zoo_grid.json`
|
|
142
|
+
receipt, and a full 16,667-shot cell must reproduce the recorded
|
|
143
|
+
logical-failure counts of the `ldpc` reference adapters exactly.
|
|
144
|
+
|
|
145
|
+
For v0.1.0 the WHOLE grid was re-decoded in the receipt environment
|
|
146
|
+
(`bench/full_grid_noregression.py`): 31 of 32 (cell, decoder) failure counts
|
|
147
|
+
reproduce **exactly** — all 24 BP / BP-OSD-0 / BP-OSD-10 counts, and 7 of 8
|
|
148
|
+
BPLSD counts. The single deviation (BPLSD, p=0.002/X: 879 vs 880, one shot
|
|
149
|
+
in 200,000) is attributed by a same-environment repeat experiment to
|
|
150
|
+
run-to-run nondeterminism inside ldpc's `BpLsdDecoder` itself (identical
|
|
151
|
+
shots, fresh instances: 879/880/879) — documented in
|
|
152
|
+
`bench/receipts/full_grid_noregression.json`.
|
|
153
|
+
|
|
154
|
+
## Status
|
|
155
|
+
|
|
156
|
+
`0.1.0` — first release. The kernels and their validation receipts are
|
|
157
|
+
stable; the public API surface is young and may still move before 1.0.
|
|
158
|
+
Minor `0.x` releases may rename or remove public API; `1.0` will lock the
|
|
159
|
+
surface. GPU paths require triton + a CUDA/ROCm GPU (or the experimental
|
|
160
|
+
triton-metal environment); the GPU/metal test tiers skip cleanly where
|
|
161
|
+
unavailable.
|
|
162
|
+
Validated through the installed package on MI300X/ROCm (v0.1.0) and via
|
|
163
|
+
carried receipts on H200/CUDA; Metal is experimental.
|
|
164
|
+
|
|
165
|
+
## License
|
|
166
|
+
|
|
167
|
+
Apache-2.0.
|
|
@@ -0,0 +1,62 @@
|
|
|
1
|
+
[build-system]
|
|
2
|
+
requires = ["setuptools>=68"]
|
|
3
|
+
build-backend = "setuptools.build_meta"
|
|
4
|
+
|
|
5
|
+
[project]
|
|
6
|
+
name = "tridec"
|
|
7
|
+
version = "0.1.0"
|
|
8
|
+
description = "Vendor-portable GPU decoders for quantum LDPC codes: Triton min-sum BP and Relay-BP on NVIDIA (CUDA) and AMD (ROCm), with CPU reference implementations, consuming any stim DetectorErrorModel or raw parity-check matrices."
|
|
9
|
+
readme = "README.md"
|
|
10
|
+
requires-python = ">=3.10"
|
|
11
|
+
license = { text = "Apache-2.0" }
|
|
12
|
+
authors = [{ name = "Blake Ledden" }]
|
|
13
|
+
keywords = ["quantum error correction", "qLDPC", "decoder", "belief propagation", "triton", "stim", "GPU"]
|
|
14
|
+
classifiers = [
|
|
15
|
+
"Development Status :: 3 - Alpha",
|
|
16
|
+
"Intended Audience :: Science/Research",
|
|
17
|
+
"License :: OSI Approved :: Apache Software License",
|
|
18
|
+
"Programming Language :: Python :: 3",
|
|
19
|
+
"Topic :: Scientific/Engineering :: Physics",
|
|
20
|
+
]
|
|
21
|
+
|
|
22
|
+
# Version floors are the oldest versions this package is validated against.
|
|
23
|
+
# Known-good (validated) combinations — see README "Compatibility" for the full matrix:
|
|
24
|
+
# stim 1.15.0, ldpc 2.4.1, relay-bp 0.2.2,
|
|
25
|
+
# torch 2.4.1 + triton 3.0.0 (CUDA 12.4, H200),
|
|
26
|
+
# torch 2.9 + triton 3.4 (ROCm 7.0, MI300X).
|
|
27
|
+
dependencies = [
|
|
28
|
+
"numpy>=1.24",
|
|
29
|
+
"scipy>=1.10",
|
|
30
|
+
"stim>=1.13",
|
|
31
|
+
]
|
|
32
|
+
|
|
33
|
+
[project.urls]
|
|
34
|
+
Repository = "https://github.com/bledden/tridec"
|
|
35
|
+
Documentation = "https://github.com/bledden/tridec/blob/master/docs/benchmark.md"
|
|
36
|
+
Issues = "https://github.com/bledden/tridec/issues"
|
|
37
|
+
|
|
38
|
+
[project.optional-dependencies]
|
|
39
|
+
# torch backend: batched BP that runs on CPU and CUDA/ROCm devices.
|
|
40
|
+
torch = ["torch>=2.4"]
|
|
41
|
+
# gpu: the Triton fast path (NVIDIA CUDA or AMD ROCm builds of torch+triton).
|
|
42
|
+
gpu = ["torch>=2.4", "triton>=3.0"]
|
|
43
|
+
# decoders: optional CPU reference decoder adapters (validation targets).
|
|
44
|
+
decoders = ["ldpc>=2.4.1", "relay-bp[stim]>=0.2.2"]
|
|
45
|
+
# sinter: the sinter.collect custom-decoder integration (tridec.sinter).
|
|
46
|
+
sinter = ["sinter>=1.15"]
|
|
47
|
+
dev = ["pytest>=8.0", "sinter>=1.15", "pymatching>=2.1"]
|
|
48
|
+
|
|
49
|
+
[tool.setuptools.packages.find]
|
|
50
|
+
where = ["src"]
|
|
51
|
+
|
|
52
|
+
[tool.pytest.ini_options]
|
|
53
|
+
testpaths = ["tests"]
|
|
54
|
+
addopts = "-ra"
|
|
55
|
+
# Environment markers: the suite runs on three kinds of machines —
|
|
56
|
+
# CPU-only : gpu + metal tests skip (importorskip / module-level skips)
|
|
57
|
+
# CUDA/ROCm GPU : gpu tests run, metal tests skip
|
|
58
|
+
# Apple silicon + triton-metal : metal tests run, gpu tests skip
|
|
59
|
+
markers = [
|
|
60
|
+
"gpu: requires triton + a CUDA/ROCm GPU",
|
|
61
|
+
"metal: requires the experimental triton-metal environment (Apple silicon)",
|
|
62
|
+
]
|
tridec-0.1.0/setup.cfg
ADDED