trcc-linux 9.7.6__tar.gz → 9.7.8__tar.gz

{trcc_linux-9.7.6 → trcc_linux-9.7.8}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: trcc-linux
-Version: 9.7.6
+Version: 9.7.8
 Summary: Linux implementation of Thermalright LCD Control Center
 Project-URL: Homepage, https://github.com/Lexonight1/thermalright-trcc-linux
 Project-URL: Documentation, https://github.com/Lexonight1/thermalright-trcc-linux#readme

{trcc_linux-9.7.6 → trcc_linux-9.7.8}/pyproject.toml

@@ -4,7 +4,7 @@ build-backend = "hatchling.build"
 
 [project]
 name = "trcc-linux"
-version = "9.7.6"
+version = "9.7.8"
 description = "Linux implementation of Thermalright LCD Control Center"
 readme = "README.md"
 license = "GPL-3.0-or-later"
@@ -136,6 +136,9 @@ artifacts = [
     "**/assets/**/*.service",
     "**/assets/**/*.policy",
     "**/assets/**/*.svg",
+    # Privileged MCHBAR timing reader (no extension) — distro packages install
+    # it to /usr/bin/trcc-imc; shipped here so it's in the sdist/wheel too.
+    "**/assets/trcc-imc",
     # SELinux policy source — `trcc system setup` builds + loads it on Fedora
     # so source/pip installs can pass the USB/SCSI ioctls (packages ship the
     # compiled .pp via the rpm).

{trcc_linux-9.7.6 → trcc_linux-9.7.8}/src/trcc/__version__.py

@@ -1,4 +1,4 @@
 """TRCC Linux version information. History in doc/CHANGELOG.md."""
 
-__version__ = "9.7.6"
+__version__ = "9.7.8"
 __version_info__ = tuple(int(x) for x in __version__.split("."))

{trcc_linux-9.7.6 → trcc_linux-9.7.8}/src/trcc/adapters/diagnostics/debug_report.py

@@ -19,6 +19,7 @@ from __future__ import annotations
 
 import json
 import logging
+import os
 import platform as py_platform
 import sys
 from dataclasses import dataclass, field
@@ -43,6 +44,7 @@ class DebugReport:
     devices_error: str = ""
     sensors: list[dict[str, str]] = field(default_factory=list)
     sensors_error: str = ""
+    powercap: list[dict[str, str]] = field(default_factory=list)
     settings_json: str = ""
     settings_error: str = ""
     health: HealthReport = field(default_factory=HealthReport)
@@ -57,6 +59,7 @@ class DebugReport:
         sections.append(_render_kv("Paths", self.paths))
         sections.append(_render_devices(self.devices, self.devices_error))
         sections.append(_render_sensors(self.sensors, self.sensors_error))
+        sections.append(_render_powercap(self.powercap))
         sections.append(_render_settings(self.settings_json, self.settings_error))
         sections.append(_render_health(self.health))
         sections.append(_render_log_tail(self.log_tail))
@@ -83,6 +86,7 @@ def build_debug_report(
     path_table = _collect_paths(platform)
     devices, devices_err = _collect_devices(platform)
     sensors, sensors_err = _collect_sensors(platform)
+    powercap = _collect_powercap()
     settings_text, settings_err = _read_settings_file(
         settings_path or platform.paths().config_dir() / "config.json",
     )
@@ -98,6 +102,7 @@ def build_debug_report(
         devices_error=devices_err,
         sensors=sensors,
         sensors_error=sensors_err,
+        powercap=powercap,
         settings_json=settings_text,
         settings_error=settings_err,
         health=health,
@@ -188,6 +193,45 @@ def _collect_sensors(
     return rows, ""
 
 
+def _collect_powercap() -> list[dict[str, str]]:
+    """Probe the powercap RAPL nodes that CPU package power comes from (#194).
+
+    Answers the two questions a bare ``cpu:power = —`` can't: does the
+    ``intel-rapl:*`` node exist at all (``intel_rapl_msr`` loaded?), and is
+    its ``energy_uj`` counter readable by us (root-only since CVE-2020-8694?).
+    Linux-only; other OSes get no rows (the section renders as N/A).
+    """
+    log.debug("_collect_powercap: called")
+    if sys.platform != "linux":
+        return []
+    root = Path("/sys/class/powercap")
+    rows: list[dict[str, str]] = []
+    try:
+        domains = sorted(root.glob("intel-rapl:*"))
+    except OSError as e:
+        log.debug("_collect_powercap: glob failed: %s", e)
+        return []
+    for domain in domains:
+        # Top-level package domains only (intel-rapl:N), not subdomains.
+        if ":" in domain.name.split("intel-rapl:")[1]:
+            continue
+        try:
+            name = (domain / "name").read_text(encoding="utf-8").strip() \
+                if (domain / "name").is_file() else "?"
+            energy = domain / "energy_uj"
+            if not energy.exists():
+                readable = "no energy_uj"
+            else:
+                mode = energy.stat().st_mode & 0o777
+                ok = os.access(energy, os.R_OK)
+                readable = f"{'readable' if ok else 'ROOT-ONLY'} ({mode:#o})"
+        except OSError as e:
+            # A diagnostic must never abort the report — note the probe error.
+            name, readable = "?", f"probe error: {type(e).__name__}"
+        rows.append({"domain": domain.name, "name": name, "energy_uj": readable})
+    return rows
+
+
 def _read_settings_file(path: Path) -> tuple[str, str]:
     log.debug("_read_settings_file: path=%s", path)
     if not path.is_file():
@@ -251,6 +295,18 @@ def _render_sensors(rows: list[dict[str, str]], error: str) -> str:
     return f"## Sensors ({len(rows)})\n{body}"
 
 
+def _render_powercap(rows: list[dict[str, str]]) -> str:
+    if not rows:
+        return ("## CPU power (RAPL)\n  No intel-rapl powercap domains — "
+                "intel_rapl_msr not loaded (or N/A on this OS).\n"
+                "  Run `trcc setup` to load it + grant read access (#194).")
+    body = "\n".join(
+        f"  {r['domain']:16}  {r['name']:12}  energy_uj: {r['energy_uj']}"
+        for r in rows
+    )
+    return f"## CPU power (RAPL, {len(rows)} package domain(s))\n{body}"
+
+
 def _render_settings(text: str, error: str) -> str:
     if error and not text:
         return f"## Settings\n  {error}"

{trcc_linux-9.7.6 → trcc_linux-9.7.8}/src/trcc/adapters/sensors/aggregator.py

@@ -29,6 +29,7 @@ from ...core.models import MIN_REFRESH_INTERVAL_S, SensorReading
 from ...core.ports import (
     CpuSource,
     DiskSource,
+    DramSource,
     FanSource,
     GpuSource,
     MemorySource,
@@ -36,8 +37,10 @@ from ...core.ports import (
 )
 from .hwmon import (
     HwmonCpu,
+    SpdClock,
     discover_amd_gpus,
     discover_disk_temp,
+    discover_dram_temp,
     discover_fans,
     discover_intel_gpus,
     find_cpu_temp_device,
@@ -73,6 +76,8 @@ def _memory_keys() -> list[tuple[str, str, str]]:
         ("memory:available", "memory", "MB"),
         ("memory:total", "memory", "MB"),
         ("memory:percent", "memory", "%"),
+        ("memory:temp", "temperature", "°C"),
+        ("memory:clock", "clock", "MHz"),
     ]
 
 
@@ -129,6 +134,8 @@ class BaselineSensors(SensorEnumerator):
                  gpus: list[GpuSource] | None = None,
                  fans: list[FanSource] | None = None,
                  disks: list[DiskSource] | None = None,
+                 dram: list[DramSource] | None = None,
+                 spd_clock: SpdClock | None = None,
                  thread_context: Callable[[], AbstractContextManager[None]]
                      = nullcontext) -> None:
         self._cpu = cpu or PsutilCpu()
@@ -136,6 +143,8 @@ class BaselineSensors(SensorEnumerator):
         self._gpus: list[GpuSource] = gpus if gpus is not None else discover_nvidia_gpus()
         self._fans: list[FanSource] = fans or []
         self._disks: list[DiskSource] = disks or []
+        self._dram: list[DramSource] = dram or []
+        self._spd_clock = spd_clock
         # Per-thread OS setup the poll thread enters before touching OS
         # sensor APIs (Windows → COM apartment for WMI; others → no-op).
         # Injected as a narrow callable so this OS-neutral aggregator never
@@ -367,6 +376,20 @@ class BaselineSensors(SensorEnumerator):
         if disk_temps:
             _store(r, "disk:temp", max(disk_temps))
 
+        # DRAM temperature — one DramSource per DIMM; the model carries a single
+        # ``mem_temp`` slot, so collapse to the HOTTEST module, mirroring disk.
+        dram_temps = [
+            t for d in self._dram
+            if (t := self._read(d.temp, f"memory:{d.key}:temp")) is not None
+        ]
+        if dram_temps:
+            _store(r, "memory:temp", max(dram_temps))
+
+        # Memory channel clock — static SPD nameplate (cached at construction).
+        if self._spd_clock is not None:
+            _store(r, "memory:clock",
+                   self._read(self._spd_clock.clock, "memory:clock"))
+
         # IO + time
         try:
             self._io.poll(r)
@@ -415,8 +438,12 @@ def build_linux_sensors() -> BaselineSensors:
     gpus.extend(discover_intel_gpus(hwmon_devices))
     fans = discover_fans(hwmon_devices)
     disks = discover_disk_temp(hwmon_devices)
-    log.info("Linux sensors: cpu_temp=%s, gpus=%d, fans=%d, disks=%d",
+    dram = discover_dram_temp(hwmon_devices)
+    spd_clock = SpdClock()
+    log.info("Linux sensors: cpu_temp=%s, gpus=%d, fans=%d, disks=%d, dram=%d, "
+             "mem_clock=%s",
              "yes" if cpu.temp() is not None else "no",
-             len(gpus), len(fans), len(disks))
+             len(gpus), len(fans), len(disks), len(dram), spd_clock.clock())
     return BaselineSensors(cpu=cpu, memory=PsutilMemory(),
-                           gpus=gpus, fans=fans, disks=disks)
+                           gpus=gpus, fans=fans, disks=disks, dram=dram,
+                           spd_clock=spd_clock)

{trcc_linux-9.7.6 → trcc_linux-9.7.8}/src/trcc/adapters/sensors/hwmon.py

@@ -24,7 +24,7 @@ import threading
 import time
 from pathlib import Path
 
-from ...core.ports import CpuSource, DiskSource, FanSource, GpuSource
+from ...core.ports import CpuSource, DiskSource, DramSource, FanSource, GpuSource
 from .psutil_sources import PsutilCpu
 
 log = logging.getLogger(__name__)
@@ -34,6 +34,11 @@ _HWMON_ROOT = Path("/sys/class/hwmon")
 _DRM_ROOT = Path("/sys/class/drm")
 _POWERCAP_ROOT = Path("/sys/class/powercap")
 
+# When RAPL discovery comes up empty (driver not loaded, or energy_uj still
+# root-only), re-scan at most this often so CPU power appears without an app
+# restart once the user runs `trcc setup` to load the module / grant read.
+_RAPL_REDISCOVER_INTERVAL_S = 30.0
+
 _CPU_DRIVERS = ("coretemp", "k10temp", "zenpower")
 _AMD_DRIVER = "amdgpu"
 _INTEL_DRIVERS = ("i915", "xe")
@@ -129,12 +134,13 @@ class _RaplCpuPower:
     ``prev`` and report garbage watts.
     """
 
-    __slots__ = ("_last", "_lock", "_paths")
+    __slots__ = ("_last", "_lock", "_next_rediscover", "_paths")
 
     def __init__(self) -> None:
         self._paths = self._discover()
         self._last: tuple[float, float] | None = None   # (sum_uj, monotonic)
         self._lock = threading.Lock()
+        self._next_rediscover = 0.0
 
     @staticmethod
     def _discover() -> list[Path]:
@@ -163,15 +169,29 @@ class _RaplCpuPower:
         log.info("RAPL CPU power: %d readable package domain(s)", len(paths))
         return paths
 
+    def _maybe_rediscover(self) -> None:
+        """Re-scan for RAPL paths when we have none — covers a driver load or
+        permission grant that happened after construction (the user just ran
+        ``trcc setup``), so CPU power appears without restarting the app
+        (#194).  Throttled so the empty case stays cheap.  Caller holds
+        ``_lock``."""
+        now = time.monotonic()
+        if now < self._next_rediscover:
+            return
+        self._next_rediscover = now + _RAPL_REDISCOVER_INTERVAL_S
+        self._paths = self._discover()
+
     def read(self) -> float | None:
         """Watts since the last read, or None (first read / wrap / locked).
 
         Thread-safe: the read-delta-update runs under ``_lock`` so
         concurrent callers can't interleave their energy/time samples.
         """
-        if not self._paths:
-            return None
         with self._lock:
+            if not self._paths:
+                self._maybe_rediscover()
+                if not self._paths:
+                    return None
             total = 0.0
             for path in self._paths:
                 val = _read_float(path)
@@ -505,3 +525,70 @@ def discover_disk_temp(devices: list[HwmonDevice]) -> list[DiskSource]:
         label = _read_text(dev.path / "temp1_label")
         disks.append(HwmonDisk(dev, label))
     return disks
+
+
+# ── Memory (DRAM SPD-hub) temperature ────────────────────────────────
+
+# hwmon drivers that expose a DIMM thermal sensor: DDR5 modules carry an
+# integrated SPD-hub sensor (``spd5118``); DDR4 modules expose the optional
+# JEDEC JC-42.4 thermal sensor (``jc42``).  ``ee1004`` (the DDR4 SPD EEPROM)
+# is deliberately excluded — it carries identity data, not a temperature.
+_DRAM_DRIVERS = ("spd5118", "jc42")
+
+
+class HwmonDram(DramSource):
+    """One DIMM's temp1 sensor on a hwmon ``spd5118`` / ``jc42`` node."""
+
+    def __init__(self, hwmon: HwmonDevice, label: str | None) -> None:
+        self._hwmon = hwmon
+        self._label = label or f"{hwmon.driver} DRAM"
+
+    @property
+    def key(self) -> str:
+        # Include the hwmon dir name: matched DIMMs share a driver, so a
+        # driver-only key would collide across modules (and conflate their
+        # per-source read-failure bookkeeping).
+        return f"hwmon:{self._hwmon.driver}:{self._hwmon.path.name}:temp1"
+
+    @property
+    def name(self) -> str:
+        return self._label
+
+    def temp(self) -> float | None:
+        return self._hwmon.read_temp(1)
+
+
+def discover_dram_temp(devices: list[HwmonDevice]) -> list[DramSource]:
+    """One :class:`HwmonDram` per ``spd5118`` / ``jc42`` device with a temp1."""
+    log.info("discover_dram_temp: devices=%d", len(devices))
+    dram: list[DramSource] = []
+    for dev in devices:
+        if dev.driver not in _DRAM_DRIVERS:
+            continue
+        if dev.read_temp(1) is None:
+            log.debug("discover_dram_temp: %s has no temp1_input — skip", dev.driver)
+            continue
+        label = _read_text(dev.path / "temp1_label")
+        dram.append(HwmonDram(dev, label))
+    return dram
+
+
+# ── Memory channel clock (DDR5 SPD, rootless one-shot) ───────────────
+
+
+class SpdClock:
+    """Memory channel clock (MHz) decoded once from the DDR5 SPD EEPROM.
+
+    The clock is a static nameplate value, so it is read+decoded a single
+    time at construction and cached — ``clock()`` is then a cheap accessor the
+    aggregator can call every poll tick without touching sysfs.
+    """
+
+    def __init__(self) -> None:
+        from ..system.spd import read_spd_timings
+        timings = read_spd_timings()
+        self._mhz: float | None = float(timings.mhz) if timings else None
+        log.info("SpdClock: mhz=%s", self._mhz)
+
+    def clock(self) -> float | None:
+        return self._mhz

{trcc_linux-9.7.6 → trcc_linux-9.7.8}/src/trcc/adapters/system/_autostart.py

@@ -142,10 +142,15 @@ class XdgDesktopAutostart(AutostartManager):
 
         The second form is robust across pipx / venv / system-python
         installs because ``sys.executable`` is always the right interpreter.
+
+        ``--resume`` makes the autostarted instance start hidden in the
+        system tray (restoring the last-used theme) instead of popping a
+        window on every login — the long-standing autostart behaviour that
+        regressed when the flag was dropped (#201).
         """
         if (resolved := shutil.which("trcc")):
-            return f"{resolved} gui"
-        return f"{sys.executable} -m trcc gui"
+            return f"{resolved} gui --resume"
+        return f"{sys.executable} -m trcc gui --resume"
 
 
 # =========================================================================

trcc_linux-9.7.8/src/trcc/adapters/system/_imc_timings.py

@@ -0,0 +1,71 @@
+"""Decode Intel (Alder/Raptor Lake) MCHBAR memory-timing registers — pure.
+
+The privileged ``trcc-imc`` helper reads four raw MCHBAR registers as root and
+prints them; this module turns those integers into cycle-count timings.  No
+I/O, no root, no OS calls — just bit math — so it is unit-testable with the
+register values captured from real hardware.
+
+Register map (channel 0; CoreFreq ``x86_64/intel_reg.h``):
+
+    BIOS_DDR @0x5E00  mult[7:0]                       → MT/s = mult * 100 * 2
+    TC_PRE   @0xE000  tRP[7:0]  tRAS[50:42] tRCD[58:51]
+    ODT      @0xE070  tCL[22:16] tCWL[31:24]
+    REFRESH  @0xE43C  tREFI[17:0] tRFC[30:18]
+
+``tRC`` has no register — it is the standard ``tRAS + tRP``.  The ``tRFC`` here
+is the controller's live tRFC2 (2x fine-grained refresh), distinct from the
+SPD tRFC1; callers decide which to display.
+"""
+from __future__ import annotations
+
+import logging
+from dataclasses import dataclass
+
+log = logging.getLogger(__name__)
+
+
+@dataclass(frozen=True)
+class ImcTimings:
+    """Live primary timings (cycle counts) read from the IMC."""
+
+    mts: int          # effective data rate (MT/s)
+    tcas: int
+    tcwl: int
+    trcd: int
+    trp: int
+    tras: int
+    trc: int
+    trfc: int         # tRFC2 (live refresh) — NOT the SPD tRFC1
+
+
+def _bits(value: int, hi: int, lo: int) -> int:
+    return (value >> lo) & ((1 << (hi - lo + 1)) - 1)
+
+
+def decode_adl(tc_pre: int, odt: int, refresh: int, bios_ddr: int) -> ImcTimings | None:
+    """Decode the four ADL/RPL MCHBAR registers, or ``None`` if implausible.
+
+    The range checks are the caller's defence-in-depth bounds check: a misread
+    register (wrong CPU map, garbage MCHBAR base) yields absurd values, which we
+    reject rather than show.
+    """
+    timings = ImcTimings(
+        mts=(bios_ddr & 0xFF) * 100 * 2,
+        tcas=_bits(odt, 22, 16),
+        tcwl=_bits(odt, 31, 24),
+        trcd=_bits(tc_pre, 58, 51),
+        trp=_bits(tc_pre, 7, 0),
+        tras=_bits(tc_pre, 50, 42),
+        trc=_bits(tc_pre, 50, 42) + _bits(tc_pre, 7, 0),
+        trfc=_bits(refresh, 30, 18),
+    )
+    if not (3200 <= timings.mts <= 8400
+            and 0 < timings.tcas < 128 and 0 < timings.trcd < 128
+            and 0 < timings.trp < 128 and 0 < timings.tras < 256
+            and 0 < timings.trfc < 4096):
+        log.warning("decode_adl: implausible timings %s — rejected", timings)
+        return None
+    log.info("decode_adl: %d MT/s  %d-%d-%d-%d tRC=%d tRFC2=%d",
+             timings.mts, timings.tcas, timings.trcd, timings.trp,
+             timings.tras, timings.trc, timings.trfc)
+    return timings

{trcc_linux-9.7.6 → trcc_linux-9.7.8}/src/trcc/adapters/system/_udev.py

@@ -42,6 +42,23 @@ log = logging.getLogger(__name__)
 _RULES_PATH = Path("/etc/udev/rules.d/99-trcc-lcd.rules")
 _MODPROBE_PATH = Path("/etc/modprobe.d/trcc-lcd.conf")
 _MODULES_LOAD_PATH = Path("/etc/modules-load.d/trcc-sg.conf")
+_MODULES_LOAD_RAPL_PATH = Path("/etc/modules-load.d/trcc-rapl.conf")
+
+# `intel_rapl_msr` exposes the powercap RAPL energy counter on BOTH Intel and
+# AMD (Zen) — the vendor-agnostic `/sys/class/powercap/intel-rapl:*` node trcc
+# reads CPU package watts from (#194).
+_RAPL_MODULE = "intel_rapl_msr"
+
+# CPU package power read-grant.  `energy_uj` is root-only since CVE-2020-8694
+# (PLATYPUS), so without this trcc can't report CPU watts on most distros.
+# Scoped to ONLY the energy counter; reverted by deleting the rules file.
+_POWERCAP_RULES = (
+    "# CPU package power (RAPL) — make energy_uj readable without root so\n"
+    "# trcc can report CPU watts (root-only since CVE-2020-8694).  Scoped to\n"
+    "# the energy counter only; delete this file to revert.\n"
+    'SUBSYSTEM=="powercap", KERNEL=="intel-rapl:*", '
+    'RUN+="/bin/chmod 0444 /sys$devpath/energy_uj"\n'
+)
 
 
 # Wire → which kernel subsystems grant access for that protocol.
@@ -86,7 +103,8 @@ def build_udev_rules() -> str:
             f'ATTR{{power/autosuspend_delay_ms}}="10000"'
         )
         lines.append("")
-    return "\n".join(lines).rstrip() + "\n"
+    body = "\n".join(lines).rstrip() + "\n"
+    return f"{body}\n{_POWERCAP_RULES}"
 
 
 def build_modprobe_conf() -> str:
@@ -128,6 +146,9 @@ def install(dry_run: bool = False) -> int:
             print(modprobe, end="")
         print(f"\n--- would write {_MODULES_LOAD_PATH} ---")
         print("sg\n")
+        print(f"--- would write {_MODULES_LOAD_RAPL_PATH} ---")
+        print(f"{_RAPL_MODULE}\n")
+        print(f"--- would modprobe {_RAPL_MODULE} (CPU power, now) ---")
         return 0
 
     if os.geteuid() != 0:
@@ -143,10 +164,22 @@ def install(dry_run: bool = False) -> int:
             log.info("Wrote %s", _MODPROBE_PATH)
         _write_atomic(_MODULES_LOAD_PATH, "sg\n")
         log.info("Wrote %s (auto-load sg kernel module)", _MODULES_LOAD_PATH)
+        _write_atomic(_MODULES_LOAD_RAPL_PATH, f"{_RAPL_MODULE}\n")
+        log.info("Wrote %s (auto-load %s for CPU power)",
+                 _MODULES_LOAD_RAPL_PATH, _RAPL_MODULE)
     except OSError:
         log.exception("Could not write udev/modprobe config")
         return 1
 
+    # Load the RAPL module now so CPU power works without a reboot — the
+    # modules-load.d entry above only takes effect on next boot.  Best-effort:
+    # a kernel without the module (or a VM) just leaves CPU power unavailable.
+    try:
+        subprocess.run(["modprobe", _RAPL_MODULE], check=False)
+    except (OSError, subprocess.SubprocessError):
+        log.warning("modprobe %s failed — CPU power may need a reboot",
+                    _RAPL_MODULE)
+
     return _reload_udev()
 
 
@@ -166,7 +199,10 @@ def _reload_udev() -> int:
     for cmd in (["udevadm", "control", "--reload-rules"],
                 ["udevadm", "trigger", "--subsystem-match=usb"],
                 ["udevadm", "trigger", "--subsystem-match=scsi_generic"],
-                ["udevadm", "trigger", "--subsystem-match=hidraw"]):
+                ["udevadm", "trigger", "--subsystem-match=hidraw"],
+                # Re-fire the RAPL read-grant on the already-present
+                # powercap nodes so CPU power works without a reboot (#194).
+                ["udevadm", "trigger", "--subsystem-match=powercap"]):
         try:
             result = subprocess.run(cmd, check=False)
         except (OSError, subprocess.SubprocessError):