trainstream 0.1.0__tar.gz

trainstream-0.1.0/LICENSE

@@ -0,0 +1,202 @@
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+   Copyright 2026 John Anish G
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trainstream-0.1.0/MANIFEST.in

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+include README.md LICENSE NOTICE pyproject.toml setup.py build.bat
+recursive-include csrc *.h *.cpp *.cu
+recursive-include trainstream *.py
+prune dashboard
+prune research
+prune runs
+prune build
+global-exclude *.py[cod] __pycache__ *.pyd *.so

trainstream-0.1.0/NOTICE

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+TrainStream
+Copyright 2026 John Anish G
+
+This product is licensed under the Apache License, Version 2.0 (see LICENSE).

trainstream-0.1.0/PKG-INFO

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+Metadata-Version: 2.4
+Name: trainstream
+Version: 0.1.0
+Summary: Zero-dependency PCIe offloading engine for PyTorch training (optimizer, gradients, activations).
+Home-page: https://github.com/johnanishg/TrainStream
+Author: John Anish G
+License: Apache-2.0
+Project-URL: Source, https://github.com/johnanishg/TrainStream
+Project-URL: Issues, https://github.com/johnanishg/TrainStream/issues
+Classifier: Development Status :: 3 - Alpha
+Classifier: Intended Audience :: Science/Research
+Classifier: Intended Audience :: Developers
+Classifier: Programming Language :: Python :: 3
+Classifier: Programming Language :: C++
+Classifier: Environment :: GPU :: NVIDIA CUDA
+Classifier: Operating System :: Microsoft :: Windows
+Classifier: Operating System :: POSIX :: Linux
+Classifier: Topic :: Scientific/Engineering :: Artificial Intelligence
+Requires-Python: >=3.9
+Description-Content-Type: text/markdown
+License-File: LICENSE
+License-File: NOTICE
+Provides-Extra: hf
+Requires-Dist: transformers; extra == "hf"
+Requires-Dist: accelerate; extra == "hf"
+Requires-Dist: peft; extra == "hf"
+Dynamic: author
+Dynamic: classifier
+Dynamic: description
+Dynamic: description-content-type
+Dynamic: home-page
+Dynamic: license
+Dynamic: license-file
+Dynamic: project-url
+Dynamic: provides-extra
+Dynamic: requires-python
+Dynamic: summary
+
+# TrainStream
+
+Train and fine-tune models larger than your GPU's memory by moving optimizer state, gradients and activations to system RAM over PCIe — with one line of code and no third-party dependencies.
+
+```python
+import trainstream
+model, optimizer = trainstream.wrap(model, optimizer)
+```
+
+TrainStream is a C++/CUDA extension for PyTorch. It keeps only the weights in VRAM: gradients stream to pinned host memory as autograd produces them, AdamW runs on host threads while the backward pass continues, and a profiled share of activations is paged out and prefetched back block by block. Updates match `torch.optim.AdamW` (max parameter difference ≈3·10⁻⁷ after 20 steps); activation paging is bit-exact.
+
+## Results (RTX 5090 Laptop GPU, 24 GB)
+
+| Workload | Stock PyTorch AdamW | TrainStream |
+|---|---|---|
+| 1.8B-parameter GPT, fp32, batch 8×512 | 34.1 GiB peak — exceeds VRAM, driver spills to RAM, 13.7 s/step | 20.6 GiB, 1.1 s/step (13.5 GiB with all activations paged) |
+| Qwen2.5-1.5B full fine-tune (Hugging Face Trainer) | 35.9 GiB peak (spill), 111.7 s / 10 steps | 18.7 GiB, 28.5 s / 10 steps, same losses |
+| 85M GPT (fits either way) | 2.5 GiB, ~94k tokens/s | 1.8 GiB, ~64k tokens/s |
+
+When a model already fits, TrainStream trades throughput for memory. Its value is training what does not fit, or freeing VRAM for larger batches. All numbers come from a single machine; see `research/research_dossier.html` for methodology and caveats.
+
+## Requirements
+
+- An NVIDIA GPU and a CUDA build of PyTorch
+- The CUDA toolkit matching PyTorch's CUDA major version, and a C++ compiler (MSVC 2022+ on Windows, GCC 11+ on Linux)
+- Tested on Windows 11, PyTorch 2.14.1+cu130, CUDA 13.4, Python 3.14. Linux builds use the same setup but are untested.
+
+## Install
+
+TrainStream compiles against the PyTorch you already have, so install PyTorch first and disable build isolation:
+
+```bash
+pip install torch --index-url https://download.pytorch.org/whl/cu130
+pip install trainstream --no-build-isolation
+```
+
+From a checkout: `build.bat` (Windows) or `python setup.py build_ext --inplace`.
+
+## Usage
+
+```python
+import torch, trainstream
+
+model = MyModel().cuda()
+optimizer = torch.optim.AdamW(model.parameters(), lr=3e-4)
+model, optimizer = trainstream.wrap(model, optimizer)   # max_grad_norm=..., accumulation_steps=... if you use them
+
+for x, y in loader:
+    with torch.autocast("cuda", dtype=torch.bfloat16):
+        loss = model(x.cuda(), y.cuda())
+    loss.backward()
+    optimizer.step()
+    optimizer.zero_grad()
+```
+
+Hugging Face (`pip install transformers accelerate`):
+
+```python
+from trainstream.integrations.huggingface import TrainStreamTrainer
+trainer = TrainStreamTrainer(model=model, args=TrainingArguments(..., bf16=True), train_dataset=ds)
+trainer.train()
+```
+
+Use `bf16=True` or fp32; fp16 with loss scaling is not supported.
+
+## Tools in this repository
+
+- `start_dashboard.bat` — live dashboard: one-click comparison reports (stock AdamW vs TrainStream), real-time VRAM / RAM / PCIe charts
+- `examples/verify_ram_offload.py` — proves where training memory lives (VRAM vs system RAM) with a PASS/FAIL verdict
+- `examples/hf_finetune.py` — fine-tune a Hugging Face model, optionally side by side with the stock Trainer
+- `docs/index.html` — full documentation; `research/` — research dossier with all measurements
+
+## Limitations
+
+- Weights stay in VRAM (no parameter offloading); large-vocabulary output logits are not offloaded
+- Single GPU per process
+- Host AdamW speed is bounded by system RAM bandwidth
+
+## License
+
+Apache License 2.0 — see [LICENSE](LICENSE) and [NOTICE](NOTICE). Copyright 2026 John Anish G.

trainstream-0.1.0/README.md

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+# TrainStream
+
+Train and fine-tune models larger than your GPU's memory by moving optimizer state, gradients and activations to system RAM over PCIe — with one line of code and no third-party dependencies.
+
+```python
+import trainstream
+model, optimizer = trainstream.wrap(model, optimizer)
+```
+
+TrainStream is a C++/CUDA extension for PyTorch. It keeps only the weights in VRAM: gradients stream to pinned host memory as autograd produces them, AdamW runs on host threads while the backward pass continues, and a profiled share of activations is paged out and prefetched back block by block. Updates match `torch.optim.AdamW` (max parameter difference ≈3·10⁻⁷ after 20 steps); activation paging is bit-exact.
+
+## Results (RTX 5090 Laptop GPU, 24 GB)
+
+| Workload | Stock PyTorch AdamW | TrainStream |
+|---|---|---|
+| 1.8B-parameter GPT, fp32, batch 8×512 | 34.1 GiB peak — exceeds VRAM, driver spills to RAM, 13.7 s/step | 20.6 GiB, 1.1 s/step (13.5 GiB with all activations paged) |
+| Qwen2.5-1.5B full fine-tune (Hugging Face Trainer) | 35.9 GiB peak (spill), 111.7 s / 10 steps | 18.7 GiB, 28.5 s / 10 steps, same losses |
+| 85M GPT (fits either way) | 2.5 GiB, ~94k tokens/s | 1.8 GiB, ~64k tokens/s |
+
+When a model already fits, TrainStream trades throughput for memory. Its value is training what does not fit, or freeing VRAM for larger batches. All numbers come from a single machine; see `research/research_dossier.html` for methodology and caveats.
+
+## Requirements
+
+- An NVIDIA GPU and a CUDA build of PyTorch
+- The CUDA toolkit matching PyTorch's CUDA major version, and a C++ compiler (MSVC 2022+ on Windows, GCC 11+ on Linux)
+- Tested on Windows 11, PyTorch 2.14.1+cu130, CUDA 13.4, Python 3.14. Linux builds use the same setup but are untested.
+
+## Install
+
+TrainStream compiles against the PyTorch you already have, so install PyTorch first and disable build isolation:
+
+```bash
+pip install torch --index-url https://download.pytorch.org/whl/cu130
+pip install trainstream --no-build-isolation
+```
+
+From a checkout: `build.bat` (Windows) or `python setup.py build_ext --inplace`.
+
+## Usage
+
+```python
+import torch, trainstream
+
+model = MyModel().cuda()
+optimizer = torch.optim.AdamW(model.parameters(), lr=3e-4)
+model, optimizer = trainstream.wrap(model, optimizer)   # max_grad_norm=..., accumulation_steps=... if you use them
+
+for x, y in loader:
+    with torch.autocast("cuda", dtype=torch.bfloat16):
+        loss = model(x.cuda(), y.cuda())
+    loss.backward()
+    optimizer.step()
+    optimizer.zero_grad()
+```
+
+Hugging Face (`pip install transformers accelerate`):
+
+```python
+from trainstream.integrations.huggingface import TrainStreamTrainer
+trainer = TrainStreamTrainer(model=model, args=TrainingArguments(..., bf16=True), train_dataset=ds)
+trainer.train()
+```
+
+Use `bf16=True` or fp32; fp16 with loss scaling is not supported.
+
+## Tools in this repository
+
+- `start_dashboard.bat` — live dashboard: one-click comparison reports (stock AdamW vs TrainStream), real-time VRAM / RAM / PCIe charts
+- `examples/verify_ram_offload.py` — proves where training memory lives (VRAM vs system RAM) with a PASS/FAIL verdict
+- `examples/hf_finetune.py` — fine-tune a Hugging Face model, optionally side by side with the stock Trainer
+- `docs/index.html` — full documentation; `research/` — research dossier with all measurements
+
+## Limitations
+
+- Weights stay in VRAM (no parameter offloading); large-vocabulary output logits are not offloaded
+- Single GPU per process
+- Host AdamW speed is bounded by system RAM bandwidth
+
+## License
+
+Apache License 2.0 — see [LICENSE](LICENSE) and [NOTICE](NOTICE). Copyright 2026 John Anish G.

trainstream-0.1.0/build.bat

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+@echo off
+REM Builds trainstream._C in place on Windows.
+REM Loads the MSVC x64 toolchain and points the build at the CUDA toolkit.
+setlocal
+
+set "VCVARS=C:\Program Files (x86)\Microsoft Visual Studio\18\BuildTools\VC\Auxiliary\Build\vcvars64.bat"
+if not exist "%VCVARS%" (
+  for /f "usebackq delims=" %%i in (`"%ProgramFiles(x86)%\Microsoft Visual Studio\Installer\vswhere.exe" -latest -products * -property installationPath`) do set "VCVARS=%%i\VC\Auxiliary\Build\vcvars64.bat"
+)
+call "%VCVARS%" >nul || exit /b 1
+
+if "%CUDA_HOME%"=="" (
+  for /d %%d in ("C:\Program Files\NVIDIA GPU Computing Toolkit\CUDA\v*") do set "CUDA_HOME=%%d"
+)
+set "CUDA_PATH=%CUDA_HOME%"
+set "PATH=%CUDA_HOME%\bin;%PATH%"
+set DISTUTILS_USE_SDK=1
+
+set "PY=%~dp0.venv\Scripts\python.exe"
+if not exist "%PY%" set "PY=python"
+
+cd /d "%~dp0"
+"%PY%" setup.py build_ext --inplace %*

trainstream-0.1.0/csrc/bindings.cpp

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+// TrainStream — Python bindings (module: trainstream._C).
+//
+// Every call that can block on the GPU or on worker threads releases the GIL,
+// so autograd's backward thread and the training thread never deadlock on it.
+
+#include <torch/extension.h>
+
+#include <cstdio>
+#include <exception>
+
+#include "offload_adamw.h"
+#include "trainstream.h"
+
+namespace py = pybind11;
+using namespace trainstream;
+
+namespace {
+using nogil = py::call_guard<py::gil_scoped_release>;
+
+// An exception escaping a destructor (e.g. a CUDA error surfacing inside the
+// caching allocator's free path) calls std::terminate, and the default abort
+// handler prints only a stack. Print the message first, then chain.
+std::terminate_handler g_prev_terminate = nullptr;
+void print_then_terminate() {
+  if (auto ex = std::current_exception()) {
+    try {
+      std::rethrow_exception(ex);
+    } catch (const std::exception& e) {
+      std::fprintf(stderr, "[trainstream] terminate: %s\n", e.what());
+    } catch (...) {
+      std::fprintf(stderr, "[trainstream] terminate: unknown exception\n");
+    }
+    std::fflush(stderr);
+  }
+  if (g_prev_terminate) g_prev_terminate();
+  std::abort();
+}
+
+std::map<std::string, std::string> build_info() {
+  int runtime_version = 0, driver_version = 0;
+  cudaRuntimeGetVersion(&runtime_version);
+  cudaDriverGetVersion(&driver_version);
+  return {{"cuda_runtime", std::to_string(runtime_version)},
+          {"cuda_driver", std::to_string(driver_version)},
+          {"compiled_with_cuda", std::to_string(CUDART_VERSION)},
+#ifdef _MSVC_LANG
+          {"cxx_standard", std::to_string(_MSVC_LANG)}};  // MSVC pins __cplusplus to 199711L
+#else
+          {"cxx_standard", std::to_string(__cplusplus)}};
+#endif
+}
+}  // namespace
+
+PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
+  m.doc() = "TrainStream native runtime: pinned memory, DMA streams, offloaded AdamW";
+  g_prev_terminate = std::set_terminate(print_then_terminate);
+
+  m.def("build_info", &build_info);
+  m.def("now_ms", &now_ms);
+  m.def("init", [](int device) { runtime(device); }, py::arg("device") = -1);
+  m.def("is_dense", [](const at::Tensor& t) { return t.is_non_overlapping_and_dense(); },
+        "True if the tensor occupies exactly numel*itemsize contiguous bytes (any dimension order).");
+
+  // ---- events -------------------------------------------------------------
+  py::class_<Event, std::shared_ptr<Event>>(m, "Event")
+      .def(py::init([](int device, bool timing) { return make_event(resolve_device(device), timing); }),
+           py::arg("device") = -1, py::arg("timing") = false)
+      .def("record", [](Event& e) { e.record(compute_stream(e.device())); },
+           "Record on the current PyTorch compute stream.")
+      .def("query", &Event::query)
+      .def("synchronize", &Event::synchronize, nogil())
+      .def("wait", [](Event& e) { e.block(compute_stream(e.device())); },
+           "Make the current compute stream wait for this event (GPU-side, non-blocking for the host).")
+      .def("elapsed_ms", &Event::elapsed_ms, nogil())
+      .def_property_readonly("recorded", &Event::recorded)
+      .def_property_readonly("device", &Event::device);
+  m.def("record_event", &record_on_current, py::arg("device") = -1, py::arg("timing") = false);
+
+  // ---- pinned memory --------------------------------------------------------
+  m.def("pinned_empty", &pinned_empty, py::arg("sizes"), py::arg("dtype"), py::arg("tag") = "user",
+        py::arg("mapped") = false, py::arg("cached") = true);
+  m.def("pinned_stats", &pinned_stats);
+  m.def("pinned_tag_bytes", &pinned_tag_bytes);
+  m.def("pinned_log", &pinned_log, py::arg("limit") = 256);
+  m.def("pinned_empty_cache", &pinned_empty_cache, nogil());
+  m.def("pinned_set_cache_limit", &pinned_set_cache_limit);
+
+  // ---- transfers ------------------------------------------------------------
+  m.def("d2h_async", &d2h_async, py::arg("dst"), py::arg("src"));
+  m.def("h2d_async", &h2d_async, py::arg("dst"), py::arg("src"), py::arg("after") = EventPtr());
+  m.def("h2d_alloc_async", &h2d_alloc_async, py::arg("src"), py::arg("after") = EventPtr(),
+        py::arg("device") = -1, py::arg("sizes") = std::vector<int64_t>{},
+        py::arg("strides") = std::vector<int64_t>{});
+  m.def("transfer_stats", &transfer_stats, py::arg("device") = -1);
+  m.def("synchronize_streams", [](int device) {
+        Runtime& rt = runtime(device);
+        TS_CUDA_CHECK(cudaStreamSynchronize(rt.d2h));
+        TS_CUDA_CHECK(cudaStreamSynchronize(rt.h2d));
+        TS_CUDA_CHECK(cudaStreamSynchronize(rt.upd));
+      }, py::arg("device") = -1, nogil());
+
+  // ---- benchmarks -----------------------------------------------------------
+  m.def("benchmark_pcie", &benchmark_pcie, py::arg("device") = -1, py::arg("bytes") = 256LL << 20,
+        py::arg("iters") = 10, nogil());
+  m.def("benchmark_matmul", &benchmark_matmul, py::arg("device") = -1, py::arg("n") = 4096,
+        py::arg("dtype") = at::kBFloat16, py::arg("iters") = 20, nogil());
+  m.def("benchmark_cpu_adamw", &benchmark_cpu_adamw, py::arg("numel") = 1 << 24, py::arg("threads") = 0,
+        nogil());
+  m.def("benchmark_zero_copy_adamw", &benchmark_zero_copy_adamw, py::arg("device") = -1,
+        py::arg("numel") = 1 << 24, nogil());
+
+  // ---- optimizer engine -----------------------------------------------------
+  py::class_<OffloadAdamW>(m, "OffloadAdamWEngine")
+      .def(py::init<int, const std::string&, int, int64_t>(), py::arg("device"), py::arg("mode") = "cpu",
+           py::arg("threads") = 0, py::arg("chunk_elems") = 1 << 20)
+      .def("add_param", &OffloadAdamW::add_param, py::arg("param"), py::arg("pin_moments") = true)
+      .def("offload_grad", &OffloadAdamW::offload_grad, py::arg("id"), py::arg("grad"),
+           py::arg("apply_update") = false, py::arg("lr") = 0.0, py::arg("beta1") = 0.9, py::arg("beta2") = 0.999,
+           py::arg("eps") = 1e-8, py::arg("weight_decay") = 0.0, nogil())
+      .def("step", &OffloadAdamW::step, py::arg("ids"), py::arg("lrs"), py::arg("beta1s"), py::arg("beta2s"),
+           py::arg("epss"), py::arg("wds"), py::arg("grads"), py::arg("max_grad_norm") = 0.0,
+           py::arg("compute_norm") = false, nogil())
+      .def("wait_ready", &OffloadAdamW::wait_ready, nogil())
+      .def("synchronize", &OffloadAdamW::synchronize, nogil())
+      .def("last_grad_norm", &OffloadAdamW::last_grad_norm, nogil())
+      .def("state", &OffloadAdamW::state, nogil())
+      .def("load_state",
+           [](OffloadAdamW& e, int64_t id, const at::Tensor& m, const at::Tensor& v,
+              const std::optional<at::Tensor>& master, int64_t step) {
+             e.load_state(id, m, v, master.value_or(at::Tensor()), step);
+           },
+           py::arg("id"), py::arg("exp_avg"), py::arg("exp_avg_sq"), py::arg("master") = py::none(),
+           py::arg("step") = 0, nogil())
+      .def("get_step", &OffloadAdamW::get_step)
+      .def("stats", &OffloadAdamW::stats)
+      .def_property_readonly("mode", &OffloadAdamW::mode)
+      .def_property_readonly("num_params", &OffloadAdamW::num_params)
+      .def_property_readonly("threads", &OffloadAdamW::threads);
+}

trainstream-0.1.0/csrc/kernels.h

@@ -0,0 +1,49 @@
+// TrainStream — device kernel launch interface.
+//
+// This header is deliberately free of PyTorch includes so that nvcc only has to
+// parse CUDA runtime headers when compiling offload_adamw_kernel.cu. The C++
+// translation units translate at::ScalarType into kernels::DType before calling.
+#pragma once
+
+#include <cstdint>
+#include <cuda_runtime.h>
+
+namespace trainstream {
+namespace kernels {
+
+enum class DType : int { kFloat32 = 0, kFloat16 = 1, kBFloat16 = 2 };
+
+// Hyper-parameters for one AdamW step on one tensor. Bias corrections are folded
+// on the host so the kernel does no pow() per element:
+//   step_size              = lr / (1 - beta1^t)
+//   bias_correction2_sqrt  = sqrt(1 - beta2^t)
+struct AdamWParams {
+  float lr;
+  float beta1;
+  float beta2;
+  float eps;
+  float weight_decay;
+  float step_size;
+  float bias_correction2_sqrt;
+  float max_grad_norm;  // only read when a grad_sq_norm pointer is supplied
+};
+
+// Fused AdamW where the optimizer state lives in *mapped pinned host memory*.
+// `exp_avg`, `exp_avg_sq` and (optionally) `master` are device-visible aliases of
+// cudaHostAlloc(cudaHostAllocMapped) buffers, so every state read/write is a PCIe
+// transaction and the moments never occupy VRAM. `param` and `grad` live in VRAM.
+// If `master` is non-null the fp32 master copy is updated and `param` receives a
+// rounded copy (mixed-precision training with fp16/bf16 weights).
+// If `grad_sq_norm` is non-null it points at a device float holding sum(g^2) over
+// all gradients; the kernel derives the global-norm clip coefficient from it.
+cudaError_t adamw_zero_copy(DType dtype, void* param, const void* grad, float* exp_avg,
+                            float* exp_avg_sq, float* master, int64_t n,
+                            const AdamWParams& hp, const float* grad_sq_norm, int sm_count,
+                            cudaStream_t stream);
+
+// out[0] += sum(grad[i]^2). Used for global gradient-norm clipping on the GPU path.
+cudaError_t grad_sq_norm_accumulate(DType dtype, const void* grad, int64_t n, float* out,
+                                    int sm_count, cudaStream_t stream);
+
+}  // namespace kernels
+}  // namespace trainstream