tdl-xoa-driver 1.5.1__tar.gz → 1.6.0__tar.gz

{tdl_xoa_driver-1.5.1/tdl_xoa_driver.egg-info → tdl_xoa_driver-1.6.0}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: tdl-xoa-driver
-Version: 1.5.1
+Version: 1.6.0
 Summary: TDL XOA Python API is a Python library providing user-friendly communication interfaces to Teledyne LeCroy Xena Ethernet traffic generation test equipment. It provides a rich collection of APIs that can be used to either write test scripts or develop applications.
 Home-page: https://github.com/xenanetworks/tdl-xoa-driver
 Author: Leonard Yu, Zoltan Hanisch

{tdl_xoa_driver-1.5.1 → tdl_xoa_driver-1.6.0/tdl_xoa_driver.egg-info}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: tdl-xoa-driver
-Version: 1.5.1
+Version: 1.6.0
 Summary: TDL XOA Python API is a Python library providing user-friendly communication interfaces to Teledyne LeCroy Xena Ethernet traffic generation test equipment. It provides a rich collection of APIs that can be used to either write test scripts or develop applications.
 Home-page: https://github.com/xenanetworks/tdl-xoa-driver
 Author: Leonard Yu, Zoltan Hanisch

{tdl_xoa_driver-1.5.1 → tdl_xoa_driver-1.6.0}/tdl_xoa_driver.egg-info/SOURCES.txt

@@ -138,50 +138,25 @@ xoa_driver/internals/hli/modules/module_l47.py
 xoa_driver/internals/hli/modules/module_l47ve.py
 xoa_driver/internals/hli/modules/modules_l23/__init__.py
 xoa_driver/internals/hli/modules/modules_l23/family_combi.py
-xoa_driver/internals/hli/modules/modules_l23/family_d.py
-xoa_driver/internals/hli/modules/modules_l23/family_e.py
 xoa_driver/internals/hli/modules/modules_l23/family_edun.py
-xoa_driver/internals/hli/modules/modules_l23/family_f.py
-xoa_driver/internals/hli/modules/modules_l23/family_g.py
-xoa_driver/internals/hli/modules/modules_l23/family_h.py
-xoa_driver/internals/hli/modules/modules_l23/family_i.py
-xoa_driver/internals/hli/modules/modules_l23/family_j.py
-xoa_driver/internals/hli/modules/modules_l23/family_k.py
-xoa_driver/internals/hli/modules/modules_l23/family_l.py
-xoa_driver/internals/hli/modules/modules_l23/family_l1.py
-xoa_driver/internals/hli/modules/modules_l23/family_m.py
-xoa_driver/internals/hli/modules/modules_l23/family_n.py
+xoa_driver/internals/hli/modules/modules_l23/family_freya.py
+xoa_driver/internals/hli/modules/modules_l23/family_loki.py
+xoa_driver/internals/hli/modules/modules_l23/family_odin.py
+xoa_driver/internals/hli/modules/modules_l23/family_thor.py
 xoa_driver/internals/hli/modules/modules_l23/module_l23_base.py
 xoa_driver/internals/hli/ports/__init__.py
 xoa_driver/internals/hli/ports/base_port.py
 xoa_driver/internals/hli/ports/port_l23/__init__.py
-xoa_driver/internals/hli/ports/port_l23/edun_l1.py
-xoa_driver/internals/hli/ports/port_l23/family_combi.py
-xoa_driver/internals/hli/ports/port_l23/family_d.py
-xoa_driver/internals/hli/ports/port_l23/family_e.py
 xoa_driver/internals/hli/ports/port_l23/family_edun.py
-xoa_driver/internals/hli/ports/port_l23/family_f.py
-xoa_driver/internals/hli/ports/port_l23/family_g.py
-xoa_driver/internals/hli/ports/port_l23/family_h.py
-xoa_driver/internals/hli/ports/port_l23/family_i.py
-xoa_driver/internals/hli/ports/port_l23/family_j.py
-xoa_driver/internals/hli/ports/port_l23/family_k.py
-xoa_driver/internals/hli/ports/port_l23/family_l.py
-xoa_driver/internals/hli/ports/port_l23/family_l1.py
-xoa_driver/internals/hli/ports/port_l23/family_m.py
-xoa_driver/internals/hli/ports/port_l23/fault_jkl.py
-xoa_driver/internals/hli/ports/port_l23/freya_l1.py
-xoa_driver/internals/hli/ports/port_l23/pcs_pma_ghijkl.py
-xoa_driver/internals/hli/ports/port_l23/pcs_pma_ijkl_chimera.py
-xoa_driver/internals/hli/ports/port_l23/pcs_pma_l.py
+xoa_driver/internals/hli/ports/port_l23/family_freya.py
+xoa_driver/internals/hli/ports/port_l23/family_loki.py
+xoa_driver/internals/hli/ports/port_l23/family_odin.py
+xoa_driver/internals/hli/ports/port_l23/family_thor.py
+xoa_driver/internals/hli/ports/port_l23/layer1_edun.py
+xoa_driver/internals/hli/ports/port_l23/layer1_freya.py
+xoa_driver/internals/hli/ports/port_l23/layer1_loki.py
+xoa_driver/internals/hli/ports/port_l23/layer1_thor.py
 xoa_driver/internals/hli/ports/port_l23/port_l23ve.py
-xoa_driver/internals/hli/ports/port_l23/bases/__init__.py
-xoa_driver/internals/hli/ports/port_l23/bases/port_capture.py
-xoa_driver/internals/hli/ports/port_l23/bases/port_l23.py
-xoa_driver/internals/hli/ports/port_l23/bases/port_l23_genuine.py
-xoa_driver/internals/hli/ports/port_l23/bases/port_reception_statistics.py
-xoa_driver/internals/hli/ports/port_l23/bases/port_transceiver.py
-xoa_driver/internals/hli/ports/port_l23/bases/port_transmission_statistics.py
 xoa_driver/internals/hli/ports/port_l23/chimera/__init__.py
 xoa_driver/internals/hli/ports/port_l23/chimera/pe_custom_distribution.py
 xoa_driver/internals/hli/ports/port_l23/chimera/pe_distribution.py
@@ -194,6 +169,32 @@ xoa_driver/internals/hli/ports/port_l23/chimera/filter_definition/_utils.py
 xoa_driver/internals/hli/ports/port_l23/chimera/filter_definition/general.py
 xoa_driver/internals/hli/ports/port_l23/chimera/filter_definition/shadow.py
 xoa_driver/internals/hli/ports/port_l23/chimera/filter_definition/working.py
+xoa_driver/internals/hli/ports/port_l23/layer1/__init__.py
+xoa_driver/internals/hli/ports/port_l23/layer1/anlt.py
+xoa_driver/internals/hli/ports/port_l23/layer1/brr.py
+xoa_driver/internals/hli/ports/port_l23/layer1/eye_diagram.py
+xoa_driver/internals/hli/ports/port_l23/layer1/impair.py
+xoa_driver/internals/hli/ports/port_l23/layer1/laser_power.py
+xoa_driver/internals/hli/ports/port_l23/layer1/lower_power.py
+xoa_driver/internals/hli/ports/port_l23/layer1/medium.py
+xoa_driver/internals/hli/ports/port_l23/layer1/pcs_fec.py
+xoa_driver/internals/hli/ports/port_l23/layer1/pma.py
+xoa_driver/internals/hli/ports/port_l23/layer1/prbs.py
+xoa_driver/internals/hli/ports/port_l23/layer1/preamble.py
+xoa_driver/internals/hli/ports/port_l23/layer1/rs_fault.py
+xoa_driver/internals/hli/ports/port_l23/layer1/siv.py
+xoa_driver/internals/hli/ports/port_l23/sec/__init__.py
+xoa_driver/internals/hli/ports/port_l23/sec/macsec.py
+xoa_driver/internals/hli/ports/port_l23/tcvr/__init__.py
+xoa_driver/internals/hli/ports/port_l23/tcvr/cmis.py
+xoa_driver/internals/hli/ports/port_l23/tcvr/transceiver.py
+xoa_driver/internals/hli/ports/port_l23/trafficgen/__init__.py
+xoa_driver/internals/hli/ports/port_l23/trafficgen/port_capture.py
+xoa_driver/internals/hli/ports/port_l23/trafficgen/port_l23.py
+xoa_driver/internals/hli/ports/port_l23/trafficgen/port_l23_genuine.py
+xoa_driver/internals/hli/ports/port_l23/trafficgen/port_rx_stats.py
+xoa_driver/internals/hli/ports/port_l23/trafficgen/port_tx_stats.py
+xoa_driver/internals/hli/ports/port_l23/trafficgen/runt.py
 xoa_driver/internals/hli/ports/port_l47/__init__.py
 xoa_driver/internals/hli/ports/port_l47/counters.py
 xoa_driver/internals/hli/ports/port_l47/main.py

tdl_xoa_driver-1.6.0/xoa_driver/__init__.py

@@ -0,0 +1,2 @@
+__version__ = "1.6.0"
+__short_version__ = "1.6"

{tdl_xoa_driver-1.5.1 → tdl_xoa_driver-1.6.0}/xoa_driver/enums.py

@@ -177,14 +177,14 @@ from .internals.commands.enums import (
     ModuleModelName,
     FreyaAutonegMode,
     FreyaLinkTrainingMode,
-    FreyaTecAbility,
-    FreyaFECAbility,
-    FreyaPauseAbility,
-    FreyaTechAbilityHCDStatus,
+    AutoNegTecAbility,
+    AutoNegFECAbility,
+    AutoNegPauseAbility,
+    AutoNegTechAbilityHCDStatus,
     FreyaOutOfSyncPreset,
     Layer1Control,
     FreyaPCSVariant,
-    FreyaTecAbilityHCD,
+    AutoNegTecAbilityHCD,
     Layer1Opcode,
     FecCodewordBitErrorMaskMode,
     FreyaPresetResponse,
@@ -377,14 +377,14 @@ __all__ = (
     "ModuleModelName",
     "FreyaAutonegMode",
     "FreyaLinkTrainingMode",
-    "FreyaTecAbility",
-    "FreyaFECAbility",
-    "FreyaPauseAbility",
-    "FreyaTechAbilityHCDStatus",
+    "AutoNegTecAbility",
+    "AutoNegFECAbility",
+    "AutoNegPauseAbility",
+    "AutoNegTechAbilityHCDStatus",
     "FreyaOutOfSyncPreset",
     "Layer1Control",
     "FreyaPCSVariant",
-    "FreyaTecAbilityHCD",
+    "AutoNegTecAbilityHCD",
     "Layer1Opcode",
     "FecCodewordBitErrorMaskMode",
     "FreyaPresetResponse",

{tdl_xoa_driver-1.5.1 → tdl_xoa_driver-1.6.0}/xoa_driver/functions/anlt.py

@@ -1,13 +1,17 @@
 """The anlt high-level function module."""
-
 from __future__ import annotations
 from dataclasses import dataclass, field
-import typing as t
+from typing import (
+    TYPE_CHECKING,
+    Union,
+    Any,
+    Generator,
+    List,
+)
+if TYPE_CHECKING:
+    from xoa_driver.ports import Z800FreyaPort
 from xoa_driver import enums
 from xoa_driver.utils import apply
-from xoa_driver.internals.hli.ports.port_l23.family_l import FamilyL
-from xoa_driver.internals.hli.ports.port_l23.family_l1 import FamilyFreya
-from xoa_driver.ports import GenericL23Port
 from xoa_driver.lli import commands
 from xoa_driver.internals.core import interfaces as itf
 from xoa_driver.misc import Token
@@ -23,14 +27,9 @@ from .tools import (
 )
 import asyncio
 
-PcsPmaSupported = (FamilyL, FamilyFreya)
-AutoNegSupported = (FamilyL, FamilyFreya)
-LinkTrainingSupported = FamilyL
-
-
 @dataclass
 class DoAnlt:
-    port: GenericL23Port
+    port: "Z800FreyaPort"
     """port object"""
     should_do_an: bool
     """should the port do autoneg?"""
@@ -117,7 +116,7 @@ class DoAnlt:
 
         return _an_mode, _lt_mode, _timeout_mode
 
-    def __builder__(self) -> t.Generator[Token, None, None]:
+    def __builder__(self) -> Generator[Token, None, None]:
         """Defining commands sequence"""
         
         # # Set autoneg timeout
@@ -169,7 +168,7 @@ class DoAnlt:
 
 
 async def anlt_start(
-    port: GenericL23Port,
+    port: "Z800FreyaPort",
     should_do_an: bool,
     should_do_lt: bool,
     an_allow_loopback: bool,
@@ -180,12 +179,10 @@ async def anlt_start(
     should_enable_lt_timeout: bool,
 ) -> None:
     """
-    .. versionchanged:: 2.5
-
     Start ANLT on a port
 
     :param port: the port object
-    :type port: :class:`~xoa_driver.ports.GenericL23Port`
+    :type port: :class:`~xoa_driver.ports.Z800FreyaPort`
     :param should_do_an: should the port do autoneg?
     :type should_do_an: bool
     :param should_do_lt: should the port do link training?
@@ -218,14 +215,12 @@ async def anlt_start(
     await anlt.run()
 
 
-async def autoneg_status(port: GenericL23Port) -> dict[str, t.Any]:
+async def autoneg_status(port: "Z800FreyaPort") -> dict[str, Any]:
     """
-    .. versionchanged:: 2.5
-
     Get the auto-negotiation status
 
     :param port: the port object
-    :type port: :class:`~xoa_driver.ports.GenericL23Port`
+    :type port: :class:`~xoa_driver.ports.Z800FreyaPort`
     :return:
     :rtype: typing.Dict[str, typing.Any]
     """
@@ -240,7 +235,7 @@ async def autoneg_status(port: GenericL23Port) -> dict[str, t.Any]:
     return dictionize_autoneg_status(loopback, auto_neg_info, status)
 
 
-LinkTrainType = t.Union[
+LinkTrainType = Union[
     enums.LinkTrainCoeffs,
     enums.LinkTrainPresets,
     enums.LinkTrainEncoding,
@@ -249,7 +244,7 @@ LinkTrainType = t.Union[
 
 
 async def __lt_coeff(
-    port: GenericL23Port,
+    port: "Z800FreyaPort",
     serdes: int,
     arg: LinkTrainType,
     *,
@@ -268,7 +263,7 @@ async def __lt_coeff(
 
 
 async def lt_coeff_inc(
-    port: GenericL23Port,
+    port: "Z800FreyaPort",
     serdes: int,
     emphasis: enums.LinkTrainCoeffs
 ) -> enums.LinkTrainCmdResults:
@@ -276,7 +271,7 @@ async def lt_coeff_inc(
     Ask the remote port to increase coeff of the specified serdes.
 
     :param port: the port object
-    :type port: :class:`~xoa_driver.ports.GenericL23Port`
+    :type port: :class:`~xoa_driver.ports.Z800FreyaPort`
     :param serdes: the serdes index, starting from 0
     :type serdes: int
     :param emphasis: the emphasis to increase
@@ -288,7 +283,7 @@ async def lt_coeff_inc(
 
 
 async def lt_coeff_dec(
-    port: GenericL23Port,
+    port: "Z800FreyaPort",
     serdes: int,
     emphasis: enums.LinkTrainCoeffs
 ) -> enums.LinkTrainCmdResults:
@@ -296,7 +291,7 @@ async def lt_coeff_dec(
     Ask the remote port to decrease coeff of the specified serdes.
 
     :param port: the port object
-    :type port: :class:`~xoa_driver.ports.GenericL23Port`
+    :type port: :class:`~xoa_driver.ports.Z800FreyaPort`
     :param serdes: the serdes index, starting from 0
     :type serdes: int
     :param emphasis: the emphasis to decrease
@@ -308,7 +303,7 @@ async def lt_coeff_dec(
 
 
 async def lt_coeff_no_eq(
-    port: GenericL23Port,
+    port: "Z800FreyaPort",
     serdes: int,
     emphasis: enums.LinkTrainCoeffs
 ) -> enums.LinkTrainCmdResults:
@@ -317,7 +312,7 @@ async def lt_coeff_no_eq(
     Ask the remote port to set the coeff to NO_EQ on the specified serdes.
 
     :param port: the port object
-    :type port: :class:`~xoa_driver.ports.GenericL23Port`
+    :type port: :class:`~xoa_driver.ports.Z800FreyaPort`
     :param serdes: the serdes index, starting from 0
     :type serdes: int
     :param emphasis: the emphasis to set to NO_EQ
@@ -329,7 +324,7 @@ async def lt_coeff_no_eq(
 
 
 async def lt_preset(
-    port: GenericL23Port,
+    port: "Z800FreyaPort",
     serdes: int,
     preset: enums.LinkTrainPresets
 ) -> enums.LinkTrainCmdResults:
@@ -337,7 +332,7 @@ async def lt_preset(
     Ask the remote port to use the preset of the specified serdes.
 
     :param port: the port object
-    :type port: :class:`~xoa_driver.ports.GenericL23Port`
+    :type port: :class:`~xoa_driver.ports.Z800FreyaPort`
     :param serdes: the serdes index, starting from 0
     :type serdes: int
     :param preset: preset index to select for the serdes, 0,1,2,3,4,
@@ -349,7 +344,7 @@ async def lt_preset(
 
 
 async def lt_encoding(
-    port: GenericL23Port,
+    port: "Z800FreyaPort",
     serdes: int,
     encoding: enums.LinkTrainEncoding
 ) -> enums.LinkTrainCmdResults:
@@ -357,7 +352,7 @@ async def lt_encoding(
     Ask the remote port to use the encoding of the specified serdes.
 
     :param port: the port object
-    :type port: :class:`~xoa_driver.ports.GenericL23Port`
+    :type port: :class:`~xoa_driver.ports.Z800FreyaPort`
     :param serdes: the serdes index, starting from 0
     :type serdes: int
     :param encoding: link training encoding
@@ -368,12 +363,12 @@ async def lt_encoding(
     return await __lt_coeff(port, serdes, encoding, cmd=enums.LinkTrainCmd.CMD_ENCODING)
 
 
-async def lt_trained(port: GenericL23Port, serdes: int) -> enums.LinkTrainCmdResults:
+async def lt_trained(port: "Z800FreyaPort", serdes: int) -> enums.LinkTrainCmdResults:
     """
     Tell the remote port that the current serdes is trained.
 
     :param port: the port object
-    :type port: :class:`~xoa_driver.ports.GenericL23Port`
+    :type port: :class:`~xoa_driver.ports.Z800FreyaPort`
     :param serdes: the serdes index, starting from 0
     :type serdes: int
     :return:
@@ -387,14 +382,12 @@ async def lt_trained(port: GenericL23Port, serdes: int) -> enums.LinkTrainCmdRes
     )
 
 
-async def lt_status(port: GenericL23Port, serdes: int) -> dict[str, t.Any]:
+async def lt_status(port: "Z800FreyaPort", serdes: int) -> dict[str, Any]:
     """
-    .. versionchanged:: 2.5
-
     Show the link training status.
 
     :param port: the port object
-    :type port: :class:`~xoa_driver.ports.GenericL23Port`
+    :type port: :class:`~xoa_driver.ports.Z800FreyaPort`
     :param serdes: the serdes index, starting from 0
     :type serdes: int
     :return: LT status of the serdes
@@ -419,12 +412,12 @@ async def lt_status(port: GenericL23Port, serdes: int) -> dict[str, t.Any]:
     )
 
 
-async def txtap_get(port: GenericL23Port, serdes: int) -> dict[str, int]:
+async def txtap_get(port: "Z800FreyaPort", serdes: int) -> dict[str, int]:
     """
     Get the tap value of the local TX tap.
 
     :param port: the port object
-    :type port: :class:`~xoa_driver.ports.GenericL23Port`
+    :type port: :class:`~xoa_driver.ports.Z800FreyaPort`
     :param serdes: the serdes index, starting from 0
     :type serdes: int
     :return: tap values of the serdes
@@ -436,19 +429,19 @@ async def txtap_get(port: GenericL23Port, serdes: int) -> dict[str, int]:
 
 
 async def txtap_set(
-    port: GenericL23Port,
+    port: "Z800FreyaPort",
     serdes: int,
     pre3: int,
     pre2: int,
     pre: int,
     main: int,
-    post1: int,
+    post: int,
 ) -> None:
     """
     Set the tap value of the local TX tap.
 
     :param port: the port object
-    :type port: :class:`~xoa_driver.ports.GenericL23Port`
+    :type port: :class:`~xoa_driver.ports.Z800FreyaPort`
     :param serdes: the serdes index, starting from 0
     :type serdes: int
     :param pre3: pre3 value
@@ -459,29 +452,22 @@ async def txtap_set(
     :type pre: int
     :param main: main value
     :type main: int
-    :param post1: post1 value
-    :type post1: int
+    :param post: post value
+    :type post: int
     :return:
     :rtype: None
     """
     conn, mid, pid = get_ctx(port)
     cmd_ = commands.PP_PHYTXEQ(conn, mid, pid, serdes)
-    await cmd_.set(
-        pre=pre,
-        main=main,
-        post=post1,
-        pre2=pre2,
-        pre3_post2=pre3,
-        post3=0,
-    )
+    await cmd_.set(tap_values=[pre, main, post, pre2, pre3])
 
 
-async def anlt_link_recovery(port: GenericL23Port, restart_link_down: bool, restart_lt_failure: bool) -> None:
+async def anlt_link_recovery(port: "Z800FreyaPort", restart_link_down: bool, restart_lt_failure: bool) -> None:
     """
     This command manages the auto-restart features.
 
     :param port: the port object
-    :type port: :class:`~xoa_driver.ports.GenericL23Port`
+    :type port: :class:`~xoa_driver.ports.Z800FreyaPort`
     :param restart_link_down: enable AN+LT auto-restart when a link down condition is detected. A "link down" state signifies the loss of a valid input signal, which can occur due to events such as cable unplugging and re-plugging, TX disable, or link flap on the link partner's end. The auto-restart process will continue until the link is re-established. Please note that this setting is only effective when AN and/or LT are enabled.
     :type restart_link_down: bool
     :param restart_lt_failure: if LT is enabled and experiences a failure on either side, the port will initiate the AN+LT restart process repeatedly until LT succeeds. This functionality is only applicable when LT is enabled.
@@ -501,14 +487,12 @@ async def anlt_link_recovery(port: GenericL23Port, restart_link_down: bool, rest
     await cmd_.set(values=[param])
 
 
-async def anlt_status(port: GenericL23Port) -> dict[str, t.Any]:
+async def anlt_status(port: "Z800FreyaPort") -> dict[str, Any]:
     """
-    .. versionchanged:: 2.5
-
     Get the overview of ANLT status
 
     :param port: the port object
-    :type port: :class:`~xoa_driver.ports.GenericL23Port`
+    :type port: :class:`~xoa_driver.ports.Z800FreyaPort`
     :return: AN/LT status of the port
     :rtype: typing.Dict[str, typing.Any]
     """
@@ -529,12 +513,12 @@ async def anlt_status(port: GenericL23Port) -> dict[str, t.Any]:
     return dictionize_anlt_status(_link_recovery, _anlt_op, _linktrain_cfg, _capabilities, _allow_loopback)
 
 
-async def anlt_log(port: GenericL23Port) -> str:
+async def anlt_log(port: "Z800FreyaPort") -> str:
     """
     Get the anlt log messages
 
     :param port: the port object
-    :type port: :class:`~xoa_driver.ports.GenericL23Port`
+    :type port: :class:`~xoa_driver.ports.Z800FreyaPort`
     :return: AN/LT protocol log traces of the port
     :rtype: str
     """
@@ -543,14 +527,12 @@ async def anlt_log(port: GenericL23Port) -> str:
     return log.log_string
 
 
-async def anlt_stop(port: GenericL23Port) -> None:
+async def anlt_stop(port: "Z800FreyaPort") -> None:
     """
-    .. versionchanged:: 2.5
-
     Stop AN & LT
 
     :param port: the port object
-    :type port: :class:`~xoa_driver.ports.GenericL23Port`
+    :type port: :class:`~xoa_driver.ports.Z800FreyaPort`
     """
     conn, mid, pid = get_ctx(port)
 
@@ -560,12 +542,12 @@ async def anlt_stop(port: GenericL23Port) -> None:
         )
 
 
-async def txtap_autotune(port: GenericL23Port, serdes: int) -> None:
+async def txtap_autotune(port: "Z800FreyaPort", serdes: int) -> None:
     """
     Auto tune the tap value of the local TX tap.
 
     :param port: the port object
-    :type port: :class:`~xoa_driver.ports.GenericL23Port`
+    :type port: :class:`~xoa_driver.ports.Z800FreyaPort`
     :param serdes: the serdes index, starting from 0
     :type serdes: int
     :return:
@@ -577,12 +559,12 @@ async def txtap_autotune(port: GenericL23Port, serdes: int) -> None:
     await phy_autotune.set(on_off=enums.OnOff.ON)
 
 
-async def lt_im_status(port: GenericL23Port) -> dict[str, t.Any]:
+async def lt_im_status(port: "Z800FreyaPort") -> dict[str, Any]:
     """
     Get LT initial modulation config
 
     :param port: the port object
-    :type port: :class:`~xoa_driver.ports.GenericL23Port`
+    :type port: :class:`~xoa_driver.ports.Z800FreyaPort`
     :return: LT initial modulation configuration of the port
     :rtype: typing.Dict[str, typing.Any]
     """
@@ -599,12 +581,12 @@ async def lt_im_status(port: GenericL23Port) -> dict[str, t.Any]:
     return dictionize_lt_im_status(capabilities, initial_mods)
 
 
-async def lt_algorithm_status(port: GenericL23Port) -> dict[str, t.Any]:
+async def lt_algorithm_status(port: "Z800FreyaPort") -> dict[str, Any]:
     """
     Get LT initial modulation config
 
     :param port: the port object
-    :type port: :class:`~xoa_driver.ports.GenericL23Port`
+    :type port: :class:`~xoa_driver.ports.Z800FreyaPort`
     :return: LT initial modulation configuration of the port
     :rtype: typing.Dict[str, typing.Any]
     """
@@ -621,12 +603,12 @@ async def lt_algorithm_status(port: GenericL23Port) -> dict[str, t.Any]:
     return dictionize_lt_algorithm_status(capabilities, algorithms)
 
 
-async def anlt_strict(port: GenericL23Port, enable: bool) -> None:
+async def anlt_strict(port: "Z800FreyaPort", enable: bool) -> None:
     """
     Should ANLT strict mode be enabled
 
     :param port: the port object
-    :type port: :class:`~xoa_driver.ports.GenericL23Port`
+    :type port: :class:`~xoa_driver.ports.Z800FreyaPort`
     :param enable: should ANLT strict mode be enabled
     :type enable: bool
     :return:
@@ -645,14 +627,14 @@ async def anlt_strict(port: GenericL23Port, enable: bool) -> None:
         ).set(values=[param])
 
 
-async def anlt_log_control(port: GenericL23Port, types: t.List[enums.AnLtLogControl]) -> None:
+async def anlt_log_control(port: "Z800FreyaPort", types: List[enums.AnLtLogControl]) -> None:
     """
     Control what should be logged for ANLT by xenaserver
 
     :param port: the port object
-    :type port: :class:`~xoa_driver.ports.GenericL23Port`
+    :type port: :class:`~xoa_driver.ports.Z800FreyaPort`
     :param types: control what should be logged for ANLT by xenaserver
-    :type types: t.List[enums.AnLtLogControl]
+    :type types: List[enums.AnLtLogControl]
     :return:
     :rtype:  None
     """
@@ -671,12 +653,12 @@ async def anlt_log_control(port: GenericL23Port, types: t.List[enums.AnLtLogCont
             enums.Layer1ConfigType.ANLT_LOG_CONTROL
         ).set(values=[param])
 
-async def anlt_log_control_get(port: GenericL23Port) -> dict[str, bool]:
+async def anlt_log_control_get(port: "Z800FreyaPort") -> dict[str, bool]:
     """
     Get ANLT log control config
 
     :param port: the port object
-    :type port: :class:`~xoa_driver.ports.GenericL23Port`
+    :type port: :class:`~xoa_driver.ports.Z800FreyaPort`
     :return: dict of log control status
     :rtype:  dict[str, bool]
     """

{tdl_xoa_driver-1.5.1 → tdl_xoa_driver-1.6.0}/xoa_driver/functions/cli/testbed_config.py

@@ -136,7 +136,7 @@ async def load_testbed_config(tester: testers.L23Tester, path: str, mode: str =
 
             # Free the module before applying configuration
             module = tester.modules.obtain(int(module_index))
-            await release_module(module=module, should_release_ports=True)
+            await release_modules([module], should_release_ports=True)
             # Reserve the module before applying configuration
             xm.reserve_module(module_index)
 

{tdl_xoa_driver-1.5.1 → tdl_xoa_driver-1.6.0}/xoa_driver/functions/cmis/_replies.py

@@ -142,14 +142,14 @@ class CMD0041hFirmwareManagementFeaturesReply(CMDBaseReply):
         Value Maximum Number of Bytes (EPL)
 
         * 0:    8 bytes (no extension of general length limit)
-        * i:    8 * (1+i) bytes (0 ≤ i ≤ 255)
-        * 255:  8 * 256 = 2048 bytes
+        * i:    8 x (1+i) bytes (0 <= i <= 255)
+        * 255:  8 x 256 = 2048 bytes
 
         Value  Maximum Number of Bytes (LPL)
         
         * 0:     8 bytes (no extension of general length limit)
-        * i:     8 * (1+i) bytes (0 ≤ i ≤ 15)
-        * i:     8 * 16 = 128 bytes (16 ≤ i ≤ 256)
+        * i:     8 x (1+i) bytes (0 <= i <= 15)
+        * i:     8 x 16 = 128 bytes (16 <= i <= 256)
 
         """
         self.write_mechanism: int = reply['write_mechanism']