spirack 0.2.10__tar.gz → 0.2.14__tar.gz

{spirack-0.2.10 → spirack-0.2.14}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.1
 Name: spirack
-Version: 0.2.10
+Version: 0.2.14
 Summary: Drivers for the QuTech SPI-rack
 Home-page: https://github.com/mtiggelman/SPI-rack
 Author: Marijn Tiggelman

{spirack-0.2.10 → spirack-0.2.14}/spirack/D4a_module.py

@@ -42,7 +42,7 @@ class D4a_module(object):
             module (int): module number set on the hardware
         """
         self.file = os.path.abspath(__file__)
-        print("D4a initialized.\nFile path is", self.file,"\n")      # debug only
+        print("D4a initialized.\nPath to D4a file is", self.file,"\n")      # debug only
         
         self.module = module
         self.spi_rack = spi_rack
@@ -89,6 +89,7 @@ class D4a_module(object):
             self.config_led(adc, 0)
         
         self.SR_OEb         = 0     # initializing the SR output_enable\ to 'enabled'
+        self.set_output_enable(self.SR_OEb)
 
     def continuous_conversion_trig_and_read(self, adc):
         """Perform a conversion
@@ -165,11 +166,18 @@ class D4a_module(object):
         """
         running = True
         while running:
-            status = self._read_data(adc, self.reg.STATUS_REG, 1)
+            status = self._read_RDYb_bit(adc)
             # if new data available:
-            if (status[0]&0x80) == 0:
+            if status == 0:
                 running = False
         return
+        
+    def _read_RDYb_bit(self, adc):
+        """reads out the RDYb bit from the specified ADC
+        """
+        status = self._read_data(adc, self.reg.STATUS_REG, 1)
+        RDYb = status[0]&0x80
+        return RDYb
 
     def force_immediate_read_out(self, adc): 
         """Reads the ADC data output register, regardless of its RDY/complete status
@@ -970,13 +978,13 @@ class D4a_module(object):
         if user_sync_value not in range(0, 2):
             raise ValueError('The sync_value given {} is not a legal value. Possible values are in {}'.format(user_sync_value, range(0, 2)))
 
-        print("sync_signal from user is ",bytearray([user_sync_value]))
+        print("set_sync_signal:\n    sync_signal from user is ",bytearray([user_sync_value]))
         
         # The output byte holds two bits:
         # The 'SR_OEb' - the existing SR_OEb kept in memory
         # The trig/sync - the new user_sync_value given here explicitly by the user
         output_byte = self.SR_OEb<<7|user_sync_value
-        print("The output_byte from BIC to module is",output_byte)
+        print("    The output_byte from BIC to module is",output_byte)
         
         # Write to SPI addr 5 - the GPIO output direction
         self.spi_rack.write_data(self.module, 5, 0, BICPINS_SPEED, bytearray([output_byte]))

{spirack-0.2.10 → spirack-0.2.14}/spirack/D5a_module.py

@@ -44,8 +44,8 @@ class D5a_module(object):
 
     # DAC software span constants
     range_4V_uni = 0
-    range_4V_bi = 2
     range_8V_uni = 1
+    range_4V_bi = 2
     range_8V_bi = 3
     range_2V_bi = 4
 
@@ -67,8 +67,8 @@ class D5a_module(object):
         self.spi_rack = spi_rack
         self.module = module
         self._num_dacs = num_dacs
-        self.span = [np.nan]*self._num_dacs
-        self.voltages = [np.nan]*self._num_dacs
+        self.span = [np.NaN]*self._num_dacs
+        self.voltages = [np.NaN]*self._num_dacs
 
         for i in range(self._num_dacs):
             self.get_settings(i)
@@ -126,6 +126,11 @@ class D5a_module(object):
         DAC_ic = DAC//2
         # send data via controller
         self.spi_rack.write_data(self.module, DAC_ic, LTC2758_MODE, LTC2758_SPEED, data)
+        
+        # The change of span will also cause a change in the actual output voltage
+        # Make update to the voltages array to reflect that change
+        new_settings = self.get_settings(DAC)       # read from actual hardware
+        self.span[DAC] = new_settings[0]            # update to the cached variables
 
     def change_span(self, DAC, span):
         """Changes the software span of selected DAC without update
@@ -249,6 +254,34 @@ class D5a_module(object):
         # send data via controller
         self.spi_rack.write_data(self.module, DAC_ic, LTC2758_MODE, LTC2758_SPEED, data)
 
+    def update_multiple_this_is_a_test(self, DAC1, DAC2):
+        """Updates the output of the DAC to the written value
+
+        Updates the output of the DAC when called. Neccessary after using
+        change_value or change_span when wanting to update the DAC.
+
+        Args:
+            DAC (int: 0-15): DAC inside the module of which to update
+        """
+        if DAC not in range(self._num_dacs):
+            raise ValueError('D5a module {} [update]: DAC {} does not exist.'.format(self.module, DAC))
+
+        # Determine which DAC in IC by checking even/uneven
+        address = (DAC%2)<<1
+
+        # Update DAC to given span/value
+        command = 0b0100
+        b1 = (command<<4) | address
+        b2 = 0
+        b3 = 0
+        b4 = 0
+        data = bytearray([b1, b2, b3, b4])
+
+        # Determine in which IC the DAC is, for SPI chip select
+        DAC_ic = DAC//2
+        # send data via controller
+        self.spi_rack.write_data(self.module, DAC_ic, LTC2758_MODE, LTC2758_SPEED, data)
+
     def set_voltage(self, DAC, voltage):
         """Sets the DAC output voltage and updates the DAC output
 
@@ -313,7 +346,7 @@ class D5a_module(object):
     def get_stepsize(self, DAC):
         """Returns the smallest voltage step for a given DAC
 
-        Calculates and returns the smallest voltage step of the DAC for the
+        Calculates and returns the smalles voltage step of the DAC for the
         set span. Voltage steps smaller than this will not change the DAC value.
         Recommended to only step the DAC in multiples of this value, as otherwise
         steps might not behave as expected.
@@ -327,15 +360,13 @@ class D5a_module(object):
             raise ValueError('D5a module {} [get_stepsize]: DAC {} does not exist.'.format(self.module, DAC))
 
         if self.span[DAC] == D5a_module.range_4V_uni:
-            return 4.0 / (2 ** 18)
-        elif self.span[DAC] == D5a_module.range_4V_bi or self.span[DAC] == D5a_module.range_8V_uni:
-            return 8.0 / (2 ** 18)
-        elif self.span[DAC] == D5a_module.range_8V_bi:
-            return 16.0 / (2 ** 18)
-        elif self.span[DAC] == D5a_module.range_2V_bi:
-            return 4.0 / (2 ** 18)
-        else:
-            raise ValueError(f"Span for DAC {DAC} not set to valid value. Span currently set to {self.span[DAC]}.")
+            return 4.0/(2**18)
+        if self.span[DAC] == (D5a_module.range_4V_bi or D5a_module.range_8V_uni):
+            return 8.0/(2**18)
+        if self.span[DAC] == D5a_module.range_8V_bi:
+            return 16.0/(2**18)
+        if self.span[DAC] == D5a_module.range_2V_bi:
+            return 4.0/(2**18)
 
     def get_settings(self, DAC):
         """Reads current DAC settings
@@ -357,14 +388,14 @@ class D5a_module(object):
         DAC_ic = DAC//2
 
         # Read code command
-        command = 0b1101
+        command = 0b1101                                       # 0xd
         data = bytearray([(command<<4) | address, 0, 0, 0])
 
         code_data = self.spi_rack.read_data(self.module, DAC_ic, LTC2758_MODE, LTC2758_RD_SPEED, data)
         code = (code_data[1]<<10) | (code_data[2]<<2) | (code_data[3]>>6)
 
         # Read span command
-        command = 0b1100
+        command = 0b1100                                       # 0xc
         data = bytearray([(command<<4) | address, 0, 0, 0])
 
         span_data = self.spi_rack.read_data(self.module, DAC_ic, LTC2758_MODE, LTC2758_RD_SPEED, data)
@@ -385,5 +416,5 @@ class D5a_module(object):
 
         self.voltages[DAC] = voltage
         self.span[DAC] = span
-
+        
         return [voltage, span]