spicebind 0.0.1__tar.gz
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- spicebind-0.0.1/.github/workflows/docs.yml +61 -0
- spicebind-0.0.1/.github/workflows/tests.yml +26 -0
- spicebind-0.0.1/.gitignore +212 -0
- spicebind-0.0.1/CMakeLists.txt +100 -0
- spicebind-0.0.1/LICENSE +28 -0
- spicebind-0.0.1/PKG-INFO +210 -0
- spicebind-0.0.1/README.md +177 -0
- spicebind-0.0.1/cpp/AnalogDigitalInterface.cpp +377 -0
- spicebind-0.0.1/cpp/AnalogDigitalInterface.h +115 -0
- spicebind-0.0.1/cpp/Config.cpp +120 -0
- spicebind-0.0.1/cpp/Config.h +59 -0
- spicebind-0.0.1/cpp/Debug.h +36 -0
- spicebind-0.0.1/cpp/NgSpiceCallbacks.cpp +111 -0
- spicebind-0.0.1/cpp/NgSpiceCallbacks.h +75 -0
- spicebind-0.0.1/cpp/TimeBarrier.h +161 -0
- spicebind-0.0.1/cpp/VpiCallbacks.cpp +281 -0
- spicebind-0.0.1/cpp/VpiCallbacks.h +71 -0
- spicebind-0.0.1/cpp/vpi_module.cpp +32 -0
- spicebind-0.0.1/cpp/vpi_user.h +1008 -0
- spicebind-0.0.1/docs/.gitignore +3 -0
- spicebind-0.0.1/docs/Doxyfile +2804 -0
- spicebind-0.0.1/docs/README.md +15 -0
- spicebind-0.0.1/docs/assets/__init__.py +0 -0
- spicebind-0.0.1/docs/assets/pygments_hdlspice.py +98 -0
- spicebind-0.0.1/docs/source/adc.md +22 -0
- spicebind-0.0.1/docs/source/api.rst +15 -0
- spicebind-0.0.1/docs/source/conf.py +377 -0
- spicebind-0.0.1/docs/source/index.md +86 -0
- spicebind-0.0.1/docs/source/spelling_wordlist.txt +11 -0
- spicebind-0.0.1/docs/source/spi_adc.md +14 -0
- spicebind-0.0.1/docs/source/timing_synchronization.rst +204 -0
- spicebind-0.0.1/examples/adc/Makefile +23 -0
- spicebind-0.0.1/examples/adc/README.md +19 -0
- spicebind-0.0.1/examples/adc/flash_adc8.cir +29 -0
- spicebind-0.0.1/examples/adc/flash_adc8.v +57 -0
- spicebind-0.0.1/examples/adc/flash_adc8_tb.v +55 -0
- spicebind-0.0.1/examples/adc/test_flash_adc8.py +236 -0
- spicebind-0.0.1/examples/spi_adc/README.md +15 -0
- spicebind-0.0.1/examples/spi_adc/spi_adc.cir +31 -0
- spicebind-0.0.1/examples/spi_adc/spi_adc.v +59 -0
- spicebind-0.0.1/examples/spi_adc/test_spi_adc.py +82 -0
- spicebind-0.0.1/noxfile.py +143 -0
- spicebind-0.0.1/pyproject.toml +61 -0
- spicebind-0.0.1/setup.py +10 -0
- spicebind-0.0.1/spicebind/__init__.py +51 -0
- spicebind-0.0.1/spicebind/cli.py +39 -0
- spicebind-0.0.1/tests/debug.cir +122 -0
- spicebind-0.0.1/tests/debug.v +22 -0
- spicebind-0.0.1/tests/error.cir +7 -0
- spicebind-0.0.1/tests/error.v +16 -0
- spicebind-0.0.1/tests/multi_instance.cir +18 -0
- spicebind-0.0.1/tests/multi_instance.v +20 -0
- spicebind-0.0.1/tests/rawread.py +81 -0
- spicebind-0.0.1/tests/tb.sv +41 -0
- spicebind-0.0.1/tests/test.cir +99 -0
- spicebind-0.0.1/tests/test_debug.py +94 -0
- spicebind-0.0.1/tests/test_error.py +42 -0
- spicebind-0.0.1/tests/test_multi_instance.py +72 -0
- spicebind-0.0.1/tests/test_tb.py +155 -0
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+
\.\#*
|
|
@@ -0,0 +1,100 @@
|
|
|
1
|
+
cmake_minimum_required(VERSION 3.15)
|
|
2
|
+
project(spicebind_vpi LANGUAGES CXX)
|
|
3
|
+
|
|
4
|
+
|
|
5
|
+
# Call CMake with: cmake -DNGSPICE_ROOT=/path/to/ngspice <src_dir>
|
|
6
|
+
set(NGSPICE_ROOT "" CACHE PATH
|
|
7
|
+
"Root of an NGSpice installation containing include/ and lib/."
|
|
8
|
+
)
|
|
9
|
+
|
|
10
|
+
if(NOT NGSPICE_ROOT)
|
|
11
|
+
# Try to locate the ngspice executable first
|
|
12
|
+
find_program(NGSPICE_EXE
|
|
13
|
+
NAMES ngspice # ngspice.exe on Windows is also matched
|
|
14
|
+
DOC "Full path to the ngspice executable"
|
|
15
|
+
)
|
|
16
|
+
|
|
17
|
+
if(NGSPICE_EXE)
|
|
18
|
+
# bin -> parent -> install root
|
|
19
|
+
get_filename_component(NGSPICE_BIN_DIR "${NGSPICE_EXE}" DIRECTORY)
|
|
20
|
+
get_filename_component(NGSPICE_ROOT "${NGSPICE_BIN_DIR}" DIRECTORY)
|
|
21
|
+
|
|
22
|
+
message(STATUS "Found ngspice executable: ${NGSPICE_EXE}")
|
|
23
|
+
message(STATUS "Inferred NGSPICE_ROOT: ${NGSPICE_ROOT}")
|
|
24
|
+
# else()
|
|
25
|
+
# message(FATAL_ERROR
|
|
26
|
+
# "Could not find 'ngspice' in your PATH and NGSPICE_ROOT was not "
|
|
27
|
+
# "given. Either install NGSpice or run CMake with "
|
|
28
|
+
# "-DNGSPICE_ROOT=/path/to/ngspice."
|
|
29
|
+
# )
|
|
30
|
+
endif()
|
|
31
|
+
endif()
|
|
32
|
+
|
|
33
|
+
|
|
34
|
+
# ---------------------------------------------------------------------------
|
|
35
|
+
# Source files and common configuration
|
|
36
|
+
# ---------------------------------------------------------------------------
|
|
37
|
+
set(SPICEBIND_SRC
|
|
38
|
+
cpp/Config.cpp
|
|
39
|
+
cpp/AnalogDigitalInterface.cpp
|
|
40
|
+
cpp/NgSpiceCallbacks.cpp
|
|
41
|
+
cpp/VpiCallbacks.cpp
|
|
42
|
+
cpp/vpi_module.cpp
|
|
43
|
+
)
|
|
44
|
+
|
|
45
|
+
set(_ngspice_possible_libdirs
|
|
46
|
+
"${NGSPICE_ROOT}/lib"
|
|
47
|
+
)
|
|
48
|
+
|
|
49
|
+
# Function to configure a VPI target with common settings
|
|
50
|
+
function(configure_vpi_target target_name)
|
|
51
|
+
set_target_properties(${target_name} PROPERTIES
|
|
52
|
+
CXX_STANDARD 17
|
|
53
|
+
POSITION_INDEPENDENT_CODE ON
|
|
54
|
+
PREFIX "" # stop CMake from adding "lib"
|
|
55
|
+
SUFFIX ".vpi" # final name: ${target_name}.vpi
|
|
56
|
+
LIBRARY_OUTPUT_DIRECTORY "${CMAKE_CURRENT_SOURCE_DIR}/spicebind"
|
|
57
|
+
)
|
|
58
|
+
|
|
59
|
+
target_include_directories(${target_name}
|
|
60
|
+
PRIVATE
|
|
61
|
+
${CMAKE_CURRENT_SOURCE_DIR}/cpp
|
|
62
|
+
${NGSPICE_ROOT}/include
|
|
63
|
+
)
|
|
64
|
+
|
|
65
|
+
target_link_directories(${target_name} PRIVATE ${_ngspice_possible_libdirs})
|
|
66
|
+
target_link_libraries(${target_name} PRIVATE ngspice)
|
|
67
|
+
endfunction()
|
|
68
|
+
|
|
69
|
+
# ---------------------------------------------------------------------------
|
|
70
|
+
# RELEASE variant
|
|
71
|
+
# ---------------------------------------------------------------------------
|
|
72
|
+
add_library(spicebind_vpi SHARED ${SPICEBIND_SRC})
|
|
73
|
+
configure_vpi_target(spicebind_vpi)
|
|
74
|
+
|
|
75
|
+
# ---------------------------------------------------------------------------
|
|
76
|
+
# DEBUG variant
|
|
77
|
+
# ---------------------------------------------------------------------------
|
|
78
|
+
add_library(spicebind_vpi_debug SHARED ${SPICEBIND_SRC})
|
|
79
|
+
configure_vpi_target(spicebind_vpi_debug)
|
|
80
|
+
|
|
81
|
+
# ► debug-specific compile flags ◄
|
|
82
|
+
target_compile_definitions(spicebind_vpi_debug PRIVATE DEBUG)
|
|
83
|
+
target_compile_options(spicebind_vpi_debug PRIVATE
|
|
84
|
+
$<$<CXX_COMPILER_ID:MSVC>:/Zi /Od>
|
|
85
|
+
$<$<NOT:$<CXX_COMPILER_ID:MSVC>>:-g -O0>
|
|
86
|
+
)
|
|
87
|
+
|
|
88
|
+
# convenience meta-target: cmake --build . --target debug
|
|
89
|
+
add_custom_target(debug ALL DEPENDS spicebind_vpi_debug)
|
|
90
|
+
|
|
91
|
+
# ---------------------------------------------------------------------------
|
|
92
|
+
# Installation for Python packaging
|
|
93
|
+
# ---------------------------------------------------------------------------
|
|
94
|
+
# Install VPI files to the Python package directory
|
|
95
|
+
install(FILES
|
|
96
|
+
$<TARGET_FILE:spicebind_vpi>
|
|
97
|
+
$<TARGET_FILE:spicebind_vpi_debug>
|
|
98
|
+
DESTINATION spicebind
|
|
99
|
+
COMPONENT python_package
|
|
100
|
+
)
|
spicebind-0.0.1/LICENSE
ADDED
|
@@ -0,0 +1,28 @@
|
|
|
1
|
+
BSD 3-Clause License
|
|
2
|
+
|
|
3
|
+
Copyright (c) 2025, Tomasz Hemperek
|
|
4
|
+
|
|
5
|
+
Redistribution and use in source and binary forms, with or without
|
|
6
|
+
modification, are permitted provided that the following conditions are met:
|
|
7
|
+
|
|
8
|
+
1. Redistributions of source code must retain the above copyright notice, this
|
|
9
|
+
list of conditions and the following disclaimer.
|
|
10
|
+
|
|
11
|
+
2. Redistributions in binary form must reproduce the above copyright notice,
|
|
12
|
+
this list of conditions and the following disclaimer in the documentation
|
|
13
|
+
and/or other materials provided with the distribution.
|
|
14
|
+
|
|
15
|
+
3. Neither the name of the copyright holder nor the names of its
|
|
16
|
+
contributors may be used to endorse or promote products derived from
|
|
17
|
+
this software without specific prior written permission.
|
|
18
|
+
|
|
19
|
+
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
20
|
+
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
21
|
+
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
22
|
+
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
23
|
+
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
24
|
+
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
25
|
+
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
26
|
+
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
27
|
+
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
28
|
+
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
spicebind-0.0.1/PKG-INFO
ADDED
|
@@ -0,0 +1,210 @@
|
|
|
1
|
+
Metadata-Version: 2.2
|
|
2
|
+
Name: spicebind
|
|
3
|
+
Version: 0.0.1
|
|
4
|
+
Summary: SpiceBind is a bridge that embeds the ngspice analog engine inside VPI-capable Verilog simulator for mixed-signal co-simulation.
|
|
5
|
+
Author: Tomasz Hemperek
|
|
6
|
+
Classifier: Development Status :: 3 - Alpha
|
|
7
|
+
Classifier: Intended Audience :: Developers
|
|
8
|
+
Classifier: Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)
|
|
9
|
+
Classifier: License :: OSI Approved :: MIT License
|
|
10
|
+
Classifier: Programming Language :: Python :: 3
|
|
11
|
+
Project-URL: Homepage, https://github.com/themperek/spicebind
|
|
12
|
+
Project-URL: Repository, https://github.com/themperek/spicebind
|
|
13
|
+
Requires-Python: >=3.8
|
|
14
|
+
Provides-Extra: dev
|
|
15
|
+
Requires-Dist: pytest; extra == "dev"
|
|
16
|
+
Requires-Dist: cocotb; extra == "dev"
|
|
17
|
+
Requires-Dist: numpy; extra == "dev"
|
|
18
|
+
Requires-Dist: matplotlib; extra == "dev"
|
|
19
|
+
Requires-Dist: cocotbext-spi; extra == "dev"
|
|
20
|
+
Requires-Dist: tomli; extra == "dev"
|
|
21
|
+
Provides-Extra: docs
|
|
22
|
+
Requires-Dist: sphinx>=8.2; extra == "docs"
|
|
23
|
+
Requires-Dist: breathe; extra == "docs"
|
|
24
|
+
Requires-Dist: sphinx-book-theme==1.1.3; extra == "docs"
|
|
25
|
+
Requires-Dist: sphinx-design>=0.6.1; extra == "docs"
|
|
26
|
+
Requires-Dist: sphinxcontrib-spelling>=5.3.0; extra == "docs"
|
|
27
|
+
Requires-Dist: pyenchant; extra == "docs"
|
|
28
|
+
Requires-Dist: sphinx-argparse-cli; extra == "docs"
|
|
29
|
+
Requires-Dist: sphinx-autobuild; extra == "docs"
|
|
30
|
+
Requires-Dist: sphinx-codeautolink; extra == "docs"
|
|
31
|
+
Requires-Dist: myst-parser; extra == "docs"
|
|
32
|
+
Description-Content-Type: text/markdown
|
|
33
|
+
|
|
34
|
+
# SpiceBind
|
|
35
|
+
|
|
36
|
+
[](https://github.com/themperek/spicebind/actions/workflows/tests.yml)
|
|
37
|
+
[](https://themperek.github.io/spicebind/)
|
|
38
|
+
|
|
39
|
+
SpiceBind is a lightweight bridge that enables co-simulation of **analog [ngspice](https://ngspice.sourceforge.io/)** circuits alongside **HDL simulators**. This tool allows design engineers to seamlessly integrate SPICE-accurate analog models into their existing digital verification flows.
|
|
40
|
+
|
|
41
|
+
⚠️ **Note**: This is an early release. We welcome feedback and contributions from the community.
|
|
42
|
+
|
|
43
|
+
### Key Benefits
|
|
44
|
+
|
|
45
|
+
- **Preserve Your Existing Flow**: Keep your RTL, testbenches, and waveform viewers unchanged
|
|
46
|
+
- **SPICE Accuracy**: Replace any module with a SPICE-based analog model for accurate analog simulation
|
|
47
|
+
- **Unified Timeline**: Analog and digital domains run in synchronization
|
|
48
|
+
- **Zero Vendor Lock-in**: Works with open-source tools like Icarus Verilog up to commercial simulators (to be tested)
|
|
49
|
+
- **Verification Ready**: Compatible with [cocotb](https://www.cocotb.org/) for Python-based verification
|
|
50
|
+
|
|
51
|
+
### Use Cases
|
|
52
|
+
|
|
53
|
+
Perfect for ASIC designers working on:
|
|
54
|
+
- Mixed-signal SoCs with analog IP blocks
|
|
55
|
+
- ADCs, DACs, and data converters
|
|
56
|
+
- PLLs, oscillators, and clock generation circuits
|
|
57
|
+
- Power management units
|
|
58
|
+
- Sensor interfaces and analog front-ends
|
|
59
|
+
|
|
60
|
+
## How It Works
|
|
61
|
+
|
|
62
|
+
SpiceBind enables you to write Verilog source code that includes an empty Verilog module and have it implemented by ngspice. Here's how the magic happens:
|
|
63
|
+
|
|
64
|
+
### The Process
|
|
65
|
+
|
|
66
|
+
1. **Create a Verilog Module Shell**: Write a Verilog module with the desired interface (inputs and outputs). The module body can be empty - it will be implemented in SPICE.
|
|
67
|
+
|
|
68
|
+
2. **Design the SPICE Implementation**: Create a corresponding SPICE netlist that implements the analog behavior of your module.
|
|
69
|
+
|
|
70
|
+
3. **Name-Based Connection**:
|
|
71
|
+
- **Verilog input ports** appear in the SPICE circuit as external voltage sources
|
|
72
|
+
- **Selected SPICE circuit nodes** drive the Verilog output ports
|
|
73
|
+
- Connections are established by **matching names** between Verilog ports and SPICE nodes
|
|
74
|
+
|
|
75
|
+
4. **VPI Integration**: A VPI (Verilog Procedural Interface) module links to ngspice's shared library, enabling communication between the digital simulator and the analog engine.
|
|
76
|
+
|
|
77
|
+
### Example Flow
|
|
78
|
+
|
|
79
|
+
```
|
|
80
|
+
Verilog: input real vin → SPICE: Vvin external_node 0 0 external
|
|
81
|
+
Verilog: output [3:0] code ← SPICE: circuit nodes code[3], code[2], code[1], code[0]
|
|
82
|
+
```
|
|
83
|
+
|
|
84
|
+
During simulation, the VPI module:
|
|
85
|
+
- Reads values from Verilog input ports and sets corresponding SPICE voltage sources
|
|
86
|
+
- Runs SPICE analysis for the current time step
|
|
87
|
+
- Reads SPICE node voltages and drives corresponding Verilog output ports
|
|
88
|
+
|
|
89
|
+
This creates a co-simulation where analog and digital domains remain synchronized on a unified timeline.
|
|
90
|
+
|
|
91
|
+
## Installation
|
|
92
|
+
|
|
93
|
+
### Prerequisites
|
|
94
|
+
|
|
95
|
+
- C++ compiler with C++17 support
|
|
96
|
+
- ngspice library and development headers
|
|
97
|
+
- Verilog VPI compatible simulator (tested with [Icarus Verilog](https://github.com/steveicarus/iverilog))
|
|
98
|
+
- Python 3.6+ (optional)
|
|
99
|
+
|
|
100
|
+
### Build Instructions
|
|
101
|
+
|
|
102
|
+
Clone the repository:
|
|
103
|
+
```bash
|
|
104
|
+
git clone https://github.com/themperek/spicebind.git
|
|
105
|
+
cd spicebind
|
|
106
|
+
```
|
|
107
|
+
|
|
108
|
+
**Option 1: Standalone VPI Module**
|
|
109
|
+
```bash
|
|
110
|
+
mkdir build && cd build
|
|
111
|
+
cmake ..
|
|
112
|
+
cmake --build .
|
|
113
|
+
cmake --build . --target debug # Optional: builds debug version
|
|
114
|
+
```
|
|
115
|
+
|
|
116
|
+
**Option 2: Python Integration**
|
|
117
|
+
```bash
|
|
118
|
+
pip install -e .
|
|
119
|
+
```
|
|
120
|
+
|
|
121
|
+
## Quick Start
|
|
122
|
+
|
|
123
|
+
### 1. Define Your Analog Block
|
|
124
|
+
|
|
125
|
+
Create a Verilog module with matching SPICE netlist with external voltage sources and ouptut ports.
|
|
126
|
+
|
|
127
|
+
**Verilog module** (e.g., `adc.v`):
|
|
128
|
+
```verilog
|
|
129
|
+
module adc(
|
|
130
|
+
input real vin,
|
|
131
|
+
output reg [3:0] code
|
|
132
|
+
);
|
|
133
|
+
endmodule
|
|
134
|
+
```
|
|
135
|
+
|
|
136
|
+
**SPICE netlist** (e.g., `adc.cir`):
|
|
137
|
+
```spice
|
|
138
|
+
* External voltage source for input
|
|
139
|
+
Vvin adc_in 0 0 external
|
|
140
|
+
|
|
141
|
+
* ADC subcircuit instantiation
|
|
142
|
+
Xadc adc_in code[3] code[2] code[1] code[0] sar_adc
|
|
143
|
+
|
|
144
|
+
* Simulation settings
|
|
145
|
+
.tran 1ns 1
|
|
146
|
+
```
|
|
147
|
+
|
|
148
|
+
### 2. Configure Environment
|
|
149
|
+
|
|
150
|
+
Set the required environment variables:
|
|
151
|
+
```bash
|
|
152
|
+
export SPICE_NETLIST=adc.cir
|
|
153
|
+
export HDL_INSTANCE=tb.adc
|
|
154
|
+
export VCC=3.3
|
|
155
|
+
```
|
|
156
|
+
|
|
157
|
+
### 3. Run Simulation
|
|
158
|
+
|
|
159
|
+
For Icarus Verilog:
|
|
160
|
+
```bash
|
|
161
|
+
vvp -M $(spicebind-vpi-path) -m spicebind_vpi tb.vvp
|
|
162
|
+
```
|
|
163
|
+
|
|
164
|
+
See the `examples/` directory for complete working examples.
|
|
165
|
+
|
|
166
|
+
### Multiple Instance Support
|
|
167
|
+
|
|
168
|
+
For designs with multiple analog blocks, configure each instance in your SPICE netlist with full hierarchical paths:
|
|
169
|
+
|
|
170
|
+
**SPICE netlist**:
|
|
171
|
+
```spice
|
|
172
|
+
* First ADC instance
|
|
173
|
+
Vtb.adc.vin vin 0 0 external
|
|
174
|
+
Xadc vin tb.adc.code[3] tb.adc.code[2] tb.adc.code[1] tb.adc.code[0] sar_adc
|
|
175
|
+
|
|
176
|
+
* Inverter instance
|
|
177
|
+
Vtb.inv.A inv_a 0 0 external
|
|
178
|
+
Xinv inv_a tb.inv.Y inv
|
|
179
|
+
|
|
180
|
+
.tran 1ns 1
|
|
181
|
+
```
|
|
182
|
+
|
|
183
|
+
**Environment configuration**:
|
|
184
|
+
```bash
|
|
185
|
+
export HDL_INSTANCE=tb.adc,tb.inv
|
|
186
|
+
```
|
|
187
|
+
|
|
188
|
+
### Configuration Options
|
|
189
|
+
|
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190
|
+
- `SPICE_NETLIST`: Path to your SPICE netlist file
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|
191
|
+
- `HDL_INSTANCE`: Comma-separated list of HDL instance paths
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|
192
|
+
- `VCC`: Supply voltage for analog simulation
|
|
193
|
+
- Additional options available in the documentation
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194
|
+
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|
195
|
+
## Documentation
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|
+
|
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197
|
+
For detailed documentation, examples, and API reference, visit: [https://themperek.github.io/spicebind/](https://themperek.github.io/spicebind/)
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198
|
+
|
|
199
|
+
## Contributing
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|
200
|
+
|
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201
|
+
We welcome contributions! Please see our contributing guidelines and feel free to:
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202
|
+
- Report bugs and request features via GitHub Issues
|
|
203
|
+
- Submit pull requests for improvements
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|
204
|
+
- Share your use cases and examples
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|
205
|
+
|
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206
|
+
## Roadmap
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|
+
|
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+
- [ ] Enhanced testing and validation
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209
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+
- [ ] Bidirectional bus support
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210
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+
- [ ] Automatic SPICE wrapper generation
|