sinabs 2.0.3.dev11__tar.gz → 2.0.4.dev32__tar.gz

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (288) hide show
  1. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/.github/workflows/ci-pipeline.yml +4 -4
  2. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/ChangeLog +12 -0
  3. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/PKG-INFO +1 -1
  4. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/faqs/available_network_arch.md +6 -6
  5. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/faqs/save_hardware_config_as_binary.md +1 -1
  6. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/faqs/tips_for_training.md +1 -1
  7. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/index.rst +1 -1
  8. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/notebooks/nmnist_quick_start.ipynb +8 -8
  9. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/overview.md +21 -20
  10. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/the_basics.md +10 -11
  11. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/visualizer.md +1 -2
  12. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/examples/mnist/dynapcnn_network.py +5 -7
  13. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/requirements.txt +1 -1
  14. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/sinabs/backend/dynapcnn/chip_factory.py +0 -9
  15. sinabs-2.0.4.dev32/sinabs/backend/dynapcnn/chips/__init__.py +3 -0
  16. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/sinabs/backend/dynapcnn/chips/dynapcnn.py +39 -61
  17. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/sinabs/backend/dynapcnn/chips/speck2e.py +1 -6
  18. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/sinabs/backend/dynapcnn/chips/speck2f.py +1 -5
  19. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/sinabs/backend/dynapcnn/config_builder.py +1 -2
  20. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/sinabs/backend/dynapcnn/dynapcnn_network.py +6 -6
  21. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/sinabs/backend/dynapcnn/io.py +20 -59
  22. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/sinabs/backend/dynapcnn/mapping.py +0 -36
  23. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/sinabs.egg-info/PKG-INFO +1 -1
  24. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/sinabs.egg-info/SOURCES.txt +0 -5
  25. sinabs-2.0.4.dev32/sinabs.egg-info/pbr.json +1 -0
  26. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/sinabs.egg-info/requires.txt +1 -1
  27. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/tests/requirements.txt +1 -0
  28. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/tests/test_dynapcnn/hw_utils.py +0 -5
  29. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/tests/test_dynapcnn/test_auto_mapping.py +0 -2
  30. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/tests/test_dynapcnn/test_config_making.py +0 -2
  31. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/tests/test_dynapcnn/test_device_movement.py +11 -4
  32. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/tests/test_dynapcnn/test_device_name_mapping.py +3 -3
  33. sinabs-2.0.4.dev32/tests/test_dynapcnn/test_discover_device.py +39 -0
  34. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/tests/test_dynapcnn/test_large_net.py +18 -10
  35. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/tests/test_dynapcnn/test_monitoring.py +8 -8
  36. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/tests/test_dynapcnn/test_neuron_leak.py +0 -2
  37. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/tests/test_dynapcnn/test_single_neuron_hardware.py +6 -1
  38. sinabs-2.0.4.dev32/tests/test_dynapcnn/test_speck2e.py +23 -0
  39. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/tests/test_dynapcnn/test_visualizer.py +5 -1
  40. sinabs-2.0.3.dev11/sinabs/backend/dynapcnn/chips/__init__.py +0 -7
  41. sinabs-2.0.3.dev11/sinabs/backend/dynapcnn/chips/speck2.py +0 -26
  42. sinabs-2.0.3.dev11/sinabs/backend/dynapcnn/chips/speck2b.py +0 -26
  43. sinabs-2.0.3.dev11/sinabs/backend/dynapcnn/chips/speck2cmini.py +0 -65
  44. sinabs-2.0.3.dev11/sinabs/backend/dynapcnn/chips/speck2dmini.py +0 -24
  45. sinabs-2.0.3.dev11/sinabs.egg-info/pbr.json +0 -1
  46. sinabs-2.0.3.dev11/tests/test_dynapcnn/test_discover_device.py +0 -24
  47. sinabs-2.0.3.dev11/tests/test_dynapcnn/test_speck2e.py +0 -47
  48. sinabs-2.0.3.dev11/tests/test_dynapcnn/test_speckmini_config_making.py +0 -101
  49. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/.coveragerc +0 -0
  50. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/.pre-commit-config.yaml +0 -0
  51. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/.readthedocs.yaml +0 -0
  52. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/AUTHORS +0 -0
  53. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/CITATION.cff +0 -0
  54. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/LICENSE +0 -0
  55. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/Pipfile +0 -0
  56. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/Pipfile.lock +0 -0
  57. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/README.md +0 -0
  58. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/codecov.yml +0 -0
  59. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/Makefile +0 -0
  60. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/Overview/dataflow_layers.png +0 -0
  61. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/Overview/event_preprocessing_pipeline.png +0 -0
  62. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/Overview/memory_constraints.png +0 -0
  63. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/Overview/sinabs-dynapcnn-role.png +0 -0
  64. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/Overview/speck_dynapcnn.png +0 -0
  65. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/Overview/speck_top_level.png +0 -0
  66. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/devkits_images/dynapcnn_devkit.png +0 -0
  67. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/devkits_images/speck_devkit.png +0 -0
  68. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/devkits_images/speck_module.png +0 -0
  69. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/devkits_images/speck_module_devkit.png +0 -0
  70. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/nmnist_quick_start/dvs_input_flow.png +0 -0
  71. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/nmnist_quick_start/dynapcnn_visualizer.png +0 -0
  72. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/nmnist_quick_start/spike_input_flow.png +0 -0
  73. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/power_monitoring/dynamic_power_samna_graph.png +0 -0
  74. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/power_monitoring/idle_power_samna_graph.png +0 -0
  75. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/power_monitoring/power_plot.png +0 -0
  76. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/sinabs-logo-lowercase-whitebg.png +0 -0
  77. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/sinabs-logo-lowercase.png +0 -0
  78. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/tips_for_training/exceeding_bandwidth.png +0 -0
  79. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/using_readout_layer/handcraft_weights.png +0 -0
  80. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/using_readout_layer/neuron_id_mismatch.png +0 -0
  81. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/using_readout_layer/readout_layer.png +0 -0
  82. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/using_readout_layer/samna_graph.png +0 -0
  83. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/visualize_speck_dvs/samna_graph.png +0 -0
  84. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/visualize_spike_count/samna_graph.png +0 -0
  85. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_static/visualize_spike_count/spike_count.png +0 -0
  86. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_templates/class_activation.rst +0 -0
  87. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/_templates/class_layer.rst +0 -0
  88. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/about/about.rst +0 -0
  89. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/about/contributing.md +0 -0
  90. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/about/differences.md +0 -0
  91. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/about/info.md +0 -0
  92. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/about/release_notes.md +0 -0
  93. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/api/activation.rst +0 -0
  94. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/api/api.rst +0 -0
  95. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/api/from_torch.rst +0 -0
  96. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/api/hooks.rst +0 -0
  97. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/api/layers.rst +0 -0
  98. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/api/network.rst +0 -0
  99. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/api/nir.rst +0 -0
  100. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/api/synopcounter.rst +0 -0
  101. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/api/utils.rst +0 -0
  102. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/conf.py +0 -0
  103. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/contact.md +0 -0
  104. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/gallery/README.rst +0 -0
  105. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/gallery/layers/README.rst +0 -0
  106. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/gallery/layers/plot_alif.py +0 -0
  107. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/gallery/layers/plot_exp_leaky.py +0 -0
  108. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/gallery/layers/plot_iaf.py +0 -0
  109. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/gallery/layers/plot_lif.py +0 -0
  110. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/gallery/layers/utils.py +0 -0
  111. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/gallery/spike_fns/README.rst +0 -0
  112. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/gallery/spike_fns/plot_maxspike.py +0 -0
  113. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/gallery/spike_fns/plot_multispike.py +0 -0
  114. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/gallery/spike_fns/plot_singlespike.py +0 -0
  115. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/gallery/surrogate_grad_fns/README.rst +0 -0
  116. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/gallery/surrogate_grad_fns/plot_gaussian.py +0 -0
  117. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/gallery/surrogate_grad_fns/plot_heaviside.py +0 -0
  118. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/gallery/surrogate_grad_fns/plot_multigaussian.py +0 -0
  119. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/gallery/surrogate_grad_fns/plot_periodicexponential.py +0 -0
  120. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/gallery/surrogate_grad_fns/plot_singleexponential.py +0 -0
  121. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/getting_started/fundamentals.rst +0 -0
  122. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/getting_started/getting_started.rst +0 -0
  123. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/getting_started/iaf_neuron_model.ipynb +0 -0
  124. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/getting_started/install.rst +0 -0
  125. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/getting_started/python_pyenv_pipenv.rst +0 -0
  126. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/getting_started/quickstart.ipynb +0 -0
  127. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/how_tos/activations.ipynb +0 -0
  128. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/how_tos/custom_hooks.ipynb +0 -0
  129. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/how_tos/how_tos.rst +0 -0
  130. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/how_tos/synops_loss_ann.ipynb +0 -0
  131. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/how_tos/synops_loss_snn.ipynb +0 -0
  132. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/index.md +0 -0
  133. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/make.bat +0 -0
  134. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/plugins/plugins.rst +0 -0
  135. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/requirements.txt +0 -0
  136. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/advanced_concepts.rst +0 -0
  137. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/api/dynapcnn/chip_factory.rst +0 -0
  138. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/api/dynapcnn/config_builder.rst +0 -0
  139. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/api/dynapcnn/crop2d.rst +0 -0
  140. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/api/dynapcnn/discretize.rst +0 -0
  141. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/api/dynapcnn/dvs_layer.rst +0 -0
  142. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/api/dynapcnn/dynapcnn.rst +0 -0
  143. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/api/dynapcnn/dynapcnn_layer.rst +0 -0
  144. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/api/dynapcnn/dynapcnn_network.rst +0 -0
  145. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/api/dynapcnn/dynapcnn_visualizer.rst +0 -0
  146. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/api/dynapcnn/exceptions.rst +0 -0
  147. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/api/dynapcnn/flipdims.rst +0 -0
  148. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/api/dynapcnn/io.rst +0 -0
  149. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/api/dynapcnn/mapping.rst +0 -0
  150. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/api/dynapcnn/specksim.rst +0 -0
  151. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/api/dynapcnn/utils.rst +0 -0
  152. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/dangers.md +0 -0
  153. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/faqs/add_new_device.md +0 -0
  154. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/faqs/available_algorithmic_operation.md +0 -0
  155. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/faqs/chip_errata.md +0 -0
  156. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/faqs/device_management.md +0 -0
  157. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/faqs/index.rst +0 -0
  158. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/faqs/output_monitoring.md +0 -0
  159. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/notebooks/leak_neuron.ipynb +0 -0
  160. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/notebooks/play_with_speck_dvs.ipynb +0 -0
  161. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/notebooks/power_monitoring.ipynb +0 -0
  162. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/notebooks/using_readout_layer.ipynb +0 -0
  163. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/notebooks/visualize_speck_dvs_input.ipynb +0 -0
  164. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/notebooks/visualize_spike_count.ipynb +0 -0
  165. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/specksim.md +0 -0
  166. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/speck/tutorials.rst +0 -0
  167. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/tutorials/LeNet_5_EngChinese.ipynb +0 -0
  168. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/tutorials/bptt.ipynb +0 -0
  169. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/tutorials/nir_to_speck.ipynb +0 -0
  170. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/tutorials/nmnist.ipynb +0 -0
  171. {sinabs-2.0.3.dev11 → sinabs-2.0.4.dev32}/docs/tutorials/scnn_mnist.nir +0 -0
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@@ -16,7 +16,7 @@ jobs:
16
16
  fail-fast: false
17
17
  matrix:
18
18
  os: [ubuntu-latest]
19
- python-version: ["3.8",]
19
+ python-version: ["3.8","3.10"]
20
20
  torch-version: ["2.0.0",]
21
21
  steps:
22
22
  - uses: actions/checkout@v4
@@ -27,9 +27,9 @@ jobs:
27
27
  - name: Install requirements
28
28
  run: |
29
29
  sudo apt-get update && sudo apt-get -y install libglu1-mesa
30
- pip install torch~=${{ matrix.torch-version }} torchvision --index-url https://download.pytorch.org/whl/cpu
31
30
  pip install .
32
31
  pip install -r tests/requirements.txt
32
+ pip install torch~=${{ matrix.torch-version }} torchvision --index-url https://download.pytorch.org/whl/cpu
33
33
  - name: Test with pytest
34
34
  run: |
35
35
  pytest tests
@@ -63,10 +63,10 @@ jobs:
63
63
  - uses: actions/checkout@v4
64
64
  with:
65
65
  fetch-depth: 0
66
- - name: Setup Python 3.8
66
+ - name: Setup Python 3.10
67
67
  uses: actions/setup-python@v5
68
68
  with:
69
- python-version: 3.8
69
+ python-version: "3.10.18"
70
70
  - name: Install dependencies
71
71
  run: |
72
72
  sudo apt-get update && sudo apt-get -y install libglu1-mesa
@@ -1,7 +1,19 @@
1
1
  CHANGES
2
2
  =======
3
3
 
4
+ v2.0.4
5
+ ------
6
+
7
+ * Remove support for older boards following update on Samna 0.46.0
8
+
9
+ v2.0.3
10
+ ------
11
+
4
12
  * Update Sinabs license to Apache 2.0
13
+
14
+ v2.0.2
15
+ ------
16
+
5
17
  * Spike count plot in 'DynapcnnVisualizer' is optional
6
18
  * `DynapcnnVisualizer` allows custom JIT filters to make readout predictions
7
19
 
@@ -1,6 +1,6 @@
1
1
  Metadata-Version: 2.1
2
2
  Name: sinabs
3
- Version: 2.0.3.dev11
3
+ Version: 2.0.4.dev32
4
4
  Summary: SynSense Spiking Neural Network simulator for deep neural networks (DNNs).
5
5
  Home-page: UNKNOWN
6
6
  Author: SynSense (formerly AiCTX)
@@ -8,18 +8,18 @@ Each core also have the following features:
8
8
  1. Each core has an unique index number, the first core's index starts from 0. So the index is in range [0, 8).
9
9
 
10
10
  2. Each core can **only** define **2 destination cores** as its output destination core(layer).
11
- See [detail.](https://synsense-sys-int.gitlab.io/samna/reference/dynapcnn/configuration/index.html#samna.dynapcnn.configuration.CNNLayerDestination)
11
+ See [detail.](https://synsense-sys-int.gitlab.io/samna/0.46.1/reference/speck2f/configuration/index.html#samna.speck2f.configuration.CnnLayerDestination)
12
12
 
13
13
  3. You can define multiple cores to have one **same destination core**.
14
14
  Technically,you can use this feature to achieve a `short-cut`(residual connection) like ResNet does.
15
- See [detail.](https://synsense-sys-int.gitlab.io/samna/reference/dynapcnn/configuration/index.html#samna.dynapcnn.configuration.CNNLayerDestination.layer)
15
+ See [detail.](https://synsense-sys-int.gitlab.io/samna/0.46.1/reference/speck2f/configuration/index.html#samna.speck2f.configuration.CnnLayerDestination.layer)
16
16
 
17
17
  4. Each core can optionally apply a `sum-pooling` operation before feeding the output events into the destination core.
18
- See [detail.](https://synsense-sys-int.gitlab.io/samna/reference/dynapcnn/configuration/index.html#samna.dynapcnn.configuration.CNNLayerDestination.pooling)
18
+ See [detail.](https://synsense-sys-int.gitlab.io/samna/0.46.1/reference/speck2f/configuration/index.html#samna.speck2f.configuration.CnnLayerDestination.pooling)
19
19
 
20
20
  5. Each core can optionally apply a `channel-shift` operation before feeding the output events into the destination core.
21
21
  Technically, you can use this feature to `concatenate` two cores' output events among the channel axis.
22
- See [detail.](https://synsense-sys-int.gitlab.io/samna/reference/dynapcnn/configuration/index.html#samna.dynapcnn.configuration.CNNLayerDestination.feature_shift)
22
+ See [detail.](https://synsense-sys-int.gitlab.io/samna/0.46.1/reference/speck2f/configuration/index.html#samna.speck2f.configuration.CnnLayerDestination.feature_shift)
23
23
 
24
24
  6. You can define the order of cores/layers by defining the `destination` index of each core, i.e. the order of the 9 layers on the chip can be customized by yourself.
25
25
  We already have this feature in sinabs-dynapcnn. When you deploy an SNN to the devkit, you can do:
@@ -47,7 +47,7 @@ help the user to deploy their networks with more complex architecture to the dev
47
47
  ## Can I achieve a "Residual Connection" like ResNet does?
48
48
 
49
49
  Like mentioned above, "Yes, we can define a residual short-cut on the devkit". However, currently you can only manually
50
- change the `samna.dynapcnn.configuration.CNNLayerDestination.layer` to achieve this, you can do this if you are very
50
+ change the `samna.speck2f.configuration.CNNLayerDestination.layer` to achieve this, you can do this if you are very
51
51
  familiar with the `samna-configuration`. Otherwise,let's wait for a while after the "network graph extraction feature" is
52
52
  completed.
53
53
 
@@ -179,7 +179,7 @@ class Network:
179
179
  ```
180
180
  network = nn.sequential([
181
181
  nn.conv2d(),
182
- nn.BatchNorm2d(), # unspport in speck/dynapcnn
182
+ nn.BatchNorm2d(), # unsupport in speck
183
183
  IAFsqueeze(),
184
184
  ])
185
185
  ```
@@ -25,5 +25,5 @@ with open("./my_config.bin", "wb") as f:
25
25
  f.write((e).to_bytes(1, byteorder='little'))
26
26
  ```
27
27
 
28
- More details can be found in [samna documetation.](https://synsense-sys-int.gitlab.io/samna/search.html?q=configuration_to_flash_binary)
28
+ More details can be found in [samna documetation.](https://synsense-sys-int.gitlab.io/samna/0.46.1/reference/speck2f/index.html#samna.speck2f.configuration_to_flash_binary)
29
29
 
@@ -26,7 +26,7 @@ consist of:
26
26
  "Logic" −> "Kernel Memory Read" −> "Logic" −> "Neuron Read" −> "Neuron Write" −> "Logic"
27
27
  `
28
28
 
29
- Each core/layer on the DynapCNN/Speck has an upper limit on the number of synaptic-operations it can execute per second.
29
+ Each core/layer on the Speck processor has an upper limit on the number of synaptic-operations it can execute per second.
30
30
  This upper limit is the "bandwidth of SynOps/s".
31
31
 
32
32
  If the number of SynOps/s for a single core exceeds the limit, the entire chip stalls, and the
@@ -1,4 +1,4 @@
1
- **Speck/DynapCNN**
1
+ **Speck**
2
2
  ==================
3
3
 
4
4
  .. toctree::
@@ -790,12 +790,12 @@
790
790
  "\n",
791
791
  "To deploy the SNN to the devkit, we use an auxiliary class `DynapcnnNetwork` to convert the pretrained SNN to a configuration object of the devkit.\n",
792
792
  "\n",
793
- "In the example beblow, we use the \"Speck2fModuleDevKit\" as the inference device. More devkit names can be found [here.](https://gitlab.com/synsense/sinabs-dynapcnn/-/blob/master/sinabs/backend/dynapcnn/chip_factory.py)"
793
+ "In the example beblow, we use the \"Speck2fDevKit\" as the inference device. More devkit names can be found [here.](https://gitlab.com/synsense/sinabs-dynapcnn/-/blob/master/sinabs/backend/dynapcnn/chip_factory.py)"
794
794
  ]
795
795
  },
796
796
  {
797
797
  "cell_type": "code",
798
- "execution_count": 13,
798
+ "execution_count": null,
799
799
  "metadata": {},
800
800
  "outputs": [
801
801
  {
@@ -813,7 +813,7 @@
813
813
  "# cpu_snn = snn_convert.to(device=\"cpu\")\n",
814
814
  "cpu_snn = snn_bptt.to(device=\"cpu\")\n",
815
815
  "dynapcnn = DynapcnnNetwork(snn=cpu_snn, input_shape=(2, 34, 34), discretize=True, dvs_input=False)\n",
816
- "devkit_name = \"speck2fmodule\"\n",
816
+ "devkit_name = \"speck2fdevkit\"\n",
817
817
  "\n",
818
818
  "# use the `to` method of DynapcnnNetwork to deploy the SNN to the devkit\n",
819
819
  "dynapcnn.to(device=devkit_name, chip_layers_ordering=\"auto\")\n",
@@ -833,9 +833,9 @@
833
833
  "source": [
834
834
  "### Inference On The Devkit\n",
835
835
  "\n",
836
- "Our devkits takes [`samna events`](https://synsense-sys-int.gitlab.io/samna/reference/speck2f/event/index.html) stream as the input. So before sending the raw N-MNIST events into devkit, we need first convert the data to samna's [`samna.speck2f.event.Spike`](https://synsense-sys-int.gitlab.io/samna/reference/speck2f/event/index.html#samna.speck2f.event.Spike) events stream.\n",
836
+ "Our devkits takes [`samna events`](https://synsense-sys-int.gitlab.io/samna/0.46.1/reference/speck2f/event/index.html#samna.speck2f.event.Spike) stream as the input. So before sending the raw N-MNIST events into devkit, we need first convert the data to samna's [`samna.speck2f.event.Spike`](https://synsense-sys-int.gitlab.io/samna/reference/speck2f/event/index.html#samna.speck2f.event.Spike) events stream.\n",
837
837
  "\n",
838
- "**Notice**: Different types of devkit need different types of event as its input. For example, if you're using a `DynapcnnDevKit`, you need to use the [`samna.dynapcnn.event.Spike`](https://synsense-sys-int.gitlab.io/samna/reference/dynapcnn/event/index.html#samna.dynapcnn.event.Spike) as input."
838
+ "**Notice**: Different types of devkit need different types of event as its input. For example, if you're using a `Speck2eDevKit`, you need to use the [`samna.speck2e.event.Spike`](https://synsense-sys-int.gitlab.io/samna/0.46.1/reference/speck2f/event/index.html#samna.speck2f.event.Spike) as input."
839
839
  ]
840
840
  },
841
841
  {
@@ -974,7 +974,7 @@
974
974
  },
975
975
  {
976
976
  "cell_type": "code",
977
- "execution_count": 15,
977
+ "execution_count": null,
978
978
  "metadata": {},
979
979
  "outputs": [
980
980
  {
@@ -1027,7 +1027,7 @@
1027
1027
  "# init DynapcnnNetwork instance\n",
1028
1028
  "dynapcnn = DynapcnnNetwork(snn=cpu_snn, input_shape=(2, 34, 34), discretize=True, dvs_input=True)\n",
1029
1029
  "\n",
1030
- "devkit_name = \"speck2fmodule\"\n",
1030
+ "devkit_name = \"speck2fdevkit\"\n",
1031
1031
  "# define which layers output you want to monitor\n",
1032
1032
  "layers_to_monitor = [0, 1, 2, 3]\n",
1033
1033
  "# pass the callback function into the `.to` method\n",
@@ -1109,7 +1109,7 @@
1109
1109
  "\n",
1110
1110
  "By running the code block below, the input events will be displayed on the GUI window.\n",
1111
1111
  "\n",
1112
- "We now start to write inputs to the devkit.In the example above, we use the `samna.speck2f.event.Spike` as the input event type. Since now we need to visualize the input events which we write into the devkit, we need to use the `samna.speck2f.event.DvsEvent`. It is because only by this the input events can be captured by the visualizer. More details about the \"DvsEvent\" can be found [here.](https://synsense-sys-int.gitlab.io/samna/reference/speck2f/event/index.html#samna.speck2f.event.DvsEvent) \n",
1112
+ "We now start to write inputs to the devkit.In the example above, we use the `samna.speck2f.event.Spike` as the input event type. Since now we need to visualize the input events which we write into the devkit, we need to use the `samna.speck2f.event.DvsEvent`. It is because only by this the input events can be captured by the visualizer. More details about the \"DvsEvent\" can be found [here.](https://synsense-sys-int.gitlab.io/samna/0.46.1/reference/speck2f/event/index.html#samna.speck2f.event.DvsEvent) \n",
1113
1113
  "\n",
1114
1114
  "![dvs_event_input_flow](/_static/nmnist_quick_start/dvs_input_flow.png)"
1115
1115
  ]
@@ -1,48 +1,51 @@
1
1
  # Overview
2
2
 
3
- ## DYNAP-CNN and SPECK
3
+ SPECK™ are a family of spiking neural network ASICs, which is designed to focusing on convolution spiking neural network (CSNN) based vision processing tasks.
4
+ Speck™ is the world first neuromorphic device which integrates the DYNAP-CNN neuromorphic processor and a dynamic vision sensor (DVS) into a single SoC.
5
+ Speck™ processor, DYNAP-CNN, is a fully scalable, event-driven neuromorphic processor with up to 0.32M configurable spiking neurons and direct interface with external DVS.
4
6
 
5
- DYNAP-CNN/SPECK are a family of spiking neural network ASICs family, which is designed to focusing on convolution spiking neural network(SCNN) based vision processing tasks. DYNAP-CNN is a fully scalable, event-driven neuromorphic processor with up to 0.32M configurable spiking neurons and direct interface with external DVS. Speck™ is the world first neuromorphic device which integrates the DYNAP-CNN neuromorphic processor and a dynamic vision sensor(DVS) into a single SoC.
7
+ DYNAP-CNN processor can be used directly bypassing the DVS camera integrated on Speck.
6
8
 
7
9
  ![image.png](/_static/Overview/speck_dynapcnn.png)
8
10
 
9
-
10
- Currently, __sinabs-dynapcnn__ library provides the interface to serveral available versions of hardwares for DYNAPCNN/SPECK family:
11
+ Currently, __sinabs-dynapcnn__ library provides the interface to serveral available versions of hardwares for SPECK™ family:
11
12
 
12
13
  | Device Name |Identifier |
13
14
  | :----| :----: |
14
- | DYNAP-CNN Development Kit |*dynapcnndevkit |
15
- | Speck Tiny Development Kit|*speck2btiny|
16
- | Speck Development Kit |*speck2edevkit|
15
+ | Speck 2E Test Board |*Speck2eTestBoard|
16
+ | Speck 2E Development Kit |*speck2edevkit|
17
+ | Speck 2F Module |*speck2fmodule|
18
+ | Speck 2F Development Kit |*speck2fdevkit|
19
+ | DYNAP-SE2 DevBoard |*dynapse2|
20
+ | DYNAP-SE2 Stack |*dynapse2_stack|
17
21
 
18
22
  __note__: * stands for the correspond software identifier we assigned to the different devkit
19
23
 
20
24
  <br />
21
25
 
22
- The general top level diagram of the DYNAP-CNN/SPECK chip is shown as follows:
26
+ The general top level diagram of the SPECK chip is shown as follows:
23
27
 
24
28
  ![top_diagram](/_static/Overview/speck_top_level.png)
25
29
 
26
30
 
27
- For DYNAP-CNN dev-kits, it allows the user to interact with the chip using external DVS sensors or pre-defined event data. Speck seriers devkit based on above, it additionally allows the user to use its embeded internal DVS for development.
28
-
29
- Currently, Speck/Dynapcnn supports following External DVS sensor with the samna support:
31
+ Sinabs allows you to interact with the DynapCNN processor using external DVS sensors or pre-defined event data, besides its embeded internal DVS for development.
32
+ Currently, Speck supports the following external DVS sensor with the samna support:
30
33
 
31
34
  * Inivation Davis346
32
35
  * Inivation Davis240
33
36
  * Inivation DVXplorer
34
37
  * Prophesee EVK3-Gen 3.1VGA
35
38
 
36
- # Backend: dynapcnn
39
+ # Backend: Dynapcnn
37
40
 
38
- To interact with these developmentkit, sinabs needs [samna](https://pypi.org/project/samna/) dependency to enables the chip configuration and network setting. As is shown in the figure below, dynapcnn backend provides a simple way to convert the network structure and parameters to the _SammnaConfiguration_ that can be used by samna to setup the chip.
41
+ To interact with the processor, sinabs needs [samna](https://pypi.org/project/samna/) dependency to enables the chip configuration and network setting. As is shown in the figure below, dynapcnn backend provides a simple way to convert the network structure and parameters to the _SamnaConfiguration_ that can be used by samna to setup the chip.
39
42
 
40
43
 
41
44
  ![sinab-dynapcnn](/_static/Overview/sinabs-dynapcnn-role.png)
42
45
 
43
46
  # Chip Resources
44
47
 
45
- For all DYNAP-CNN/SPECK family, they using the DYNAP asynchronous computing structure and have the similar computation resources. The detailed features are shown below
48
+ All SPECK family chips use the DYNAP asynchronous computing structure and have the similar computation resources. The detailed features are shown below
46
49
 
47
50
  ## Key Features
48
51
 
@@ -73,9 +76,7 @@ An Event noise filter is also included in the pre-processing layer, the filter c
73
76
 
74
77
  ### DYNAP-CNN Layer
75
78
 
76
- The DYNAP-CNN Layer is the main hard ware representation of the designed spiking neural network structure. One of the main goal of the sinabs-dynapcnn is to provide an efficient, simply way to convert the `torch.Sequential` object to equivalent DYNAP-CNN layer configuration. Details of how to use the sinabs-dynapcnn interact with your designed SNNs, please visit tutorial
77
-
78
-
79
+ The DYNAP-CNN Layer is the main hardware representation of the designed spiking neural network structure. One of the main goal of the sinabs-dynapcnn is to provide an efficient, simply way to convert the `torch.Sequential` object to equivalent DYNAP-CNN layer configuration. For more details on how to use the sinabs-dynapcnn to interact with your designed SNNs, please check our tutorials.
79
80
 
80
81
  #### Feature
81
82
  - Max input dimension for the layer: 128x128
@@ -90,15 +91,15 @@ The DYNAP-CNN Layer is the main hard ware representation of the designed spiking
90
91
  - Fanout:2
91
92
 
92
93
  #### Internal Execution Order
93
- A single chip consists of __9__ configurable computing cores(layers), each layer can be regarded as a combination of (Conv2d Operation --> Spiking Activation --> Sumpooling). These computation has to be configured in exact equivalent execution order. Each layer can be flexiblely configured to be communicate with other layers.
94
+ A single chip consists of __9__ configurable computing cores (layers), each layer can be regarded as a combination of (Conv2d Operation --> Spiking Activation --> Sumpooling). These computation has to be configured in exact equivalent execution order. Each layer can be flexiblely configured to be communicate with other layers.
94
95
 
95
96
 
96
97
  #### Async event-driven feature
97
- information communication with layers are only in "Event based" format, the layer process the "incomming" event only at whenever a layer recieves it. Each layer can be configured to set 1-2 destination to the other layer.
98
+ information communication with layers are only in "event based" format, the layer process the "incomming" event only at whenever a layer recieves it. Each layer can be configured to set 1-2 destination to the other layer.
98
99
 
99
100
 
100
101
  #### Memory Constraints and Network Sizing
101
- Each layer has different memory constraints that split into kernel memory(for weight parameters) and neuron memory(spiking neuron states) as is shown below. __Note:__ For the entire series of chips, dynapcnn/speck support precision of **8bit** int for kernel parameters and **16bit** int for neuron state precisions.
102
+ Each layer has different memory constraints that split into kernel memory (for weight parameters) and neuron memory (spiking neuron states) as is shown below. __Note:__ For the entire series of chips, speck support precision of **8bit** int for kernel parameters and **16bit** int for neuron state precisions.
102
103
 
103
104
  ![memoryconstrains](/_static/Overview/memory_constraints.png)
104
105
 
@@ -6,7 +6,7 @@ This package automates this process for the end-user and enables quick deploymen
6
6
 
7
7
  TLDR;
8
8
  -----
9
- A short (and perhaps the quickest path) to deploying your model on one of our dev-kits is shown in the example below.
9
+ A short (and perhaps the quickest path) to deploying your model on one of our chips is shown in the example below.
10
10
 
11
11
  ```python
12
12
  import torch
@@ -45,7 +45,7 @@ hw_model = DynapcnnNetwork(
45
45
  )
46
46
 
47
47
  # Deploy model to a dev-kit
48
- hw_model.to(device="dynapcnndevkit:0")
48
+ hw_model.to(device="speck2fdevkit:0")
49
49
 
50
50
  # Send events to chip
51
51
  events_in: List["Spike"] = ... # Load your events
@@ -59,7 +59,7 @@ events_out = hw_model(events_in)
59
59
  Model conversion to DYNAP-CNN core structure
60
60
  --------------------------------------------
61
61
 
62
- DYNAP-CNN based chips like `DYNAP-CNN DevKit` or `Speck` series comprise several `cores` or `layers`.
62
+ Speck family chips, based on DYNAP-CNN, comprise several `cores` or `layers`.
63
63
  Each of these `layers` comprises three functionalities:
64
64
 
65
65
  1. 2D Convolution
@@ -97,7 +97,7 @@ Device selection
97
97
  ----------------
98
98
 
99
99
  The device naming is inspired by `pytorch` device naming convention ie `DEVICE_TYPE:INDEX`.
100
- `dynapcnndevkit:0` refers to the _first_ `Dynapcnn DevKit` available.
100
+ `speck2fdevkit:0` refers to the _first_ `Speck 2F DevKit` available.
101
101
  If there are multiple devices of the same kind connected to the PC, then they are referred by higher incremental indices.
102
102
 
103
103
  To see all the recognized devices, please have a look at the `sinabs.backend.dynapcnn.io.device_types`
@@ -116,16 +116,15 @@ List of devices currently recognized by *samna*
116
116
  ```
117
117
  # A map of all device types and their corresponding samna `device_name`
118
118
  device_types = {
119
- "speck": "speck",
119
+ "speck2e": "Speck2eTestBoard",
120
+ "speck2edevkit": "Speck2eDevKit",
121
+ "speck2fmodule": "Speck2fModuleDevKit",
122
+ "speck2fdevkit": "Speck2fDevKit",
120
123
  "dynapse2": "DYNAP-SE2 DevBoard",
121
124
  "dynapse2_stack": "DYNAP-SE2 Stack",
122
- "speck2devkit": "Speck2DevKit",
123
- "dynapse1devkit": "Dynapse1DevKit",
124
125
  "davis346": "Davis 346",
125
126
  "davis240": "Davis 240",
126
127
  "dvxplorer": "DVXplorer",
127
- "pollendevkit": "PollenDevKit",
128
- "dynapcnndevkit": "DynapcnnDevKit",
129
128
  }
130
129
  ```
131
130
 
@@ -166,13 +165,13 @@ Porting model to device
166
165
  -----------------------
167
166
 
168
167
  `DynapcnnNetwork` class has an API similar to that of native `pytorch` and its `.to` method.
169
- Similar to porting a model to cpu with `model.to("cpu")` and GPU with `model.to("cuda:0")` you can also port your `DynapcnnCompatibleModel` to a chip with `model.to("dynapcnndevkit:0")`.
168
+ Similar to porting a model to cpu with `model.to("cpu")` and GPU with `model.to("cuda:0")` you can also port your `DynapcnnCompatibleModel` to a chip with `model.to("speck2fdevkit:0")`.
170
169
 
171
170
  You can also specify a few additional parameters as shown below.
172
171
 
173
172
  ```python
174
173
  hw_model.to(
175
- device="dynapcnndevkit:0",
174
+ device="speck2fdevkit:0",
176
175
  chip_layers_ordering="auto", # default value is "auto"
177
176
  monitor_layers=[-1],
178
177
  config_modifier=config_modifier,
@@ -137,14 +137,13 @@ In order to visualize the class outputs as images, we need to get the images. Th
137
137
  - In order to show a prediction only if there are more than a `threshold` number of events from that output, set the `readout_prediction_threshold`=`threshold`.
138
138
  - In order to default to a certain class (in `DVSGesture` example, we use the last `other` class) set `readout_default_return_value`=`class_idx` (int).
139
139
  - In order to limit the prediction between some thresholds (i.e. it is meaningless to make a prediction with too low and too high values) set `readout_default_threshold_low` and `readout_default_threshold_high` parameters.
140
- - In all the chips except for `DynapcnnDevkit` you can monitor the power consumption in 5 different rows. These rows are `io`, `logic`, `ram`, `pixel-digital` and `pixel-analog`.
140
+ - In all the chips you can monitor the power consumption in 5 different rows. These rows are `io`, `logic`, `ram`, `pixel-digital` and `pixel-analog`.
141
141
  - `io`: Power consumption of IO unit on the chip.
142
142
  - `logic`: Power consumption caused by operations in the chip and communication with spikes.
143
143
  - `ram`: Power consumption of `memory` used to store `states` and `weights`.
144
144
  - `pixel-digital`: Power consumption of the digital part (i.e. communication via AER) of pixels.
145
145
  - `pixel-analog`: Power consumtpion of the analog part. (i.e. pixels.
146
146
  ).
147
- - `DynapcnnDevkit` does not come with an on-board Dvs sensor, thus does not support the last two. If you want only the first 3 columns, pass `power_monitor_number_of_items`=`3`. If you want columns pass `5`.
148
147
  - If you follow the naming conventions for readout images (i.e. `{labelidx}_{labelname}.png`) the feature names are going to be parsed from the image names. However, you can also pass labels manually using `feature_names`=`["class01", "class02", ...]`. That can be used also while labeling `SpikeCountPlot` legend, when `ReadoutLayer` is not preferred.
149
148
  - The last layer feature count is going to be automatically extracted from the model. However you can pass it manually `feature_count`=`count`. This can be useful for plotting purposes, when there are other classes that you did not take into account in the model you trained.
150
149
  - `extra_arguments`: You can pass the function names and variables for the individual plots for `spike_count`, `readout` and `power_measurement` plots. Available function names and argument types can be found in the following link: [here](https://synsense-sys-int.gitlab.io/samna/reference/viz/imgui/index.html#samna-viz-imgui)
@@ -77,11 +77,9 @@ hardware_compatible_model = DynapcnnNetwork(
77
77
  )
78
78
 
79
79
  # Chip name
80
- # Depending on the available hardware you have, you can choose to run the
81
- # network for example on 'dynapcnndevkit' or 'speck2b' among others. See
82
- # documentation for full list of supported devices
83
- # chip_name = "speck2fmodule"
84
- chip_name = "dynapcnndevkit"
80
+ # Depending on the available hardware you have, you need to update the chip name.
81
+ # See documentation for full list of supported devices
82
+ chip_name = "speck2fmodule"
85
83
 
86
84
  hardware_compatible_model.to(
87
85
  device=chip_name, monitor_layers=[-1] # Monitor the output layer
@@ -110,8 +108,8 @@ print("Sending events to device")
110
108
  evs_out = hardware_compatible_model(input_events)
111
109
 
112
110
  # Filter readout events
113
- if chip_name == "dynapcnndevkit":
114
- evs_out = list(filter(lambda x: isinstance(x, samna.dynapcnn.event.Spike), evs_out))
111
+ if chip_name == "speck2fdevkit":
112
+ evs_out = list(filter(lambda x: isinstance(x, samna.speck2f.event.Spike), evs_out))
115
113
 
116
114
  if len(evs_out) > 0:
117
115
  print(
@@ -1,7 +1,7 @@
1
1
  pbr
2
2
  numpy
3
3
  torch>=1.8
4
- nir
4
+ nir <=1.0.4
5
5
  nirtorch
6
6
  samna >= 0.33
7
7
 
@@ -4,10 +4,6 @@ import numpy as np
4
4
  import torch
5
5
 
6
6
  from .chips import (
7
- DynapcnnConfigBuilder,
8
- Speck2BConfigBuilder,
9
- Speck2CMiniConfigBuilder,
10
- Speck2DMiniConfigBuilder,
11
7
  Speck2EConfigBuilder,
12
8
  Speck2FConfigBuilder,
13
9
  )
@@ -17,11 +13,6 @@ from .utils import parse_device_id
17
13
 
18
14
  class ChipFactory:
19
15
  supported_devices = {
20
- "dynapcnndevkit": DynapcnnConfigBuilder,
21
- "speck2b": Speck2BConfigBuilder,
22
- "speck2btiny": Speck2BConfigBuilder, # It is the same chip, so doesn't require a separate builder
23
- "speck2cmini": Speck2CMiniConfigBuilder,
24
- "speck2dmini": Speck2DMiniConfigBuilder,
25
16
  "speck2e": Speck2EConfigBuilder,
26
17
  "speck2edevkit": Speck2EConfigBuilder,
27
18
  "speck2fmodule": Speck2FConfigBuilder, # Speck2fModuleDevKit
@@ -0,0 +1,3 @@
1
+ # from .dynapcnn import DynapcnnConfigBuilder
2
+ from .speck2e import Speck2EConfigBuilder
3
+ from .speck2f import Speck2FConfigBuilder
@@ -1,12 +1,11 @@
1
- import copy
1
+ from abc import abstractmethod
2
2
  from typing import List
3
3
  from warnings import warn
4
4
 
5
5
  import samna
6
6
  import torch
7
- from samna.dynapcnn.configuration import DynapcnnConfiguration
8
-
9
7
  import sinabs
8
+
10
9
  from sinabs.backend.dynapcnn.config_builder import ConfigBuilder
11
10
  from sinabs.backend.dynapcnn.dvs_layer import DVSLayer, expand_to_pair
12
11
  from sinabs.backend.dynapcnn.dynapcnn_layer import DynapcnnLayer
@@ -15,63 +14,28 @@ from sinabs.backend.dynapcnn.mapping import LayerConstraints
15
14
 
16
15
  class DynapcnnConfigBuilder(ConfigBuilder):
17
16
  @classmethod
17
+ @abstractmethod
18
18
  def get_samna_module(cls):
19
- return samna.dynapcnn
19
+ """
20
+ Get the samna parent module that hosts all the appropriate sub-modules and classes.
20
21
 
21
- @classmethod
22
- def get_default_config(cls) -> "DynapcnnConfiguration":
23
- return DynapcnnConfiguration()
22
+ Returns
23
+ -------
24
+ samna module
25
+ """
24
26
 
25
27
  @classmethod
26
- def get_dvs_layer_config_dict(cls, layer: DVSLayer): ...
28
+ @abstractmethod
29
+ def get_default_config(cls):
30
+ """
31
+ Returns the default configuration for the device type
32
+ """
27
33
 
28
34
  @classmethod
29
35
  def write_dvs_layer_config(cls, layer: DVSLayer, config: "DvsLayerConfig"):
30
36
  for param, value in layer.get_config_dict().items():
31
37
  setattr(config, param, value)
32
38
 
33
- @classmethod
34
- def set_kill_bits(cls, layer: DynapcnnLayer, config_dict: dict) -> dict:
35
- """This method updates all the kill_bit parameters.
36
-
37
- Args:
38
- layer (DynapcnnLayer): The layer of whome the configuration is to be generated
39
- config_dict (dict): The dictionary where the parameters need to be added
40
-
41
-
42
- Returns:
43
- dict: returns the updated config_dict.
44
- """
45
- config_dict = copy.deepcopy(config_dict)
46
-
47
- if layer.conv_layer.bias is not None:
48
- (weights, biases) = layer.conv_layer.parameters()
49
- else:
50
- (weights,) = layer.conv_layer.parameters()
51
- biases = torch.zeros(layer.conv_layer.out_channels)
52
-
53
- config_dict["weights_kill_bit"] = (~weights.bool()).tolist()
54
- config_dict["biases_kill_bit"] = (~biases.bool()).tolist()
55
-
56
- # - Neuron states
57
- if not layer.spk_layer.is_state_initialised():
58
- # then we assign no initial neuron state to DYNAP-CNN.
59
- f, h, w = layer.get_neuron_shape()
60
- neurons_state = torch.zeros(f, w, h)
61
- elif layer.spk_layer.v_mem.dim() == 4:
62
- # 4-dimensional states should be the norm when there is a batch dim
63
- neurons_state = layer.spk_layer.v_mem.transpose(2, 3)[0]
64
- else:
65
- raise ValueError(
66
- f"Current v_mem (shape: {layer.spk_layer.v_mem.shape}) of spiking layer not understood."
67
- )
68
-
69
- config_dict["neurons_value_kill_bit"] = (
70
- torch.zeros_like(neurons_state).bool().tolist()
71
- )
72
-
73
- return config_dict
74
-
75
39
  @classmethod
76
40
  def get_dynapcnn_layer_config_dict(cls, layer: DynapcnnLayer):
77
41
  config_dict = {}
@@ -112,11 +76,8 @@ class DynapcnnConfigBuilder(ConfigBuilder):
112
76
  config_dict["weights"] = weights.int().tolist()
113
77
  config_dict["biases"] = biases.int().tolist()
114
78
  config_dict["leak_enable"] = biases.bool().any()
115
- # config_dict["weights_kill_bit"] = torch.zeros_like(weights).bool().tolist()
116
- # config_dict["biases_kill_bit"] = torch.zeros_like(biases).bool().tolist()
117
79
 
118
80
  # Update parameters from the spiking layer
119
-
120
81
  # - Neuron states
121
82
  if not layer.spk_layer.is_state_initialised():
122
83
  # then we assign no initial neuron state to DYNAP-CNN.
@@ -155,7 +116,6 @@ class DynapcnnConfigBuilder(ConfigBuilder):
155
116
  "threshold_low": min_v_mem,
156
117
  "monitor_enable": False,
157
118
  "neurons_initial_value": neurons_state.int().tolist(),
158
- # "neurons_value_kill_bit" : torch.zeros_like(neurons_state).bool().tolist()
159
119
  }
160
120
  )
161
121
  # Update parameters from pooling
@@ -167,9 +127,6 @@ class DynapcnnConfigBuilder(ConfigBuilder):
167
127
  else:
168
128
  pass
169
129
 
170
- # Set kill bits
171
- config_dict = cls.set_kill_bits(layer=layer, config_dict=config_dict)
172
-
173
130
  return config_dict
174
131
 
175
132
  @classmethod
@@ -273,7 +230,7 @@ class DynapcnnConfigBuilder(ConfigBuilder):
273
230
  return constraints
274
231
 
275
232
  @classmethod
276
- def monitor_layers(cls, config: "DynapcnnConfiguration", layers: List):
233
+ def monitor_layers(cls, config, layers: List):
277
234
  """Updates the config object in place.
278
235
 
279
236
  Parameters
@@ -309,15 +266,36 @@ class DynapcnnConfigBuilder(ConfigBuilder):
309
266
  return config
310
267
 
311
268
  @classmethod
269
+ @abstractmethod
312
270
  def get_input_buffer(cls):
313
- return samna.BasicSourceNode_dynapcnn_event_input_event()
271
+ """
272
+ Initialize and return the appropriate output buffer object Note that this just the
273
+ buffer object.
274
+
275
+ This does not actually connect the buffer object to the graph. (It is needed as of samna
276
+ 0.21.0)
277
+ """
314
278
 
315
279
  @classmethod
280
+ @abstractmethod
316
281
  def get_output_buffer(cls):
317
- return samna.BasicSinkNode_dynapcnn_event_output_event()
282
+ """
283
+ Initialize and return the appropriate output buffer object Note that this just the
284
+ buffer object.
285
+
286
+ This does not actually connect the buffer object to the graph.
287
+ """
318
288
 
319
289
  @classmethod
320
- def reset_states(cls, config: DynapcnnConfiguration, randomize=False):
290
+ def reset_states(cls, config, randomize=False):
291
+ """
292
+ Parameters
293
+ ----------
294
+ config:
295
+ samna config object
296
+ randomize (bool):
297
+ If true, the states will be set to random initial values. Else, they will be set to zero
298
+ """
321
299
  for idx, lyr in enumerate(config.cnn_layers):
322
300
  shape = torch.tensor(lyr.neurons_initial_value).shape
323
301
  # set the config's neuron initial state values into zeros
@@ -5,9 +5,8 @@ from sinabs.backend.dynapcnn.dynapcnn_layer import DynapcnnLayer
5
5
 
6
6
  from .dynapcnn import DynapcnnConfigBuilder
7
7
 
8
- # Since most of the configuration is identical to DYNAP-CNN, we can simply inherit this class
9
-
10
8
 
9
+ # Inherit DynapCNNConfigBuilder to share implementation with other DynapCNN/Speck devices
11
10
  class Speck2EConfigBuilder(DynapcnnConfigBuilder):
12
11
  @classmethod
13
12
  def get_samna_module(cls):
@@ -25,10 +24,6 @@ class Speck2EConfigBuilder(DynapcnnConfigBuilder):
25
24
  def get_output_buffer(cls):
26
25
  return samna.BasicSinkNode_speck2e_event_output_event()
27
26
 
28
- @classmethod
29
- def set_kill_bits(cls, layer: DynapcnnLayer, config_dict: dict) -> dict:
30
- return config_dict
31
-
32
27
  @classmethod
33
28
  def get_dynapcnn_layer_config_dict(cls, layer: DynapcnnLayer):
34
29
  config_dict = super().get_dynapcnn_layer_config_dict(layer=layer)