simdref 0.0.1__tar.gz → 0.0.3__tar.gz
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- {simdref-0.0.1/src/simdref.egg-info → simdref-0.0.3}/PKG-INFO +2 -2
- {simdref-0.0.1 → simdref-0.0.3}/README.md +1 -1
- {simdref-0.0.1 → simdref-0.0.3}/pyproject.toml +1 -1
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/tui.py +61 -21
- {simdref-0.0.1 → simdref-0.0.3/src/simdref.egg-info}/PKG-INFO +2 -2
- {simdref-0.0.1 → simdref-0.0.3}/LICENSE +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/setup.cfg +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/__init__.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/__main__.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/annotate.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/arm_instructions.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/cli.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/display.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/filters.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/ingest.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/ingest_catalog.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/ingest_pdf.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/ingest_sources.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/lsp.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/manpages.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/models.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/pdfparse/__init__.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/pdfparse/base.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/pdfparse/intel.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/pdfparse/registry.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/pdfparse/types.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/pdfrefs.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/perf.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/perf_sources/__init__.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/perf_sources/cores.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/perf_sources/llvm_mca.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/perf_sources/llvm_scheduling.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/perf_sources/merge.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/profile/__init__.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/profile/adapters/__init__.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/profile/adapters/exegesis.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/profile/adapters/mca.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/profile/adapters/perf.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/profile/adapters/uprof.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/profile/adapters/vtune.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/profile/adapters/xctrace.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/profile/hotloop.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/profile/merge.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/profile/model.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/profile/orchestrate.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/profile/registry.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/queries.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/riscv.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/search.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/storage.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/templates/__init__.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/templates/app.js +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/templates/favicon.svg +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/templates/index.html +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/templates/logo.svg +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/templates/style.css +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/ui_labels.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref/web.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref.egg-info/SOURCES.txt +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref.egg-info/dependency_links.txt +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref.egg-info/entry_points.txt +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref.egg-info/requires.txt +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/src/simdref.egg-info/top_level.txt +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_annotate.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_audit_coverage.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_cli_bare_query.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_cli_bootstrap_progress.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_cli_help.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_cli_llm.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_coverage_live.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_coverage_parity.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_display.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_filters.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_ingest_sources.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_issue2_fixes.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_lsp_web.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_models.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_pdfparse.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_perf.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_perf_sources.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_presentation.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_preset_persistence.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_search.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_search_pushdown.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_source_kind_filter.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_source_validation.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_storage_schema.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_tui.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_ui_labels_parity.py +0 -0
- {simdref-0.0.1 → simdref-0.0.3}/tests/test_x86_linking.py +0 -0
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Metadata-Version: 2.4
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Name: simdref
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Version: 0.0.
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Version: 0.0.3
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Summary: Searchable SIMD intrinsic and instruction reference with CLI, manpages, TUI, LSP, and static web export.
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Author: Marco
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License: GPL-3.0-or-later
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[](https://github.com/DiamonDinoia/simdref/actions/workflows/ci.yml)
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[](https://test.pypi.org/project/simdref/)
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[](https://pypi.org/project/simdref/)
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A single searchable reference for SIMD intrinsics and instructions across
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**x86 (Intel + uops.info)**, **Arm (ACLE / AARCHMRS)**, and **RISC-V
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[](https://github.com/DiamonDinoia/simdref/actions/workflows/ci.yml)
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[](https://test.pypi.org/project/simdref/)
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[](https://pypi.org/project/simdref/)
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A single searchable reference for SIMD intrinsics and instructions across
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**x86 (Intel + uops.info)**, **Arm (ACLE / AARCHMRS)**, and **RISC-V
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[project]
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name = "simdref"
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version = "0.0.
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version = "0.0.3"
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description = "Searchable SIMD intrinsic and instruction reference with CLI, manpages, TUI, LSP, and static web export."
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readme = "README.md"
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requires-python = ">=3.11"
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# ---------------------------------------------------------------------------
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_MNEMONIC_HINT_TOKENS = frozenset({"add", "sub", "mul", "div", "mov", "cmp", "and", "or", "xor"})
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def _classify_query(query: str) -> str:
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"""Mirror the web SPA's `classifyQuery` so ranking biases match."""
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lo = query.strip().lower()
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if not lo:
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return "neutral"
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if lo.startswith("_mm") or lo.startswith("__m") or "_mm" in lo:
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return "intrinsic"
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return "instruction"
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return "neutral"
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enabled_kinds: set[str] | None = None,
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) -> list[SearchResult]:
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"""Search using SQLite FTS5 with ISA family and sub-ISA filtering."""
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# Build an ISA LIKE-clause fragment so SQLite can drop non-matching rows
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# before we ever hand them to Python. Sub-ISA tokens (e.g. "SSE2") are
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# substring-matched against the isa column.
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#
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# contain the family-name string. We can't construct a sound LIKE pattern
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# for those, so when any such family is enabled we skip the SQL pushdown
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# entirely and let the Python `_isa_visible` post-filter do the work.
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# Bias scoring by query classification (mirrors the web SPA): a mnemonic
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# query like "add" should rank instructions above intrinsics, while an
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# `_mm…`/`__m…` query should still favour intrinsics. Neutral queries get
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# no kind bias.
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qkind = _classify_query(query)
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if qkind == "instruction":
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intrinsic_bias, instruction_bias, default_kind = -10, 35, "instruction"
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intrinsic_bias, instruction_bias, default_kind = 35, -10, "intrinsic"
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# Normalise the isa column the same way _isa_matches_sub does: strip
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search_exprs = [fts_expr, fts_expr_broad]
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self._current_results = results
|
|
1463
1504
|
self._has_more_results = len(results) == _INITIAL_RESULT_BATCH
|
|
1464
1505
|
for i, result in enumerate(results, 1):
|
|
@@ -1493,9 +1534,8 @@ class SimdrefApp(App):
|
|
|
1493
1534
|
self._enabled_sub_isas,
|
|
1494
1535
|
offset=len(self._current_results),
|
|
1495
1536
|
limit=_RESULT_BATCH_SIZE,
|
|
1537
|
+
enabled_kinds=set(self._enabled_kinds) if self._enabled_kinds else None,
|
|
1496
1538
|
)
|
|
1497
|
-
if self._enabled_kinds and len(self._enabled_kinds) < 2:
|
|
1498
|
-
more = [r for r in more if r.kind in self._enabled_kinds]
|
|
1499
1539
|
if not more:
|
|
1500
1540
|
self._has_more_results = False
|
|
1501
1541
|
return
|
|
@@ -1,6 +1,6 @@
|
|
|
1
1
|
Metadata-Version: 2.4
|
|
2
2
|
Name: simdref
|
|
3
|
-
Version: 0.0.
|
|
3
|
+
Version: 0.0.3
|
|
4
4
|
Summary: Searchable SIMD intrinsic and instruction reference with CLI, manpages, TUI, LSP, and static web export.
|
|
5
5
|
Author: Marco
|
|
6
6
|
License: GPL-3.0-or-later
|
|
@@ -33,7 +33,7 @@ Dynamic: license-file
|
|
|
33
33
|
|
|
34
34
|
[](https://github.com/DiamonDinoia/simdref/actions/workflows/ci.yml)
|
|
35
35
|
[](https://test.pypi.org/project/simdref/)
|
|
36
|
-
[](https://
|
|
36
|
+
[](https://pypi.org/project/simdref/)
|
|
37
37
|
|
|
38
38
|
A single searchable reference for SIMD intrinsics and instructions across
|
|
39
39
|
**x86 (Intel + uops.info)**, **Arm (ACLE / AARCHMRS)**, and **RISC-V
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