simdref 0.0.15__tar.gz → 0.0.17__tar.gz

{simdref-0.0.15/src/simdref.egg-info → simdref-0.0.17}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: simdref
-Version: 0.0.15
+Version: 0.0.17
 Summary: Searchable SIMD intrinsic and instruction reference with CLI, manpages, TUI, and LSP.
 Author: Marco
 License: GPL-3.0-or-later
@@ -10,27 +10,27 @@ Classifier: Intended Audience :: Developers
 Classifier: License :: OSI Approved :: GNU General Public License v3 or later (GPLv3+)
 Classifier: Operating System :: OS Independent
 Classifier: Programming Language :: Python :: 3
-Classifier: Programming Language :: Python :: 3.10
 Classifier: Programming Language :: Python :: 3.11
 Classifier: Programming Language :: Python :: 3.12
 Classifier: Programming Language :: Python :: 3.13
 Classifier: Programming Language :: Python :: 3.14
 Classifier: Topic :: Software Development :: Documentation
 Classifier: Topic :: Software Development :: Libraries :: Python Modules
-Requires-Python: >=3.10
+Requires-Python: >=3.11
 Description-Content-Type: text/markdown
 License-File: LICENSE
-Requires-Dist: click<9,>=8.5
-Requires-Dist: httpx<1,>=0.28
-Requires-Dist: msgpack<2,>=1.2.1
-Requires-Dist: pdfplumber<1,>=0.11.10
-Requires-Dist: PyMuPDF<2,>=1.28
+Requires-Dist: click<9,>=8.5.0
+Requires-Dist: httpx<1,>=0.28.1
+Requires-Dist: msgpack<2,>=1.2.4
 Requires-Dist: PyYAML<7,>=6.0.3
-Requires-Dist: rapidfuzz<4,>=3.14
-Requires-Dist: rich<16,>=15
-Requires-Dist: simdref-llvm-mc==23.1.4; (sys_platform == "linux" and (platform_machine == "x86_64" or platform_machine == "aarch64")) or (sys_platform == "darwin" and (platform_machine == "arm64" or platform_machine == "x86_64")) or (sys_platform == "win32" and platform_machine == "AMD64")
-Requires-Dist: textual<9,>=8.2
-Requires-Dist: typer<1,>=0.27
+Requires-Dist: rapidfuzz<4,>=3.14.6
+Requires-Dist: rich<16,>=15.0.0
+Requires-Dist: simdref-llvm-mc==23.1.4.post1; (sys_platform == "linux" and (platform_machine == "x86_64" or platform_machine == "aarch64")) or (sys_platform == "darwin" and (platform_machine == "arm64" or platform_machine == "x86_64")) or (sys_platform == "win32" and platform_machine == "AMD64")
+Requires-Dist: textual<9,>=8.2.8
+Requires-Dist: typer<1,>=0.27.3
+Provides-Extra: ingest
+Requires-Dist: pdfplumber<1,>=0.11.10; extra == "ingest"
+Requires-Dist: PyMuPDF<3,>=2.1; platform_python_implementation == "CPython" and extra == "ingest"
 Dynamic: license-file
 
 # simdref
@@ -68,8 +68,11 @@ isa            # open the TUI
 ```
 
 The package installs two equivalent executables, `isa` and `simdref`. The
-catalog download does not use `llvm-mca`. Only `isa build` uses
-`llvm-mca` 18+ on `PATH`.
+catalog download does not use `llvm-mca`. Python 3.11 or newer is
+necessary. The plain `pip install simdref` covers queries, the LSP and
+`isa update`. `isa build` uses the ingest extra:
+`pip install 'simdref[ingest]'`, or `uv tool install 'simdref[ingest]'`
+with uv. Only `isa build` uses `llvm-mca` 18+ on `PATH`.
 
 Pre-release builds live on TestPyPI:
 
@@ -86,7 +89,6 @@ isa VPADDD           # exact instruction -> detailed view
 isa _mm_add          # fuzzy -> ranked search results
 isa mm add           # tokenized query -> intrinsic-biased search
 isa ADD              # mnemonic-like -> instruction-biased search
-isa VADDPS 2         # pick variant #2 from the last result list
 isa                  # open the TUI
 ```
 
@@ -115,13 +117,13 @@ Editor clients, one for each editor:
 Each client shows a one-line brief at the end of each instruction line and
 the full manpage on hover, from the local catalog.
 
-The LLM interface writes JSON and NDJSON with exit codes 0 (match), 1 (bad
-flag), 2 (no match), 3 (ambiguous):
+The LLM interface writes JSON and NDJSON with exit codes 0 (match), 1 (usage
+error), 2 (no match or parser error), 3 (ambiguous):
 
 ```bash
-isa llm query _mm_add_ps --source-kind measured
+isa llm query vaddps --source-kind measured
 echo -e "_mm_add_ps\nVPADDD" | isa llm batch
-isa llm list --pattern "*gather*" --isa Intel
+isa llm list --pattern "*gather*"
 ```
 
 See [docs/LLM.md](docs/LLM.md) for the payload shape.
@@ -142,44 +144,54 @@ each instruction line. The output stays valid assembly.
 
 Commands
 
-| Command                 | Description                                                               |
-| ----------------------- | ------------------------------------------------------------------------- |
-| `isa`                   | Open the TUI                                                              |
-| `isa <query>`           | Open the TUI with the query in a TTY, else print ranked results to stdout |
-| `isa doctor`            | Check the install, non-zero exit on failure                               |
-| `isa update`            | Download the pre-built catalog, `--from-release` for the GitHub Release   |
-| `isa annotate <file.s>` | Annotate a `.s` file with summaries and latency/CPI, writes `<file>.sa`   |
-| `isa man <name>`        | Show a manpage, made on demand                                            |
-| `isa install-manpages`  | Pre-generate man7 pages so plain `man vpaddd` works                       |
-| `isa llm query <q>`     | Strict lookup to JSON, NDJSON, or Markdown                                |
-| `isa llm batch`         | Resolve many queries from stdin in one invocation                         |
-| `isa llm list`          | Write the FilterSpec or stream matching catalog entries                   |
-| `isa llm schema`        | Print the JSON schema for `llm` payloads                                  |
+| Command                 | Description                                                             |
+| ----------------------- | ----------------------------------------------------------------------- |
+| `isa`                   | Open the TUI                                                            |
+| `isa <query>`           | Fuzzy queries open the TUI in a TTY, else print results to stdout       |
+| `isa doctor`            | Check the install, non-zero exit on failure                             |
+| `isa update`            | Download the pre-built catalog, `--from-release` for the GitHub Release |
+| `isa annotate <file.s>` | Annotate a `.s` file with summaries and latency/CPI, writes `<file>.sa` |
+| `isa man <name>`        | Show a manpage, made on demand                                          |
+| `isa install-manpages`  | Pre-generate man7 pages so plain `man vpaddd` works                     |
+| `isa llm query <q>`     | Strict lookup to JSON, NDJSON, or Markdown                              |
+| `isa llm batch`         | Resolve many queries from stdin in one invocation                       |
+| `isa llm list`          | Write the FilterSpec or stream matching catalog entries                 |
+| `isa llm schema`        | Print the JSON schema for `llm` payloads                                |
 
 Dev commands
 
-| Command                          | Description                                             |
-| -------------------------------- | ------------------------------------------------------- |
-| `isa build`                      | Rebuild the catalog from upstream, needs `llvm-mca` 18+ |
-| `isa export`                     | Export the site-data JSON for the `simdref-web` repo    |
-| `isa completion install [SHELL]` | Install shell completion into the user profile          |
-| `isa completion show [SHELL]`    | Print the completion script                             |
+| Command                          | Description                                                                   |
+| -------------------------------- | ----------------------------------------------------------------------------- |
+| `isa build`                      | Rebuild the catalog from upstream, needs `simdref[ingest]` and `llvm-mca` 18+ |
+| `isa export`                     | Export the site-data JSON for the `simdref-web` repo                          |
+| `isa completion install [SHELL]` | Install shell completion into the user profile                                |
+| `isa completion show [SHELL]`    | Print the completion script                                                   |
 
 ## Data sources
 
-| Source                  | What                                                    | Entries¹           |
-| ----------------------- | ------------------------------------------------------- | ------------------ |
-| Intel Intrinsics Guide  | Signatures, descriptions, ISA, categories               | 7,381 intrinsics   |
-| uops.info               | Instructions, operands, latency, throughput, ports      | 2,558 instructions |
-| Arm ACLE (NEON, SVE)    | Intrinsic signatures and descriptions                   | 10,791 intrinsics  |
-| Arm AARCHMRS (A64)      | Base instruction forms and operand tables               | live-only²         |
-| riscv-rvv-intrinsic-doc | RVV intrinsics with deterministic instruction refs      | 74,289 intrinsics  |
-| RISC-V unified-db       | RVV instruction forms, ISA tags, description, operation | 672 instructions   |
+| Source                  | What                                                    | Entries¹            |
+| ----------------------- | ------------------------------------------------------- | ------------------- |
+| Intel Intrinsics Guide  | Signatures, descriptions, ISA, categories               | 7,757 intrinsics    |
+| uops.info               | Instructions, operands, latency, throughput, ports      | 22,113 instructions |
+| Arm ACLE (NEON, SVE)    | Intrinsic signatures and descriptions                   | 13,493 intrinsics   |
+| Arm AARCHMRS (A64)      | Base instruction forms and operand tables               | live-only²          |
+| riscv-rvv-intrinsic-doc | RVV intrinsics with deterministic instruction refs      | 77,285 intrinsics   |
+| RISC-V unified-db       | RVV instruction forms, ISA tags, description, operation | 3,666 instructions  |
+| NVIDIA PTX ISA          | Instruction ops, syntax, qualifiers, versions, sm_XX    | 1,088 instructions  |
+| Intel Guide perf tables | Per-core latency and throughput                         | 9,134 rows          |
+| Intel Optimization Ref. | Latency and throughput tables (volume 2)                | 3,155 rows          |
+| InstLatX64              | Measured latency and throughput dumps                   | 16,235 rows         |
+| AMD Software Opt. Guide | Latency workbooks, Zen 1 to Zen 5                       | 8,386 rows          |
+| Arm Neoverse SWOPT      | Instruction tables for 8 CPUs                           | 10,213 rows         |
 
 ¹ Counts from the vendored snapshot. See
 [`docs/coverage/summary.json`](docs/coverage/summary.json) for parity
 against upstream and [`docs/SOURCES.md`](docs/SOURCES.md) for licenses.
 
+### Removal requests
+
+Some sources in [`docs/SOURCES.md`](docs/SOURCES.md) do not state a licence. If you own one of these sources and want simdref to stop using it, open an issue at <https://github.com/simd-labs/simdref/issues>. The maintainers then remove the data and the links from the next release.
+
 ² The full AARCHMRS A64 spec needs a live fetch or a tarball under
 `vendor/arm/`.
 
@@ -187,7 +199,10 @@ Each perf row carries a `(measured, <core>)` or `(modeled, <core>)` tag.
 
 ### Scope
 
-- Performance data is x86-only.
+- Performance data covers x86, AArch64 and RISC-V. Measured rows come from
+  uops.info, InstLatX64 and the Intel Optimization Ref. Modeled rows come
+  from the Intel Intrinsics Guide, AMD and Arm vendor guides, and the LLVM
+  scheduling models.
 - RISC-V coverage is RVV only, not scalar or privileged ISA.
 
 ## Development
@@ -196,7 +211,7 @@ Each perf row carries a `(measured, <core>)` or `(modeled, <core>)` tag.
 git clone https://github.com/simd-labs/simdref.git
 cd simdref
 python3 -m venv .venv
-.venv/bin/pip install -e .
+.venv/bin/pip install -e '.[ingest]'
 .venv/bin/isa build          # needs llvm-mca 18+
 .venv/bin/python -m pytest tests/ -v
 ```

{simdref-0.0.15 → simdref-0.0.17}/README.md

@@ -33,8 +33,11 @@ isa            # open the TUI
 ```
 
 The package installs two equivalent executables, `isa` and `simdref`. The
-catalog download does not use `llvm-mca`. Only `isa build` uses
-`llvm-mca` 18+ on `PATH`.
+catalog download does not use `llvm-mca`. Python 3.11 or newer is
+necessary. The plain `pip install simdref` covers queries, the LSP and
+`isa update`. `isa build` uses the ingest extra:
+`pip install 'simdref[ingest]'`, or `uv tool install 'simdref[ingest]'`
+with uv. Only `isa build` uses `llvm-mca` 18+ on `PATH`.
 
 Pre-release builds live on TestPyPI:
 
@@ -51,7 +54,6 @@ isa VPADDD           # exact instruction -> detailed view
 isa _mm_add          # fuzzy -> ranked search results
 isa mm add           # tokenized query -> intrinsic-biased search
 isa ADD              # mnemonic-like -> instruction-biased search
-isa VADDPS 2         # pick variant #2 from the last result list
 isa                  # open the TUI
 ```
 
@@ -80,13 +82,13 @@ Editor clients, one for each editor:
 Each client shows a one-line brief at the end of each instruction line and
 the full manpage on hover, from the local catalog.
 
-The LLM interface writes JSON and NDJSON with exit codes 0 (match), 1 (bad
-flag), 2 (no match), 3 (ambiguous):
+The LLM interface writes JSON and NDJSON with exit codes 0 (match), 1 (usage
+error), 2 (no match or parser error), 3 (ambiguous):
 
 ```bash
-isa llm query _mm_add_ps --source-kind measured
+isa llm query vaddps --source-kind measured
 echo -e "_mm_add_ps\nVPADDD" | isa llm batch
-isa llm list --pattern "*gather*" --isa Intel
+isa llm list --pattern "*gather*"
 ```
 
 See [docs/LLM.md](docs/LLM.md) for the payload shape.
@@ -107,44 +109,54 @@ each instruction line. The output stays valid assembly.
 
 Commands
 
-| Command                 | Description                                                               |
-| ----------------------- | ------------------------------------------------------------------------- |
-| `isa`                   | Open the TUI                                                              |
-| `isa <query>`           | Open the TUI with the query in a TTY, else print ranked results to stdout |
-| `isa doctor`            | Check the install, non-zero exit on failure                               |
-| `isa update`            | Download the pre-built catalog, `--from-release` for the GitHub Release   |
-| `isa annotate <file.s>` | Annotate a `.s` file with summaries and latency/CPI, writes `<file>.sa`   |
-| `isa man <name>`        | Show a manpage, made on demand                                            |
-| `isa install-manpages`  | Pre-generate man7 pages so plain `man vpaddd` works                       |
-| `isa llm query <q>`     | Strict lookup to JSON, NDJSON, or Markdown                                |
-| `isa llm batch`         | Resolve many queries from stdin in one invocation                         |
-| `isa llm list`          | Write the FilterSpec or stream matching catalog entries                   |
-| `isa llm schema`        | Print the JSON schema for `llm` payloads                                  |
+| Command                 | Description                                                             |
+| ----------------------- | ----------------------------------------------------------------------- |
+| `isa`                   | Open the TUI                                                            |
+| `isa <query>`           | Fuzzy queries open the TUI in a TTY, else print results to stdout       |
+| `isa doctor`            | Check the install, non-zero exit on failure                             |
+| `isa update`            | Download the pre-built catalog, `--from-release` for the GitHub Release |
+| `isa annotate <file.s>` | Annotate a `.s` file with summaries and latency/CPI, writes `<file>.sa` |
+| `isa man <name>`        | Show a manpage, made on demand                                          |
+| `isa install-manpages`  | Pre-generate man7 pages so plain `man vpaddd` works                     |
+| `isa llm query <q>`     | Strict lookup to JSON, NDJSON, or Markdown                              |
+| `isa llm batch`         | Resolve many queries from stdin in one invocation                       |
+| `isa llm list`          | Write the FilterSpec or stream matching catalog entries                 |
+| `isa llm schema`        | Print the JSON schema for `llm` payloads                                |
 
 Dev commands
 
-| Command                          | Description                                             |
-| -------------------------------- | ------------------------------------------------------- |
-| `isa build`                      | Rebuild the catalog from upstream, needs `llvm-mca` 18+ |
-| `isa export`                     | Export the site-data JSON for the `simdref-web` repo    |
-| `isa completion install [SHELL]` | Install shell completion into the user profile          |
-| `isa completion show [SHELL]`    | Print the completion script                             |
+| Command                          | Description                                                                   |
+| -------------------------------- | ----------------------------------------------------------------------------- |
+| `isa build`                      | Rebuild the catalog from upstream, needs `simdref[ingest]` and `llvm-mca` 18+ |
+| `isa export`                     | Export the site-data JSON for the `simdref-web` repo                          |
+| `isa completion install [SHELL]` | Install shell completion into the user profile                                |
+| `isa completion show [SHELL]`    | Print the completion script                                                   |
 
 ## Data sources
 
-| Source                  | What                                                    | Entries¹           |
-| ----------------------- | ------------------------------------------------------- | ------------------ |
-| Intel Intrinsics Guide  | Signatures, descriptions, ISA, categories               | 7,381 intrinsics   |
-| uops.info               | Instructions, operands, latency, throughput, ports      | 2,558 instructions |
-| Arm ACLE (NEON, SVE)    | Intrinsic signatures and descriptions                   | 10,791 intrinsics  |
-| Arm AARCHMRS (A64)      | Base instruction forms and operand tables               | live-only²         |
-| riscv-rvv-intrinsic-doc | RVV intrinsics with deterministic instruction refs      | 74,289 intrinsics  |
-| RISC-V unified-db       | RVV instruction forms, ISA tags, description, operation | 672 instructions   |
+| Source                  | What                                                    | Entries¹            |
+| ----------------------- | ------------------------------------------------------- | ------------------- |
+| Intel Intrinsics Guide  | Signatures, descriptions, ISA, categories               | 7,757 intrinsics    |
+| uops.info               | Instructions, operands, latency, throughput, ports      | 22,113 instructions |
+| Arm ACLE (NEON, SVE)    | Intrinsic signatures and descriptions                   | 13,493 intrinsics   |
+| Arm AARCHMRS (A64)      | Base instruction forms and operand tables               | live-only²          |
+| riscv-rvv-intrinsic-doc | RVV intrinsics with deterministic instruction refs      | 77,285 intrinsics   |
+| RISC-V unified-db       | RVV instruction forms, ISA tags, description, operation | 3,666 instructions  |
+| NVIDIA PTX ISA          | Instruction ops, syntax, qualifiers, versions, sm_XX    | 1,088 instructions  |
+| Intel Guide perf tables | Per-core latency and throughput                         | 9,134 rows          |
+| Intel Optimization Ref. | Latency and throughput tables (volume 2)                | 3,155 rows          |
+| InstLatX64              | Measured latency and throughput dumps                   | 16,235 rows         |
+| AMD Software Opt. Guide | Latency workbooks, Zen 1 to Zen 5                       | 8,386 rows          |
+| Arm Neoverse SWOPT      | Instruction tables for 8 CPUs                           | 10,213 rows         |
 
 ¹ Counts from the vendored snapshot. See
 [`docs/coverage/summary.json`](docs/coverage/summary.json) for parity
 against upstream and [`docs/SOURCES.md`](docs/SOURCES.md) for licenses.
 
+### Removal requests
+
+Some sources in [`docs/SOURCES.md`](docs/SOURCES.md) do not state a licence. If you own one of these sources and want simdref to stop using it, open an issue at <https://github.com/simd-labs/simdref/issues>. The maintainers then remove the data and the links from the next release.
+
 ² The full AARCHMRS A64 spec needs a live fetch or a tarball under
 `vendor/arm/`.
 
@@ -152,7 +164,10 @@ Each perf row carries a `(measured, <core>)` or `(modeled, <core>)` tag.
 
 ### Scope
 
-- Performance data is x86-only.
+- Performance data covers x86, AArch64 and RISC-V. Measured rows come from
+  uops.info, InstLatX64 and the Intel Optimization Ref. Modeled rows come
+  from the Intel Intrinsics Guide, AMD and Arm vendor guides, and the LLVM
+  scheduling models.
 - RISC-V coverage is RVV only, not scalar or privileged ISA.
 
 ## Development
@@ -161,7 +176,7 @@ Each perf row carries a `(measured, <core>)` or `(modeled, <core>)` tag.
 git clone https://github.com/simd-labs/simdref.git
 cd simdref
 python3 -m venv .venv
-.venv/bin/pip install -e .
+.venv/bin/pip install -e '.[ingest]'
 .venv/bin/isa build          # needs llvm-mca 18+
 .venv/bin/python -m pytest tests/ -v
 ```

{simdref-0.0.15 → simdref-0.0.17}/pyproject.toml

@@ -4,10 +4,10 @@ build-backend = "setuptools.build_meta"
 
 [project]
 name = "simdref"
-version = "0.0.15"
+version = "0.0.17"
 description = "Searchable SIMD intrinsic and instruction reference with CLI, manpages, TUI, and LSP."
 readme = "README.md"
-requires-python = ">=3.10"
+requires-python = ">=3.11"
 license = {text = "GPL-3.0-or-later"}
 authors = [
   {name = "Marco"}
@@ -19,7 +19,6 @@ classifiers = [
   "License :: OSI Approved :: GNU General Public License v3 or later (GPLv3+)",
   "Operating System :: OS Independent",
   "Programming Language :: Python :: 3",
-  "Programming Language :: Python :: 3.10",
   "Programming Language :: Python :: 3.11",
   "Programming Language :: Python :: 3.12",
   "Programming Language :: Python :: 3.13",
@@ -27,27 +26,36 @@ classifiers = [
   "Topic :: Software Development :: Documentation",
   "Topic :: Software Development :: Libraries :: Python Modules",
 ]
-# `requires-python` tracks the non-EOL CPython range; 3.10 goes EOL 2026-10-31.
-# Lower dependency bound is the version CI resolves and tests; anything older is
-# an untested compatibility claim. Upper bound is the next major (next minor for
-# 0.x, where that is the compatibility unit). msgpack floors above its own
-# advisory: 1.2.0 and earlier carry GHSA-6v7p-g79w-8964.
+# `requires-python` tracks the non-EOL CPython range. Lower dependency
+# bound is the version CI resolves and tests; anything older is an untested
+# compatibility claim. Upper bound is the next major (next minor for 0.x,
+# where that is the compatibility unit). msgpack floors at 1.2.4 for
+# GHSA-j8c6-9vc5-hj6x; 1.2.0 and earlier also carry GHSA-6v7p-g79w-8964.
 dependencies = [
-  "click>=8.5,<9",
-  "httpx>=0.28,<1",
-  "msgpack>=1.2.1,<2",
-  "pdfplumber>=0.11.10,<1",
-  "PyMuPDF>=1.28,<2",
+  "click>=8.5.0,<9",
+  "httpx>=0.28.1,<1",
+  "msgpack>=1.2.4,<2",
   "PyYAML>=6.0.3,<7",
-  "rapidfuzz>=3.14,<4",
-  "rich>=15,<16",
+  "rapidfuzz>=3.14.6,<4",
+  "rich>=15.0.0,<16",
   # Pinned to the LLVM the catalog build used. Wheels exist only for
   # manylinux x86_64 aarch64, macOS arm64 x86_64 and win_amd64, so the
   # marker keeps the dependency off every other platform (musl included),
   # where pip must see no candidate instead of failing to resolve.
-  'simdref-llvm-mc==23.1.4; (sys_platform == "linux" and (platform_machine == "x86_64" or platform_machine == "aarch64")) or (sys_platform == "darwin" and (platform_machine == "arm64" or platform_machine == "x86_64")) or (sys_platform == "win32" and platform_machine == "AMD64")',
-  "textual>=8.2,<9",
-  "typer>=0.27,<1",
+  'simdref-llvm-mc==23.1.4.post1; (sys_platform == "linux" and (platform_machine == "x86_64" or platform_machine == "aarch64")) or (sys_platform == "darwin" and (platform_machine == "arm64" or platform_machine == "x86_64")) or (sys_platform == "win32" and platform_machine == "AMD64")',
+  "textual>=8.2.8,<9",
+  "typer>=0.27.3,<1",
+]
+
+[project.optional-dependencies]
+# PDF ingest for `simdref build` only. pdfplumber parses the Intel SDM;
+# PyMuPDF is its fast path. Both stay out of the plain install, which then
+# works on PyPy and needs no C toolchain.
+ingest = [
+  "pdfplumber>=0.11.10,<1",
+  # PyMuPDF (guarded import, pdfplumber falls back) pulls onnxruntime,
+  # which ships no PyPy wheels: CPython only (issue #61).
+  "PyMuPDF>=2.1,<3; platform_python_implementation == 'CPython'",
 ]
 
 [project.scripts]
@@ -63,4 +71,4 @@ where = ["src"]
 
 [tool.ruff]
 line-length = 100
-target-version = "py310"
+target-version = "py311"