siliconcompiler 0.32.3__tar.gz → 0.33.0__tar.gz

{siliconcompiler-0.32.3 → siliconcompiler-0.33.0}/Changes

@@ -8,6 +8,28 @@ The changes in each SiliconCompiler release version are described below. Commit
 version shown in (). Where applicable, the contributors that suggested a given
 feature are shown in [].
 
+SiliconCompiler 0.33.0 (2025-05-19)
+=========================================
+
+**Major:**
+
+ * Core schema infratructure rewritten to provide better testing and easier use when integration changes.
+
+**Minor:**
+
+ * Added multi-job handling to command line dashboard and corrected handling of coloring in the log.
+ * Updated help, scopes, and default values in various keys int he schema.
+ * Allow packages to reference keys as data source.
+ * Speedup load time by selective loading large libraries.
+ * Added caching to flowgraph node handling to speed up common use cases.
+
+ * Tools:
+
+  * openroad: added gif of IR drop
+  * yosys: improved yosys-slang integration
+  * sv2v: allow runtime bypass via `['tool', 'sv2v', 'task', 'convert', 'var', 'skip_convert'] = True`.
+
+
 SiliconCompiler 0.32.3 (2025-04-11)
 =========================================
 

{siliconcompiler-0.32.3 → siliconcompiler-0.33.0}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: siliconcompiler
-Version: 0.32.3
+Version: 0.33.0
 Summary: A compiler framework that automates translation from source code to silicon.
 Author-email: Andreas Olofsson <andreas.d.olofsson@gmail.com>
 License: Apache License 2.0
@@ -26,7 +26,7 @@ Requires-Python: >=3.8
 Description-Content-Type: text/markdown
 License-File: LICENSE
 Requires-Dist: aiohttp==3.10.11; python_version <= "3.8"
-Requires-Dist: aiohttp==3.11.16; python_version >= "3.9"
+Requires-Dist: aiohttp<3.12.0,>=3.10.11; python_version >= "3.9"
 Requires-Dist: requests==2.32.3
 Requires-Dist: PyYAML==6.0.2
 Requires-Dist: pandas>=1.1.5
@@ -36,7 +36,7 @@ Requires-Dist: distro==1.9.0
 Requires-Dist: packaging<25,>=21.3
 Requires-Dist: psutil>=5.8.0
 Requires-Dist: Pillow==10.4.0; python_version <= "3.8"
-Requires-Dist: Pillow==11.1.0; python_version >= "3.9"
+Requires-Dist: Pillow==11.2.1; python_version >= "3.9"
 Requires-Dist: GitPython==3.1.44
 Requires-Dist: lambdapdk>=0.1.47
 Requires-Dist: PyGithub==2.6.1
@@ -46,19 +46,20 @@ Requires-Dist: fastjsonschema==2.21.1
 Requires-Dist: docker==7.1.0
 Requires-Dist: importlib_metadata; python_version < "3.10"
 Requires-Dist: orjson==3.10.15; python_version <= "3.8"
-Requires-Dist: orjson==3.10.16; python_version >= "3.9"
+Requires-Dist: orjson==3.10.18; python_version >= "3.9"
 Requires-Dist: pyslang==8.0.0
 Requires-Dist: streamlit==1.40.1; python_version <= "3.8"
-Requires-Dist: streamlit==1.44.1; python_version >= "3.9" and python_full_version != "3.9.7"
+Requires-Dist: streamlit==1.45.0; python_version >= "3.9" and python_full_version != "3.9.7"
 Requires-Dist: streamlit_agraph==0.0.45; python_full_version != "3.9.7"
 Requires-Dist: streamlit-antd-components==0.3.2; python_full_version != "3.9.7"
 Requires-Dist: streamlit_javascript==0.1.5; python_full_version != "3.9.7"
 Requires-Dist: streamlit-autorefresh==1.0.1; python_full_version != "3.9.7"
-Requires-Dist: rich==13.9.4
+Requires-Dist: rich==13.9.4; python_version <= "3.8"
+Requires-Dist: rich<15.0.0,>=14.0.0; python_version >= "3.9"
 Provides-Extra: test
 Requires-Dist: pytest==8.3.5; extra == "test"
 Requires-Dist: pytest-xdist==3.6.1; extra == "test"
-Requires-Dist: pytest-timeout==2.3.1; extra == "test"
+Requires-Dist: pytest-timeout==2.4.0; extra == "test"
 Requires-Dist: pytest-asyncio==0.24.0; python_version <= "3.8" and extra == "test"
 Requires-Dist: pytest-asyncio==0.26.0; python_version >= "3.9" and extra == "test"
 Requires-Dist: pytest-cov==5.0.0; python_version <= "3.8" and extra == "test"
@@ -76,7 +77,7 @@ Requires-Dist: pip-licenses==5.0.0; extra == "docs"
 Requires-Dist: pydata-sphinx-theme==0.16.1; extra == "docs"
 Requires-Dist: sc-leflib>=0.2.0; extra == "docs"
 Provides-Extra: profile
-Requires-Dist: gprof2dot==2024.6.6; extra == "profile"
+Requires-Dist: gprof2dot==2025.4.14; extra == "profile"
 Provides-Extra: optimizer
 Requires-Dist: google-vizier[jax]==0.1.21; python_version >= "3.10" and extra == "optimizer"
 Dynamic: license-file

{siliconcompiler-0.32.3 → siliconcompiler-0.33.0}/pyproject.toml

@@ -33,7 +33,7 @@ classifiers = [
 requires-python = ">= 3.8"
 dependencies = [
     "aiohttp == 3.10.11; python_version <= '3.8'",
-    "aiohttp == 3.11.16; python_version >= '3.9'",
+    "aiohttp >= 3.10.11, <3.12.0; python_version >= '3.9'",
     "requests == 2.32.3",
     "PyYAML == 6.0.2",
     "pandas >= 1.1.5",
@@ -43,7 +43,7 @@ dependencies = [
     "packaging >= 21.3, < 25",
     "psutil >= 5.8.0",
     "Pillow == 10.4.0; python_version <= '3.8'",
-    "Pillow == 11.1.0; python_version >= '3.9'",
+    "Pillow == 11.2.1; python_version >= '3.9'",
     "GitPython == 3.1.44",
     "lambdapdk >= 0.1.47",
     "PyGithub == 2.6.1",
@@ -53,19 +53,20 @@ dependencies = [
     "docker == 7.1.0",
     "importlib_metadata; python_version < '3.10'",
     "orjson == 3.10.15; python_version <= '3.8'",
-    "orjson == 3.10.16; python_version >= '3.9'",
+    "orjson == 3.10.18; python_version >= '3.9'",
     "pyslang == 8.0.0",
 
     # dashboard, streamlit does not support 3.9.7
     "streamlit == 1.40.1; python_version <= '3.8'",
-    "streamlit == 1.44.1; python_version >= '3.9' and python_full_version != '3.9.7'",
+    "streamlit == 1.45.0; python_version >= '3.9' and python_full_version != '3.9.7'",
     "streamlit_agraph == 0.0.45; python_full_version != '3.9.7'",
     "streamlit-antd-components == 0.3.2; python_full_version != '3.9.7'",
     "streamlit_javascript == 0.1.5; python_full_version != '3.9.7'",
     "streamlit-autorefresh == 1.0.1; python_full_version != '3.9.7'",
 
     # CLI dashboard
-    "rich == 13.9.4"
+    "rich == 13.9.4; python_version <= '3.8'",
+    "rich >= 14.0.0, < 15.0.0; python_version >= '3.9'"
 ]
 license = {text = "Apache License 2.0"}
 dynamic = ["version"]
@@ -100,20 +101,20 @@ git = "siliconcompiler.package.git:get_resolver"
 github = "siliconcompiler.package.github:get_resolver"
 
 [project.entry-points."siliconcompiler.docs"]
-linkcode = "siliconcompiler.sphinx_ext:get_codeurl"
-targets = "siliconcompiler.sphinx_ext:targets"
-flows = "siliconcompiler.sphinx_ext:flows"
-libs = "siliconcompiler.sphinx_ext:libraries"
-pdks = "siliconcompiler.sphinx_ext:pdks"
-tools = "siliconcompiler.sphinx_ext:tools"
-apps = "siliconcompiler.sphinx_ext:apps"
-checklists = "siliconcompiler.sphinx_ext:checklists"
+linkcode = "siliconcompiler.schema.docs:get_codeurl"
+targets = "siliconcompiler.schema.docs:targets"
+flows = "siliconcompiler.schema.docs:flows"
+libs = "siliconcompiler.schema.docs:libraries"
+pdks = "siliconcompiler.schema.docs:pdks"
+tools = "siliconcompiler.schema.docs:tools"
+apps = "siliconcompiler.schema.docs:apps"
+checklists = "siliconcompiler.schema.docs:checklists"
 
 [project.optional-dependencies]
 test = [
     "pytest == 8.3.5",
     "pytest-xdist == 3.6.1",
-    "pytest-timeout == 2.3.1",
+    "pytest-timeout == 2.4.0",
     "pytest-asyncio == 0.24.0; python_version <= '3.8'",
     "pytest-asyncio == 0.26.0; python_version >= '3.9'",
     "pytest-cov == 5.0.0; python_version <= '3.8'",
@@ -134,7 +135,7 @@ docs = [
     "sc-leflib >= 0.2.0"
 ]
 profile = [
-    "gprof2dot == 2024.6.6"
+    "gprof2dot == 2025.4.14"
 ]
 optimizer = [
     "google-vizier[jax] == 0.1.21; python_version >= '3.10'"
@@ -183,7 +184,7 @@ max-blank-lines = 1
 spaces-in-braces = true
 
 [tool.codespell]
-skip = './build/*,*.json,*.xml,./siliconcompiler/templates/report/bootstrap.min.js,./tests/utils/test_utils.py,./tests/tools/data/klayout_pdk/interposer.drc'
+skip = '*/build/*,./docs/_build/*,*.json,*.xml,./siliconcompiler/data/templates/report/bootstrap.min.js,./tests/utils/test_utils.py,./tests/tools/data/klayout_pdk/interposer.drc'
 count = true
 quiet-level = 3
 ignore-words-list = 'synopsys,inout,subtile,FRAM,dffer,dffers'

{siliconcompiler-0.32.3 → siliconcompiler-0.33.0}/scripts/profile_sc.py

@@ -1,6 +1,6 @@
 #!/usr/bin/env python3
 
-from siliconcompiler import Chip
+from siliconcompiler import Chip, Flow
 import cProfile
 import pstats
 from pstats import SortKey
@@ -121,6 +121,41 @@ def run_asic_demo(pr, extra):
     pr.disable()
 
 
+def run_large_flowgraph(pr, extra):
+    from siliconcompiler.tools.builtin import nop
+
+    try:
+        simulations = int(extra)
+    except (ValueError, TypeError):
+        simulations = 50
+
+    print(f'Setting up {2 + 2 * simulations} nodes')
+
+    flow_name = 'large_flowgraph'
+
+    pr.enable()
+    chip = Chip('test')
+    flow = Flow(flow_name)
+    chip.set('option', 'flow', flow_name)
+
+    flow.node(flow_name, 'comp', nop)
+    flow.node(flow_name, 'elab', nop)
+    flow.edge(flow_name, tail='comp', head='elab')
+
+    for i in range(simulations):
+        flow.node(flow_name, step='pre_sim', task=nop, index=i)
+
+    for i in range(simulations):
+        flow.node(flow_name, step='sim', task=nop, index=i)
+        flow.edge(flow_name, tail='pre_sim', head='sim', tail_index=i, head_index=i)
+        flow.edge(flow_name, tail='elab', head='sim', tail_index=0, head_index=i)
+
+    chip.use(flow)
+
+    chip.run()
+    pr.disable()
+
+
 if __name__ == "__main__":
     tests = {
         'read_manifest': run_read_manifest,
@@ -129,6 +164,7 @@ if __name__ == "__main__":
         'load_target': run_load_target,
         'asic_demo': run_asic_demo,
         'check_filepaths': run_check_filepaths,
+        'large_flowgraph': run_large_flowgraph,
         'all': None
     }
 

siliconcompiler-0.33.0/siliconcompiler/__init__.py

@@ -0,0 +1,41 @@
+from siliconcompiler._common import NodeStatus, SiliconCompilerError
+
+from siliconcompiler.utils import sc_open
+from siliconcompiler.schema_obj import SchemaTmp as Schema
+
+from siliconcompiler.record import RecordSchema
+from siliconcompiler.metric import MetricSchema
+from siliconcompiler.pdk import PDKSchema
+from siliconcompiler.flowgraph import FlowgraphSchema
+from siliconcompiler.tool import ToolSchema
+from siliconcompiler.checklist import ChecklistSchema
+from siliconcompiler.asic import ASICSchema
+from siliconcompiler.fpga import FPGASchema
+
+from siliconcompiler.core import Chip
+
+from siliconcompiler._metadata import version as __version__
+
+from siliconcompiler.use import PDK, FPGA, Library, Flow, Checklist
+
+__all__ = [
+    "__version__",
+    "Chip",
+    "SiliconCompilerError",
+    "NodeStatus",
+    "PDK",
+    "FPGA",
+    "Library",
+    "Flow",
+    "Checklist",
+    "Schema",
+    "sc_open",
+    "RecordSchema",
+    "MetricSchema",
+    "PDKSchema",
+    "FlowgraphSchema",
+    "ToolSchema",
+    "ChecklistSchema",
+    "ASICSchema",
+    "FPGASchema"
+]

{siliconcompiler-0.32.3 → siliconcompiler-0.33.0}/siliconcompiler/_metadata.py

@@ -1,5 +1,5 @@
 # Version number following semver standard.
-version = '0.32.3'
+version = '0.33.0'
 
 # Default server address for remote runs, if unspecified.
 default_server = 'https://server.siliconcompiler.com'

{siliconcompiler-0.32.3 → siliconcompiler-0.33.0}/siliconcompiler/apps/sc.py

@@ -12,14 +12,14 @@ from siliconcompiler import SiliconCompilerError
 
 def _infer_designname(chip):
     topfile = None
-    sourcesets = chip.getkeys('input')
+    sourcesets = list(chip.getkeys('input'))
     for sourceset in reversed(('rtl', 'hll')):
         if sourceset in sourcesets:
             sourcesets.remove(sourceset)
             sourcesets.insert(0, sourceset)
     for sourceset in sourcesets:
         for filetype in chip.getkeys('input', sourceset):
-            all_vals = chip.schema._getvals('input', sourceset, filetype)
+            all_vals = chip.schema.get('input', sourceset, filetype, field=None).getvalues()
             if all_vals:
                 # just look at first value
                 sources, _, _ = all_vals[0]

{siliconcompiler-0.32.3 → siliconcompiler-0.33.0}/siliconcompiler/apps/sc_install.py

@@ -10,7 +10,7 @@ import os.path
 from collections.abc import Container
 from pathlib import Path
 import siliconcompiler
-from siliconcompiler.scheduler import _get_machine_info
+from siliconcompiler import RecordSchema
 
 
 class ChoiceOptional(Container):
@@ -71,7 +71,7 @@ def show_tool(tool, script):
 
 
 def _get_os_name():
-    machine_info = _get_machine_info()
+    machine_info = RecordSchema.get_machine_information()
     system = machine_info.get('system', "").lower()
     if system == 'linux':
         distro = machine_info.get('distro', "").lower()
@@ -91,7 +91,7 @@ def _get_os_name():
 
 
 def print_machine_info():
-    machine_info = _get_machine_info()
+    machine_info = RecordSchema.get_machine_information()
     mapped_os = _get_os_name()
 
     print("System:   ", machine_info.get('system', None))

{siliconcompiler-0.32.3 → siliconcompiler-0.33.0}/siliconcompiler/apps/sc_issue.py

@@ -5,7 +5,7 @@ import siliconcompiler
 import tarfile
 import json
 from siliconcompiler.scheduler import _runtask, _executenode
-from siliconcompiler.issue import generate_testcase
+from siliconcompiler.utils.issue import generate_testcase
 from siliconcompiler.tools._common import get_tool_task
 
 

{siliconcompiler-0.32.3 → siliconcompiler-0.33.0}/siliconcompiler/apps/sc_remote.py

@@ -6,8 +6,7 @@ from siliconcompiler import Chip
 from siliconcompiler import SiliconCompilerError
 from siliconcompiler.remote.client import Client, ConfigureClient
 from siliconcompiler.scheduler import _finalize_run
-from siliconcompiler.flowgraph import _get_flowgraph_entry_nodes, _get_flowgraph_node_outputs, \
-    nodes_to_execute
+from siliconcompiler.utils.flowgraph import nodes_to_execute
 
 
 def main():
@@ -158,9 +157,10 @@ To delete a job, use:
     elif args['reconnect']:
         # Start from successors of entry nodes, so entry nodes are not fetched from remote.
         flow = chip.get('option', 'flow')
-        entry_nodes = _get_flowgraph_entry_nodes(chip, flow)
+        entry_nodes = chip.schema.get("flowgraph", flow, field="schema").get_entry_nodes()
         for entry_node in entry_nodes:
-            outputs = _get_flowgraph_node_outputs(chip, flow, entry_node)
+            outputs = chip.schema.get("flowgraph", flow,
+                                      field='schema').get_node_outputs(*entry_node)
             chip.set('option', 'from', list(map(lambda node: node[0], outputs)))
         # Enter the remote run loop.
         try:

{siliconcompiler-0.32.3 → siliconcompiler-0.33.0}/siliconcompiler/apps/sc_show.py

@@ -84,7 +84,7 @@ def main():
     input_mode = []
     for fileset in chip.getkeys('input'):
         for mode in chip.getkeys('input', fileset):
-            if chip.schema._getvals('input', fileset, mode):
+            if chip.schema.get('input', fileset, mode, field=None).getvalues():
                 input_mode = [('input', fileset, mode)]
 
     filename = None
@@ -97,7 +97,7 @@ def main():
         def get_file_from_keys():
             for ext in check_ext:
                 for key in input_mode:
-                    for files, _, _ in chip.schema._getvals(*key):
+                    for files, _, _ in chip.schema.get(*key, field=None).getvalues():
                         for file in files:
                             if get_file_ext(file) == ext:
                                 return file

{siliconcompiler-0.32.3 → siliconcompiler-0.33.0}/siliconcompiler/apps/utils/replay.py

@@ -86,7 +86,8 @@ def main():
 
     pythonversion = set()
     nodes = set()
-    for version, step, index in chip.schema._getvals('history', jobname, 'record', 'pythonversion'):
+    for version, step, index in chip.schema.get('history', jobname, 'record', 'pythonversion',
+                                                field=None).getvalues():
         pythonversion.add(version)
         nodes.add((step, index))
 
@@ -127,7 +128,8 @@ def main():
     os.makedirs(os.path.dirname(path), exist_ok=True)
 
     starttimes = set()
-    for starttime, step, index in chip.schema._getvals('history', jobname, 'record', 'starttime'):
+    for starttime, step, index in chip.schema.get('history', jobname, 'record', 'starttime',
+                                                  field=None).getvalues():
         starttimes.add(datetime.strptime(starttime, '%Y-%m-%d %H:%M:%S'))
     starttime = min(starttimes).strftime('%Y-%m-%d %H:%M:%S')
 
@@ -162,7 +164,7 @@ def main():
         fd.flush()
         script = convert_base64(compress(fd.getvalue()))
 
-    manifest = convert_base64(compress(json.dumps(chip.schema.cfg, indent=2)))
+    manifest = convert_base64(compress(json.dumps(chip.schema.getdict(), indent=2)))
 
     tool_info = []
     for tool, version in tools.items():

siliconcompiler-0.33.0/siliconcompiler/asic.py

@@ -0,0 +1,120 @@
+from siliconcompiler.schema import BaseSchema
+from siliconcompiler.schema import EditableSchema, Parameter, PerNode, Scope
+from siliconcompiler.schema.utils import trim
+
+
+class ASICSchema(BaseSchema):
+    def __init__(self):
+        super().__init__()
+
+        schema_asic(self)
+
+
+###############################################################################
+# ASIC
+###############################################################################
+def schema_asic(schema):
+    schema = EditableSchema(schema)
+
+    schema.insert(
+        'logiclib',
+        Parameter(
+            '[str]',
+            scope=Scope.JOB,
+            pernode=PerNode.OPTIONAL,
+            shorthelp="ASIC: logic libraries",
+            switch="-asic_logiclib <str>",
+            example=["cli: -asic_logiclib nangate45",
+                     "api: chip.set('asic', 'logiclib', 'nangate45')"],
+            help=trim("""List of all selected logic libraries libraries
+            to use for optimization for a given library architecture
+            (9T, 11T, etc).""")))
+
+    schema.insert(
+        'macrolib',
+        Parameter(
+            '[str]',
+            scope=Scope.JOB,
+            pernode=PerNode.OPTIONAL,
+            shorthelp="ASIC: macro libraries",
+            switch="-asic_macrolib <str>",
+            example=["cli: -asic_macrolib sram64x1024",
+                     "api: chip.set('asic', 'macrolib', 'sram64x1024')"],
+            help=trim("""
+            List of macro libraries to be linked in during synthesis and place
+            and route. Macro libraries are used for resolving instances but are
+            not used as targets for logic synthesis.""")))
+
+    schema.insert(
+        'delaymodel',
+        Parameter(
+            'str',
+            scope=Scope.JOB,
+            pernode=PerNode.OPTIONAL,
+            shorthelp="ASIC: delay model",
+            switch="-asic_delaymodel <str>",
+            example=["cli: -asic_delaymodel ccs",
+                     "api: chip.set('asic', 'delaymodel', 'ccs')"],
+            help=trim("""
+            Delay model to use for the target libs. Commonly supported values
+            are nldm and ccs.""")))
+
+    # TODO: Expand on the exact definitions of these types of cells.
+    # minimize typing
+    names = ['decap',
+             'tie',
+             'hold',
+             'clkbuf',
+             'clkgate',
+             'clklogic',
+             'dontuse',
+             'filler',
+             'tap',
+             'endcap',
+             'antenna']
+
+    for item in names:
+        schema.insert(
+            'cells', item,
+            Parameter(
+                '[str]',
+                pernode=PerNode.OPTIONAL,
+                shorthelp=f"ASIC: {item} cell list",
+                switch=f"-asic_cells_{item} '<str>'",
+                example=[
+                    f"cli: -asic_cells_{item} '*eco*'",
+                    f"api: chip.set('asic', 'cells', '{item}', '*eco*')"],
+                help=trim("""
+                List of cells grouped by a property that can be accessed
+                directly by the designer and tools. The example below shows how
+                all cells containing the string 'eco' could be marked as dont use
+                for the tool.""")))
+
+    schema.insert(
+        'libarch',
+        Parameter(
+            'str',
+            pernode=PerNode.OPTIONAL,
+            shorthelp="ASIC: library architecture",
+            switch="-asic_libarch '<str>'",
+            example=[
+                "cli: -asic_libarch '12track'",
+                "api: chip.set('asic', 'libarch', '12track')"],
+            help=trim("""
+            The library architecture (e.g. library height) used to build the
+            design. For example a PDK with support for 9 and 12 track libraries
+            might have 'libarchs' called 9t and 12t.""")))
+
+    libarch = 'default'
+    schema.insert(
+        'site', libarch,
+        Parameter(
+            '[str]',
+            pernode=PerNode.OPTIONAL,
+            shorthelp="ASIC: library sites",
+            switch="-asic_site 'libarch <str>'",
+            example=[
+                "cli: -asic_site '12track Site_12T'",
+                "api: chip.set('asic', 'site', '12track', 'Site_12T')"],
+            help=trim("""
+            Site names for a given library architecture.""")))