siliconcompiler 0.28.4__tar.gz → 0.28.5__tar.gz

{siliconcompiler-0.28.4 → siliconcompiler-0.28.5}/Changes

@@ -8,6 +8,25 @@ The changes in each SiliconCompiler release version are described below. Commit
 version shown in (). Where applicable, the contributors that suggested a given
 feature are shown in [].
 
+SiliconCompiler 0.28.5 (2024-11-06)
+=========================================
+
+**Major:**
+
+ * Added interposer_demo target and interposerflow and drcflow.
+
+**Minor:**
+
+ * Added macroarea, padcellarea, and stdcellarea to metrics.
+ * Added footprint to datasheet in schema.
+ * Improved handling of `sc-show` and `sc-dashboard` when searching for manifests.
+
+ * Tools:
+
+  * openroad: added metrics task to collect metrics and an rdlroute task to perform floorplan initization and rdlrouting.
+  * klayout: fixed handling of fill during GDS generation.
+
+
 SiliconCompiler 0.28.4 (2024-10-28)
 =========================================
 

{siliconcompiler-0.28.4 → siliconcompiler-0.28.5}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.1
 Name: siliconcompiler
-Version: 0.28.4
+Version: 0.28.5
 Summary: A compiler framework that automates translation from source code to silicon.
 Author-email: Andreas Olofsson <andreas.d.olofsson@gmail.com>
 License: Apache License 2.0
@@ -36,7 +36,7 @@ Requires-Dist: packaging<24,>=21.3
 Requires-Dist: psutil>=5.8.0
 Requires-Dist: Pillow==10.4.0
 Requires-Dist: GitPython==3.1.43
-Requires-Dist: lambdapdk>=0.1.34
+Requires-Dist: lambdapdk>=0.1.38
 Requires-Dist: PyGithub==2.4.0
 Requires-Dist: urllib3>=1.26.0
 Requires-Dist: fasteners==0.19
@@ -44,7 +44,7 @@ Requires-Dist: fastjsonschema==2.20.0
 Requires-Dist: docker==7.1.0
 Requires-Dist: importlib_metadata; python_version < "3.10"
 Requires-Dist: sc-surelog==1.84.1
-Requires-Dist: orjson==3.10.10
+Requires-Dist: orjson==3.10.11
 Requires-Dist: streamlit==1.39.0
 Requires-Dist: streamlit_agraph==0.0.45
 Requires-Dist: streamlit-antd-components==0.3.2
@@ -70,7 +70,7 @@ Provides-Extra: profile
 Requires-Dist: gprof2dot==2024.6.6; extra == "profile"
 Provides-Extra: examples
 Requires-Dist: migen==0.9.2; extra == "examples"
-Requires-Dist: lambdalib==0.2.10; extra == "examples"
+Requires-Dist: lambdalib==0.3.0; extra == "examples"
 
 ![SiliconCompiler](https://raw.githubusercontent.com/siliconcompiler/siliconcompiler/main/docs/_static/sc_logo_with_text.png)
 

{siliconcompiler-0.28.4 → siliconcompiler-0.28.5}/pyproject.toml

@@ -43,7 +43,7 @@ dependencies = [
     "psutil >= 5.8.0",
     "Pillow == 10.4.0",
     "GitPython == 3.1.43",
-    "lambdapdk >= 0.1.34",
+    "lambdapdk >= 0.1.38",
     "PyGithub == 2.4.0",
     "urllib3 >= 1.26.0", # Required for PyGithub
     "fasteners == 0.19",
@@ -51,7 +51,7 @@ dependencies = [
     "docker == 7.1.0",
     "importlib_metadata; python_version < '3.10'",
     "sc-surelog == 1.84.1",
-    "orjson == 3.10.10",
+    "orjson == 3.10.11",
     "streamlit == 1.39.0",
     "streamlit_agraph == 0.0.45",
     "streamlit-antd-components == 0.3.2",
@@ -106,7 +106,7 @@ profile = [
 ]
 examples = [
     "migen == 0.9.2",
-    "lambdalib == 0.2.10"
+    "lambdalib == 0.3.0"
 ]
 
 [tool.setuptools]

{siliconcompiler-0.28.4 → siliconcompiler-0.28.5}/scripts/report_library.py

@@ -1,14 +1,22 @@
 from siliconcompiler import Chip
 from siliconcompiler.tools.opensta import report_libraries
 
-if __name__ == "__main__":
+
+def main():
     chip = Chip('report_libs')
-    chip.create_cmdline(switchlist=['-target'])
+    args = chip.create_cmdline(switchlist=['-target'])
 
-    if not chip.get('option', 'target'):
+    if 'target' not in args or not args['target']:
         raise ValueError('-target is required')
 
     chip.node('report_lib', 'report', report_libraries)
     chip.set('option', 'flow', 'report_lib')
+    chip.set('option', 'clean', True)
 
     chip.run()
+
+    return 0
+
+
+if __name__ == "__main__":
+    main()

{siliconcompiler-0.28.4 → siliconcompiler-0.28.5}/siliconcompiler/_metadata.py

@@ -1,5 +1,5 @@
 # Version number following semver standard.
-version = '0.28.4'
+version = '0.28.5'
 
 # Default server address for remote runs, if unspecified.
 default_server = 'https://server.siliconcompiler.com'

siliconcompiler-0.28.5/siliconcompiler/apps/_common.py

@@ -0,0 +1,108 @@
+import os
+
+
+# TODO: this is a hack to get around design name requirement: since legal
+# design names probably can't contain spaces, we can detect if it is unset.
+UNSET_DESIGN = '  unset  '
+
+
+def manifest_switches():
+    '''
+    Returns a list of manifest switches that can be used
+    to find the manifest based on their values
+    '''
+    return ['-design',
+            '-cfg',
+            '-arg_step',
+            '-arg_index',
+            '-jobname']
+
+
+def _get_manifests(cwd):
+    manifests = {}
+
+    def get_dirs(cwd):
+        dirs = []
+        for dirname in os.listdir(cwd):
+            fullpath = os.path.join(cwd, dirname)
+            if os.path.isdir(fullpath):
+                dirs.append((dirname, fullpath))
+        return dirs
+
+    for _, buildpath in get_dirs(cwd):
+        for design, designdir in get_dirs(buildpath):
+            for jobname, jobdir in get_dirs(designdir):
+                manifest = os.path.join(jobdir, f'{design}.pkg.json')
+                if os.path.isfile(manifest):
+                    manifests[(design, jobname, None, None)] = manifest
+                for step, stepdir in get_dirs(jobdir):
+                    for index, indexdir in get_dirs(stepdir):
+                        manifest = os.path.join(indexdir, 'outputs', f'{design}.pkg.json')
+                        if os.path.isfile(manifest):
+                            manifests[(design, jobname, step, index)] = manifest
+                        else:
+                            manifest = os.path.join(indexdir, 'inputs', f'{design}.pkg.json')
+                            if os.path.isfile(manifest):
+                                manifests[(design, jobname, step, index)] = manifest
+
+    organized_manifest = {}
+    for (design, job, step, index), manifest in manifests.items():
+        jobs = organized_manifest.setdefault(design, {})
+        jobs.setdefault(job, {})[step, index] = os.path.abspath(manifest)
+
+    return organized_manifest
+
+
+def pick_manifest_from_file(chip, src_file, all_manifests):
+    if src_file is None:
+        return None
+
+    if not os.path.exists(src_file):
+        chip.logger.error(f'{src_file} cannot be found.')
+        return None
+
+    src_dir = os.path.abspath(os.path.dirname(src_file))
+    for _, jobs in all_manifests.items():
+        for _, nodes in jobs.items():
+            for manifest in nodes.values():
+                if src_dir == os.path.dirname(manifest):
+                    return manifest
+
+    return None
+
+
+def pick_manifest(chip, src_file=None):
+    all_manifests = _get_manifests(os.getcwd())
+
+    manifest = pick_manifest_from_file(chip, src_file, all_manifests)
+    if manifest:
+        return manifest
+
+    if chip.design == UNSET_DESIGN:
+        if len(all_manifests) == 1:
+            chip.set('design', list(all_manifests.keys())[0])
+        else:
+            chip.logger.error('Design name is not set')
+            return None
+
+    if chip.design not in all_manifests:
+        chip.logger.error(f'Could not find manifest for {chip.design}')
+        return None
+
+    if chip.get('option', 'jobname') not in all_manifests[chip.design] and \
+            len(all_manifests[chip.design]) != 1:
+        chip.logger.error(f'Could not determine jobname for {chip.design}')
+        return None
+
+    jobname = chip.get('option', 'jobname')
+    if chip.get('option', 'jobname') not in all_manifests[chip.design]:
+        jobname = list(all_manifests[chip.design].keys())[0]
+
+    if (None, None) in all_manifests[chip.design][jobname]:
+        manifest = all_manifests[chip.design][jobname][None, None]
+    else:
+        # pick newest manifest
+        manifest = list(sorted(all_manifests[chip.design][jobname].values(),
+                               key=lambda file: os.stat(file).st_ctime))[-1]
+
+    return manifest

{siliconcompiler-0.28.4 → siliconcompiler-0.28.5}/siliconcompiler/apps/sc.py

@@ -10,6 +10,37 @@ from siliconcompiler.targets import skywater130_demo
 from siliconcompiler import SiliconCompilerError
 
 
+def _infer_designname(chip):
+    topfile = None
+    sourcesets = chip.getkeys('input')
+    for sourceset in reversed(('rtl', 'hll')):
+        if sourceset in sourcesets:
+            sourcesets.remove(sourceset)
+            sourcesets.insert(0, sourceset)
+    for sourceset in sourcesets:
+        for filetype in chip.getkeys('input', sourceset):
+            all_vals = chip.schema._getvals('input', sourceset, filetype)
+            if all_vals:
+                # just look at first value
+                sources, _, _ = all_vals[0]
+                # grab first source
+                topfile = sources[0]
+                break
+        if topfile:
+            break
+
+    if not topfile:
+        return None
+
+    root = os.path.basename(topfile)
+    while True:
+        root, ext = os.path.splitext(root)
+        if not ext:
+            break
+
+    return root
+
+
 ###########################
 def main():
     progname = "sc"
@@ -50,24 +81,12 @@ def main():
 
     # Set design if none specified
     if chip.get('design') == UNSET_DESIGN:
-        topfile = None
-        for sourceset in ('rtl', 'hll'):
-            for filetype in chip.getkeys('input', sourceset):
-                all_vals = chip.schema._getvals('input', sourceset, filetype)
-                if all_vals:
-                    # just look at first value
-                    sources, _, _ = all_vals[0]
-                    # grab first source
-                    topfile = sources[0]
-                    break
-            if topfile:
-                break
+        topmodule = _infer_designname(chip)
 
-        if not topfile:
+        if not topmodule:
             chip.logger.error('Invalid arguments: either specify -design or provide sources.')
             return 1
 
-        topmodule = os.path.splitext(os.path.basename(topfile))[0]
         chip.set('design', topmodule)
 
     # Set demo target if none specified

{siliconcompiler-0.28.4 → siliconcompiler-0.28.5}/siliconcompiler/apps/sc_dashboard.py

@@ -2,7 +2,7 @@
 import sys
 import siliconcompiler
 import os
-from siliconcompiler.apps._common import load_manifest, manifest_switches
+from siliconcompiler.apps._common import pick_manifest, manifest_switches, UNSET_DESIGN
 
 
 def main():
@@ -11,9 +11,16 @@ def main():
 -----------------------------------------------------------
 SC app to open a dashboard for a given manifest.
 
-To open:
+To open and allow sc-dashboard to autoload manifest:
+    sc-dashboard
+
+To open by specifying manifest:
     sc-dashboard -cfg <path to manifest>
 
+To open by specifying design and optionally jobname:
+    sc-dashboard -design <name>
+    sc-dashboard -design <name> -jobname <jobname>
+
 To specify a different port than the default:
     sc-dashboard -cfg <path to manifest> -port 10000
 
@@ -23,10 +30,6 @@ To include another chip object to compare to:
 -----------------------------------------------------------
 """
 
-    # TODO: this is a hack to get around design name requirement: since legal
-    # design names probably can't contain spaces, we can detect if it is unset.
-    UNSET_DESIGN = '  unset  '
-
     # Create a base chip class.
     chip = siliconcompiler.Chip(UNSET_DESIGN)
 
@@ -54,15 +57,19 @@ To include another chip object to compare to:
         chip.logger.error(e)
         return 1
 
+    if not chip.get('option', 'cfg'):
+        manifest = pick_manifest(chip)
+
+        if manifest:
+            chip.logger.info(f'Loading manifest: {manifest}')
+            chip.read_manifest(manifest)
+
     # Error checking
     design = chip.get('design')
     if design == UNSET_DESIGN:
         chip.logger.error('Design not loaded')
         return 1
 
-    if not load_manifest(chip, None):
-        return 1
-
     graph_chips = []
     if switches['graph_cfg']:
         for i, name_and_file_path in enumerate(switches['graph_cfg']):

{siliconcompiler-0.28.4 → siliconcompiler-0.28.5}/siliconcompiler/apps/sc_show.py

@@ -3,7 +3,7 @@ import sys
 import os
 import siliconcompiler
 from siliconcompiler.utils import get_default_iomap
-from siliconcompiler.apps._common import load_manifest, manifest_switches
+from siliconcompiler.apps._common import manifest_switches, pick_manifest, UNSET_DESIGN
 from siliconcompiler.utils import get_file_ext
 
 
@@ -18,6 +18,9 @@ def main():
 
     Examples:
 
+    sc-show
+    (displays build/adder/job0/write_gds/0/outputs/adder.gds)
+
     sc-show -design adder
     (displays build/adder/job0/write_gds/0/outputs/adder.gds)
 
@@ -40,10 +43,6 @@ def main():
     (displays build/adder/job0/route/1/outputs/adder.def)
     """
 
-    # TODO: this is a hack to get around design name requirement: since legal
-    # design names probably can't contain spaces, we can detect if it is unset.
-    UNSET_DESIGN = '  unset  '
-
     # Create a base chip class.
     chip = siliconcompiler.Chip(UNSET_DESIGN)
 
@@ -81,10 +80,6 @@ def main():
         chip.logger.error(e)
         return 1
 
-    # Error checking
-    design = chip.get('design')
-    design_set = design != UNSET_DESIGN
-
     # Search input keys for files
     input_mode = []
     for fileset in chip.getkeys('input'):
@@ -92,11 +87,6 @@ def main():
             if chip.schema._getvals('input', fileset, mode):
                 input_mode = [('input', fileset, mode)]
 
-    if not (design_set or input_mode):
-        chip.logger.error('Nothing to load: please define a target with '
-                          '-cfg, -design, and/or inputs.')
-        return 1
-
     filename = None
     if input_mode:
         check_ext = list(chip._showtools.keys())
@@ -115,7 +105,19 @@ def main():
 
         filename = get_file_from_keys()
 
-    if not load_manifest(chip, filename):
+    # Attempt to load a manifest
+    if not chip.get('option', 'cfg'):
+        manifest = pick_manifest(chip, src_file=filename)
+        if manifest:
+            chip.logger.info(f'Loading manifest: {manifest}')
+            chip.read_manifest(manifest)
+
+    # Error checking
+    design = chip.get('design')
+    design_set = design != UNSET_DESIGN
+    if not (design_set or input_mode):
+        chip.logger.error('Nothing to load: please define a target with '
+                          '-cfg, -design, and/or inputs.')
         return 1
 
     # Read in file

{siliconcompiler-0.28.4 → siliconcompiler-0.28.5}/siliconcompiler/core.py

@@ -2123,7 +2123,9 @@ class Chip:
             nonlocal graph_idx
 
             for subgraph in graph_info["graphs"]:
+                child_prefix = prefix
                 if get_node_count(graph_info["graphs"][subgraph]) > 1:
+                    child_prefix = f"{child_prefix}{subgraph}."
                     graph = graphviz.Digraph(name=f"cluster_{graph_idx}")
                     graph_idx += 1
 
@@ -2143,7 +2145,7 @@ class Chip:
                 else:
                     graph = parent
 
-                build_graph(graph_info["graphs"][subgraph], graph, f"{prefix}{subgraph}.")
+                build_graph(graph_info["graphs"][subgraph], graph, child_prefix)
 
                 if graph is not parent:
                     parent.subgraph(graph)

siliconcompiler-0.28.5/siliconcompiler/flows/drcflow.py

@@ -0,0 +1,13 @@
+from siliconcompiler import Flow
+
+from siliconcompiler.tools.klayout import drc
+
+
+def setup():
+    '''
+    Perform a DRC run on an input GDS
+    '''
+    flow = Flow('drcflow')
+    flow.node('drcflow', 'drc', drc)
+
+    return flow

siliconcompiler-0.28.5/siliconcompiler/flows/interposerflow.py

@@ -0,0 +1,17 @@
+from siliconcompiler import Flow
+
+from siliconcompiler.tools.openroad import rdlroute
+from siliconcompiler.tools.klayout import export
+
+
+def setup():
+    '''
+    A flow to perform RDL routing and generate a GDS
+    '''
+    flow = Flow('interposerflow')
+    flow.node('interposerflow', 'rdlroute', rdlroute)
+    flow.node('interposerflow', 'write_gds', export)
+
+    flow.edge('interposerflow', 'rdlroute', 'write_gds')
+
+    return flow

siliconcompiler-0.28.5/siliconcompiler/libs/interposer.py

@@ -0,0 +1,8 @@
+import siliconcompiler
+from lambdapdk.interposer.libs.bumps import setup
+
+
+#########################
+if __name__ == "__main__":
+    lib = setup(siliconcompiler.Chip('<lib>'))
+    lib.write_manifest(f'{lib.top()}.json')

siliconcompiler-0.28.5/siliconcompiler/pdks/interposer.py

@@ -0,0 +1,8 @@
+import siliconcompiler
+from lambdapdk.interposer import setup
+
+
+#########################
+if __name__ == "__main__":
+    pdk = setup(siliconcompiler.Chip('<lib>'))
+    pdk.write_manifest(f'{pdk.top()}.json')

{siliconcompiler-0.28.4 → siliconcompiler-0.28.5}/siliconcompiler/remote/schema.py

@@ -2,7 +2,7 @@ from siliconcompiler.schema.schema_cfg import scparam
 from siliconcompiler.schema import Schema
 
 
-SCHEMA_VERSION = '0.0.1'
+SCHEMA_VERSION = '0.0.2'
 
 
 def schema_cfg():
@@ -93,6 +93,16 @@ def schema_cfg():
             schelp="""
             Provides explicit control over the level of debug logging printed.""")
 
+    scparam(cfg, ['option', 'checkinterval'],
+            sctype='int',
+            defvalue=30,
+            shorthelp="Interval for client",
+            switch="-checkinterval <int>",
+            example=["cli: -checkinterval 10",
+                     "api: chip.set('option', 'checkinterval', 10)"],
+            schelp="""
+            Interval between checks to announce to clients""")
+
     return cfg
 
 

{siliconcompiler-0.28.4 → siliconcompiler-0.28.5}/siliconcompiler/remote/server.py

@@ -239,7 +239,7 @@ class Server:
 
         # Return a response to the client.
         return web.json_response({'message': f"Starting job: {job_hash}",
-                                  'interval': 30,
+                                  'interval': self.checkinterval,
                                   'job_hash': job_hash})
 
     ####################
@@ -375,7 +375,7 @@ class Server:
                 'sc_schema': sc_schema_version,
                 'sc_server': Server.__version__,
             },
-            'progress_interval': 30
+            'progress_interval': self.checkinterval
         }
 
         username = job_params['username']
@@ -490,6 +490,11 @@ class Server:
         # Ensure that NFS mounting path is absolute.
         return os.path.abspath(self.get('option', 'nfsmount'))
 
+    ###################
+    @property
+    def checkinterval(self):
+        return self.get('option', 'checkinterval')
+
     def get(self, *keypath, field='value'):
         return self.schema.get(*keypath, field=field)