rtl-buddy 3.2.2__tar.gz → 3.2.3__tar.gz

{rtl_buddy-3.2.2 → rtl_buddy-3.2.3}/.github/workflows/release.yml

@@ -1,5 +1,10 @@
 name: Release
 
+run-name: >-
+  ${{ github.event_name == 'workflow_dispatch'
+    && format('Release ({0}{1}) from {2}', inputs.bump, inputs.pre_release == 'true' && ', pre-release' || '', github.ref_name)
+    || format('Release from PR #{0} ({1})', github.event.pull_request.number, github.head_ref) }}
+
 on:
   pull_request:
     types: [closed]
@@ -100,6 +105,12 @@ jobs:
           echo "is_prerelease=${IS_PRERELEASE}" >> "$GITHUB_OUTPUT"
           echo "Bumping ${LATEST} -> ${NEW_TAG}"
 
+      - name: Log release parameters
+        run: |
+          echo "Version : ${{ steps.version.outputs.new_tag || '(none — no version label on PR)' }}"
+          echo "Branch  : ${{ github.event_name == 'workflow_dispatch' && github.ref_name || github.head_ref }}"
+          echo "Trigger : ${{ github.event_name }}"
+
       - name: Require release token
         if: steps.version.outputs.new_tag != ''
         env:

{rtl_buddy-3.2.2 → rtl_buddy-3.2.3}/PKG-INFO

@@ -1,14 +1,14 @@
 Metadata-Version: 2.4
 Name: rtl_buddy
-Version: 3.2.2
-Summary: RTL Buddy is a build-system with testplan, regression, workflow support for Verilog RTL codebases.
+Version: 3.2.3
+Summary: Python CLI for Verilog and SystemVerilog RTL testing, randomized regressions, coverage, and simulator workflow automation.
 Project-URL: Source, https://github.com/rtl-buddy/rtl_buddy
 Project-URL: Documentation, https://rtl-buddy.github.io/rtl_buddy/
 Project-URL: Tracker, https://github.com/rtl-buddy/rtl_buddy/issues
 Author: Zhi-Hern Loh, Xie Jiacheng
 License-Expression: BSD-3-Clause
 License-File: LICENSE
-Keywords: ASIC,FPGA,SystemVerilog,Verilog
+Keywords: ASIC,EDA,FPGA,RTL,SystemVerilog,VCS,Verilator,Verilog,coverage,regression testing,verification
 Classifier: Development Status :: 4 - Beta
 Classifier: Operating System :: MacOS
 Classifier: Operating System :: POSIX :: Linux
@@ -32,10 +32,19 @@ Description-Content-Type: text/markdown
 [![License](https://img.shields.io/badge/license-BSD--3--Clause-blue)](LICENSE)
 [![Docs](https://img.shields.io/badge/docs-rtl--buddy.github.io-blue)](https://rtl-buddy.github.io/rtl_buddy/)
 
-`rtl_buddy` is a CLI for running RTL tests, regressions, filelist generation, and adjacent workflow automation in Verilog and SystemVerilog projects. It is designed to work well for both humans and AI agents.
+`rtl_buddy` is a Python CLI for running Verilog and SystemVerilog RTL tests, randomized regressions, filelist generation, Verilator/VCS simulator workflows, and adjacent verification automation. It is designed to work well for both humans and AI agents.
 
 It is built to sit on top of the tools your project already uses, while giving you a cleaner, more repeatable interface for day-to-day verification work. The primary supported flows are Verilator and VCS-based compile, simulation, and regression workflows. Basic Verible command integration exists, while broader first-class Verible and PeakRDL workflows are on the roadmap.
 
+Typical commands look like:
+
+```bash
+uv run rb test basic
+uv run rb test smoke --repeat 20
+uv run rb regression
+uv run rb regression --coverage-merge
+```
+
 ## Why `rtl_buddy`
 
 `rtl_buddy` gives RTL projects a lightweight control plane for common verification tasks:
@@ -74,7 +83,7 @@ Prerequisites:
 - A simulator on `PATH`
   - Verilator is the recommended open-source starting point
   - VCS is also supported as a first-class flow
-- Optional Verible binaries if you want to use `uv run rb verible ...`
+- Optional: Verible if you want to use `uv run rb verible ...` — e.g. `brew tap chipsalliance/verible && brew install verible` on macOS, or see [Verible releases](https://github.com/chipsalliance/verible/releases) for other platforms
 - Optional system-level coverage tools:
   - `lcov` for LCOV and HTML coverage export
   - [Coverview](https://github.com/antmicro/coverview) for Coverview package generation

{rtl_buddy-3.2.2 → rtl_buddy-3.2.3}/README.md

@@ -5,10 +5,19 @@
 [![License](https://img.shields.io/badge/license-BSD--3--Clause-blue)](LICENSE)
 [![Docs](https://img.shields.io/badge/docs-rtl--buddy.github.io-blue)](https://rtl-buddy.github.io/rtl_buddy/)
 
-`rtl_buddy` is a CLI for running RTL tests, regressions, filelist generation, and adjacent workflow automation in Verilog and SystemVerilog projects. It is designed to work well for both humans and AI agents.
+`rtl_buddy` is a Python CLI for running Verilog and SystemVerilog RTL tests, randomized regressions, filelist generation, Verilator/VCS simulator workflows, and adjacent verification automation. It is designed to work well for both humans and AI agents.
 
 It is built to sit on top of the tools your project already uses, while giving you a cleaner, more repeatable interface for day-to-day verification work. The primary supported flows are Verilator and VCS-based compile, simulation, and regression workflows. Basic Verible command integration exists, while broader first-class Verible and PeakRDL workflows are on the roadmap.
 
+Typical commands look like:
+
+```bash
+uv run rb test basic
+uv run rb test smoke --repeat 20
+uv run rb regression
+uv run rb regression --coverage-merge
+```
+
 ## Why `rtl_buddy`
 
 `rtl_buddy` gives RTL projects a lightweight control plane for common verification tasks:
@@ -47,7 +56,7 @@ Prerequisites:
 - A simulator on `PATH`
   - Verilator is the recommended open-source starting point
   - VCS is also supported as a first-class flow
-- Optional Verible binaries if you want to use `uv run rb verible ...`
+- Optional: Verible if you want to use `uv run rb verible ...` — e.g. `brew tap chipsalliance/verible && brew install verible` on macOS, or see [Verible releases](https://github.com/chipsalliance/verible/releases) for other platforms
 - Optional system-level coverage tools:
   - `lcov` for LCOV and HTML coverage export
   - [Coverview](https://github.com/antmicro/coverview) for Coverview package generation

{rtl_buddy-3.2.2 → rtl_buddy-3.2.3}/docs/concepts/plugins.md

@@ -31,6 +31,8 @@ The sweep hook runs before the test flow and expands a single test entry into mu
 | `logger` | Logger | Use this for all logging so output goes through `rtl_buddy`'s log system |
 | `test_cfg` | TestConfig (immutable) | The original test entry from `tests.yaml` |
 | `root_cfg` | RootConfig (mutable) | The loaded root config |
+| `suite_dir` | string | Absolute path to the directory containing `tests.yaml` |
+| `artifact_dir` | string | Artifact root for the incoming test name under `suite_dir/artefacts/` |
 | `out_test_cfgs` | list | **Assign** the expanded list of `TestConfig` objects here |
 | `__file__` | string | Absolute path to the current sweep script |
 
@@ -74,14 +76,21 @@ The pre-processing hook runs after sweep expansion but before the compilation st
 | `logger` | Logger | Use for all logging |
 | `test_cfg` | TestConfig (mutable) | Modify this to change compile/sim parameters |
 | `root_cfg` | RootConfig (mutable) | The loaded root config |
+| `suite_dir` | string | Absolute path to the directory containing `tests.yaml` |
+| `artifact_dir` | string | Artifact root for this test under `suite_dir/artefacts/` |
 | `__file__` | string | Absolute path to the current pre-processing script |
 
+Plusargs are still passed through verbatim. If a plusarg value should reference a suite-local file, resolve it explicitly against `suite_dir` in preproc. Output filenames that should land in the per-test artefact tree can remain relative to `artifact_dir`.
+
 **Example:**
 
 ```python
 # my_preproc.py
 import os
+from pathlib import Path
+
 test_cfg.plusargs["BUILD_ID"] = os.environ.get("CI_BUILD_ID", "local")
+test_cfg.plusargs["stimulus"] = str(Path(suite_dir) / "vectors" / "streaming_contract.txt")
 ```
 
 If a pre-processing script raises an exception, the affected test is marked as a setup failure and the rest of the run continues.

{rtl_buddy-3.2.2 → rtl_buddy-3.2.3}/docs/concepts/root-config.md

@@ -37,7 +37,7 @@ cfg-rtl-builder:
 
 cfg-verible:
   - name: "verible-macos"
-    path: "tools/verible/macos/active/bin"
+    path: "/opt/homebrew/bin"
     extra_args:
       lint:
         - "--rules=-module-filename"
@@ -63,18 +63,7 @@ Defines simulation tool configurations. Each entry has:
 
 **`cfg-verible`**
 
-Defines Verible tool configurations for lint and syntax checks.
-
-**`cfg-surfer`** *(optional)*
-
-Configures the Surfer waveform viewer for `rb wave`. Fields:
-
-- `path`: bare executable name (resolved via PATH, e.g. `"surfer"`) or a relative/absolute path to the binary
-- `wcp-port`: TCP port rtl-buddy listens on; Surfer connects with `--wcp-initiate` (default: `0` — OS auto-assigns a free port)
-- `editor-cmd`: command template with `%f` (file path) and `%l` (line number) placeholders — e.g. `"vim +%l %f"`, `"code --goto %f:%l"`
-- `editor-terminal`: how to open terminal editors — `tmux` (new tmux window), `iterm2`, `terminal` (macOS Terminal.app), or `""` to run the command directly (for GUI editors)
-
-`rb wave <test>` looks for a signal layout file at `<test>.surfer` in the same directory as `tests.yaml` (e.g. `verif/sandbox/basic.surfer`). If found it is passed to Surfer via `-c`; if not, Surfer opens with no pre-loaded signals. If no FST exists for the test, `rb wave` runs a debug sim automatically before launching Surfer.
+Defines Verible tool configurations for lint and syntax checks. `path` is the directory containing Verible executables — absolute or relative to `root_config.yaml`.
 
 **`cfg-rtl-reg`**
 

{rtl_buddy-3.2.2 → rtl_buddy-3.2.3}/docs/concepts/tests.md

@@ -167,6 +167,8 @@ For machine-readable logs (JSON Lines), use `--machine`. See [For Agents](../age
 
 Paths in `tests.yaml` (such as `model_path`) are resolved relative to the suite file's directory, not the invocation directory.
 
+Plusargs are passed to the simulator verbatim. If a plusarg should reference a suite-local file, resolve it explicitly in preproc using `suite_dir`. Bare output filenames can remain artifact-relative so they land under `artefacts/{test_name}/`.
+
 ## Full schema
 
 See [YAML Formats: tests.yaml](../reference/yaml.md#testsyaml) for the complete field reference.

rtl_buddy-3.2.3/docs/index.md

@@ -0,0 +1,40 @@
+---
+description: RTL Buddy is a Python CLI for Verilog and SystemVerilog regression testing, Verilator and VCS simulation workflows, coverage, and YAML-based RTL verification automation.
+---
+
+# RTL Buddy
+
+RTL Buddy is a Python CLI for Verilog and SystemVerilog RTL verification workflows, including test execution, randomized regression testing, Verilator and VCS simulation, coverage collection, and YAML-based automation.
+
+It wraps simulation tools and project scripts to provide a structured, config-driven test and regression system for ASIC and FPGA projects. The primary supported flows are Verilator on macOS/Linux and VCS on Linux.
+
+## Features
+
+- Run individual Verilog/SystemVerilog tests or full regressions from YAML config files
+- Randomized seed testing with repeat and replay support
+- Plugin hooks for sweep generation, test pre-processing, and post-processing
+- Filelist generation from `models.yaml`
+- Verilator coverage collection, merge, summary, and export workflows
+- Basic Verible command integration for lint, syntax, formatting, and preprocessing
+- Machine-readable JSONL logging for use with AI agents and CI pipelines
+
+`rtl_buddy` can be adapted to different project toolchains, but the primary supported flows are Verilator and VCS. Broader first-class Verible and PeakRDL workflows are on the roadmap.
+
+## SystemVerilog Regression Testing
+
+RTL Buddy keeps simulator invocation, seeds, logs, result handling, and regression selection consistent across repeated verification runs. Projects describe suites, tests, platforms, builders, and models in readable YAML files instead of scattering that logic across ad hoc shell scripts.
+
+## Verilator and VCS Simulation Workflows
+
+The CLI gives RTL projects one command surface for open-source Verilator flows and Linux VCS flows, with optional hooks for project-specific compile, simulation, sweep, and post-processing behavior.
+
+## Getting Started
+
+- [Installation](install.md) — how to add `rtl_buddy` to your project
+- [Quick Start](quickstart.md) — run your first test in minutes
+- [Concepts](concepts/root-config.md) — understand the config model
+
+## Reference
+
+- [CLI Reference](reference/cli.md) — all subcommands and options
+- [YAML Formats](reference/yaml.md) — full schema for all config files

{rtl_buddy-3.2.2 → rtl_buddy-3.2.3}/docs/install.md

@@ -11,7 +11,7 @@ description: How to install rtl_buddy into a project using uv, including prerequ
 - Python 3.11 or later
 - `uv`
 - Simulation tool on `PATH`: Verilator (macOS/Linux) or VCS (Linux)
-- Optional Verible binaries if you want to use `uv run rb verible ...`
+- Optional: Verible if you want to use `uv run rb verible ...` — e.g. `brew tap chipsalliance/verible && brew install verible` on macOS, or see [Verible releases](https://github.com/chipsalliance/verible/releases) for other platforms
 - Optional system-level coverage tools:
   - `lcov` for `.info` export and HTML reports
   - Antmicro `coverview` for Coverview package generation

{rtl_buddy-3.2.2 → rtl_buddy-3.2.3}/docs/migrations/v2-to-v3.md

@@ -31,6 +31,8 @@ artefacts/{test_name}/run-0001/coverage.dat
 
 Compile outputs (`compile.log`, `run.f`) remain at `artefacts/{test_name}/` — they are shared across all iterations of the same test.
 
+Hook scripts that previously relied on suite-relative file paths resolving from the simulator working directory must now resolve those paths explicitly. Use the preproc hook's `suite_dir` variable for suite-local inputs; keep output filenames artifact-relative when they should land under `artefacts/{test_name}/`.
+
 ### Symlinks
 
 The convenience symlinks `test.log`, `test.err`, and `test.randseed` at the suite root still exist and still point to the latest run.

{rtl_buddy-3.2.2 → rtl_buddy-3.2.3}/docs/reference/cli.md

@@ -47,7 +47,6 @@ Usage: rtl-buddy [OPTIONS] COMMAND [ARGS]...
 │ regression  run rtl regression                                                       │
 │ filelist    generate filelists using models.yaml                                     │
 │ verible     run verible cmd                                                          │
-│ wave        open waveform viewer for a test                                          │
 │ skill       manage the rtl_buddy agent skill                                         │
 │ docs        browse bundled documentation                                             │
 │ spec        spec traceability commands                                               │
@@ -188,24 +187,6 @@ Usage: rtl-buddy verible [OPTIONS] CMD [VERIBLE_ARGS]...
 ╰──────────────────────────────────────────────────────────────────────────────────────╯
 ```
 
-## wave
-
-```text
-Usage: rtl-buddy wave [OPTIONS] TEST_NAME                                              
-                                                                                        
- open waveform viewer for a test                                                        
-                                                                                        
-╭─ Arguments ──────────────────────────────────────────────────────────────────────────╮
-│ *    test_name      TEXT  name of test to open waveform for [required]               │
-╰──────────────────────────────────────────────────────────────────────────────────────╯
-╭─ Options ────────────────────────────────────────────────────────────────────────────╮
-│ --test-config  -c      TEXT  tests.yaml to use [default: tests.yaml]                 │
-│ --surfer               TEXT  cfg-surfer entry name [default: surfer-default]         │
-│ --resim                      force re-run of debug sim even if FST exists            │
-│ --help                       Show this message and exit.                             │
-╰──────────────────────────────────────────────────────────────────────────────────────╯
-```
-
 ## skill
 
 ```text

{rtl_buddy-3.2.2 → rtl_buddy-3.2.3}/docs/reference/yaml.md

@@ -45,7 +45,7 @@ cfg-rtl-builder:
 
 cfg-verible:
   - name: "verible-macos"
-    path: "tools/verible/macos/active/bin"
+    path: "/opt/homebrew/bin"
     extra_args:
       lint:
         - "--rules=-module-filename"
@@ -60,13 +60,6 @@ cfg-coverview:
     config:
       # inline Coverview JSON configuration values
 
-cfg-surfer:
-  - name: "surfer-default"
-    path: "surfer"              # bare name → found via PATH; or relative/absolute path
-    wcp-port: 0         # 0 = OS auto-assigns a free port
-    editor-cmd: "vim +%l %f"   # %f = file path, %l = line number
-    editor-terminal: "tmux"    # tmux | iterm2 | terminal | "" (empty = run cmd directly)
-
 cfg-rtl-reg:
   reg-cfg-path: "design/regression.yaml"
 ```
@@ -78,8 +71,8 @@ cfg-rtl-reg:
 - `--builder-mode` selects which named `builder-opts` entry to use for compile-time and run-time flags.
 - `cfg-coverage` is keyed by simulator family (e.g. `verilator`). `use-lcov: true` enables `.info` export and LCOV HTML generation when `--coverage-html` is used.
 - `cfg-coverview` is keyed by simulator family. `generate-tables` sets the coverage type for Coverview tables. `config` is a dict of inline Coverview JSON configuration values.
-- `cfg-surfer` configures the Surfer waveform viewer used by `rb wave`. `path` is a bare executable name (resolved via PATH) or a relative/absolute path to the binary. `editor-cmd` supports `%f` (file path) and `%l` (line number) placeholders. `editor-terminal` controls how the editor is launched: `tmux` opens a new tmux window, `iterm2` and `terminal` use AppleScript, empty string runs the command directly (suitable for GUI editors like VS Code).
 - `cfg-rtl-reg.reg-cfg-path` is the fallback regression file for `rtl-buddy regression` when no `./regression.yaml` exists in the cwd.
+- `cfg-verible[].path` is the directory containing Verible executables. Absolute paths are used as-is; relative paths are resolved from the directory containing `root_config.yaml`.
 
 ---
 
@@ -255,7 +248,7 @@ cocotb writes a JUnit XML results file (`cocotb_results.xml`) instead of `PASS`/
 - `plusargs`: converted to `+KEY` (no value) or `+KEY=VALUE`.
 - `sim_timeout`: applies per test run, not per iteration in `randtest`.
 - `sweep.path`: Python script that expands one test entry into a list of `TestConfig` objects. See [Plugins](../concepts/plugins.md).
-- `preproc.path`: Python script executed before compile; can mutate `test_cfg` and `root_cfg`. See [Plugins](../concepts/plugins.md).
+- `preproc.path`: Python script executed before compile; can mutate `test_cfg` and `root_cfg`, and receives `suite_dir` plus `artifact_dir` in its execution namespace. See [Plugins](../concepts/plugins.md).
 
 ## Path semantics and cwd
 
@@ -263,6 +256,7 @@ cocotb writes a JUnit XML results file (`cocotb_results.xml`) instead of `PASS`/
 - Per-test artifacts are written to `artefacts/{test_name}/` under the suite root. Single runs write `test.log`, `test.err`, `test.randseed`, `compile.log`, `run.f`, and (if enabled) `coverage.dat` there directly. Repeated runs (`randtest`) write sim outputs into numbered subdirectories: `artefacts/{test_name}/run-0001/`, etc.
 - `test` and `randtest` do **not** automatically change into the suite directory. Run from the suite directory, or use `--test-config` with a full path.
 - `regression` does `chdir` into each suite directory before executing.
+- Preproc plusargs are passed to the simulator verbatim. Resolve suite-local input paths explicitly against `suite_dir`; keep output filenames artifact-relative when they should land under `artefacts/{test_name}/`.
 - For portable configs in multi-suite repos, make paths in `tests.yaml` explicit and verify they resolve correctly from the intended invocation directory.
 
 ---

rtl_buddy-3.2.3/docs/robots.txt

@@ -0,0 +1,4 @@
+User-agent: *
+Allow: /
+
+Sitemap: https://rtl-buddy.github.io/rtl_buddy/sitemap.xml

{rtl_buddy-3.2.2 → rtl_buddy-3.2.3}/mkdocs.yml

@@ -1,5 +1,8 @@
 site_name: RTL Buddy
-site_description: CLI tool for automating tests, regressions, and RTL workflows for Verilog/SystemVerilog codebases.
+site_description: Python CLI for Verilog and SystemVerilog regression testing, Verilator and VCS simulation workflows, RTL test automation, coverage, and YAML-based verification flows.
+site_author: RTL Buddy contributors
+repo_url: https://github.com/rtl-buddy/rtl_buddy
+repo_name: rtl-buddy/rtl_buddy
 docs_dir: docs
 site_url: https://rtl-buddy.github.io/rtl_buddy/
 remote_name: origin

{rtl_buddy-3.2.2 → rtl_buddy-3.2.3}/pyproject.toml

@@ -19,11 +19,23 @@ authors = [
   { name = "Xie Jiacheng"}
 ]
 
-description = "RTL Buddy is a build-system with testplan, regression, workflow support for Verilog RTL codebases."
+description = "Python CLI for Verilog and SystemVerilog RTL testing, randomized regressions, coverage, and simulator workflow automation."
 readme = "README.md"
 license = "BSD-3-Clause"
 license-files = ["LICENSE"]
-keywords = [ "SystemVerilog", "Verilog", "ASIC", "FPGA" ]
+keywords = [
+  "SystemVerilog",
+  "Verilog",
+  "RTL",
+  "ASIC",
+  "FPGA",
+  "EDA",
+  "Verilator",
+  "VCS",
+  "regression testing",
+  "verification",
+  "coverage",
+]
 
 classifiers = [
   "Development Status :: 4 - Beta",

{rtl_buddy-3.2.2 → rtl_buddy-3.2.3}/scripts/gen_cli_reference.py

@@ -11,7 +11,7 @@ from pathlib import Path
 
 REPO_ROOT = Path(__file__).parent.parent
 OUTPUT = REPO_ROOT / "docs" / "reference" / "cli.md"
-SUBCOMMANDS = ["test", "randtest", "regression", "filelist", "verible", "wave", "skill", "docs", "spec"]
+SUBCOMMANDS = ["test", "randtest", "regression", "filelist", "verible", "skill", "docs", "spec"]
 
 HEADER = """\
 ---

{rtl_buddy-3.2.2 → rtl_buddy-3.2.3}/src/rtl_buddy/config/__init__.py

@@ -16,4 +16,3 @@ from .spec import SpecConfig, SpecBlock, SpecCoverageItem
 from .verible import VeribleConfig
 from .coverage import CoverageConfig, CoverageConfigFile
 from .coverview import CoverviewConfig, CoverviewConfigFile
-from .surfer import SurferConfig

{rtl_buddy-3.2.2 → rtl_buddy-3.2.3}/src/rtl_buddy/config/root.py

@@ -15,7 +15,6 @@ from .rtl import RtlBuilderConfig
 from .verible import VeribleConfig, VeribleConfigFile
 from .coverage import CoverageConfig, CoverageConfigFile
 from .coverview import CoverviewConfig, CoverviewConfigFile
-from .surfer import SurferConfig, SurferConfigFile
 from ..errors import FatalRtlBuddyError
 from ..logging_utils import log_event
 
@@ -78,7 +77,6 @@ class RootConfigFile:
   veribles: list[VeribleConfigFile] = field(rename='cfg-verible', default_factory=list)
   coverages: list[CoverageConfigFile] = field(rename='cfg-coverage', default_factory=list)
   coverviews: list[CoverviewConfigFile] = field(rename='cfg-coverview', default_factory=list)
-  surfers: list[SurferConfigFile] = field(rename='cfg-surfer', default_factory=list)
 
 class RootConfig:
   """
@@ -114,7 +112,6 @@ class RootConfig:
     self.verible_cfgs = dict()
     self.coverage_cfgs = dict()
     self.coverview_cfgs = dict()
-    self.surfer_cfgs = dict()
     self.platform_cfg = None
     self.reg_cfg = None # initialise later when get_rtl_reg_cfg is called
 
@@ -143,11 +140,6 @@ class RootConfig:
         cfg.name: cfg.initialise(self.root_cfg_path) for cfg in data.coverviews
       }
 
-      # Populate surfer configs
-      self.surfer_cfgs = {
-        cfg.name: cfg.initialise(self.root_cfg_path) for cfg in data.surfers
-      }
-
       # Initialise regression config
       self.cfg_rtl_reg = data.cfg_rtl_reg
       self.reg_cfg = RegConfig(
@@ -280,17 +272,6 @@ class RootConfig:
     cfg = self.get_coverage_cfg(simulator_name)
     return False if cfg is None else cfg.get_use_lcov()
 
-  def get_surfer_cfg(self, name: str = 'surfer-default') -> 'SurferConfig | None':
-    """
-    Get Surfer configuration by name.
-
-    Args:
-      name (str): cfg-surfer entry name. Defaults to "surfer-default".
-    Returns:
-      cfg (SurferConfig|None): Matching Surfer configuration, if present.
-    """
-    return self.surfer_cfgs.get(name)
-
   def get_coverview_cfg(self, simulator_name:str):
     """
     Get Coverview packaging configuration for a simulator family.

{rtl_buddy-3.2.2 → rtl_buddy-3.2.3}/src/rtl_buddy/config/verible.py

@@ -2,6 +2,7 @@ import logging
 logger = logging.getLogger(__name__)
 import pprint
 import os
+from pathlib import Path
 
 from dataclasses import dataclass
 from serde import serde, field
@@ -14,14 +15,12 @@ class VeribleConfig:
 
   Attributes:
     name (str): Unique verible identifier.
-    path (str): Path to the Verible executable directory.
+    path (str): Path to the directory containing Verible executables.
     extra_args (dict[str, list[str]]): List of arguments to be supplied to verible, grouped by command.
-    root_cfg_path (str): Directory of the root configuration
   """
   name: str
   path: str
   extra_args: dict[str, list[str]]
-  root_cfg_path: str
   available: bool
 
   def get_name(self):
@@ -42,26 +41,16 @@ class VeribleConfig:
     Returns:
       extra_args (list[str]): The list of extra_args associated with the command. If none are found, returns an empty array.
     """
-    #logger.info(pprint.pformat(self.cfg))
     return self.extra_args[cmd] if cmd in self.extra_args else []
 
-  def get_path(self):
-    """
-    Retrieves the path to the Verible executable directory.
-
-    Returns:
-      path (str): The path.
-    """
-    return os.path.join(os.path.dirname(self.root_cfg_path), self.path)
-
   def get_exe_path(self, exe_name):
     """
-    Retrieves the path to the Verible executable.
+    Retrieves the full path to a Verible executable.
 
     Returns:
       path (str): The path.
     """
-    return os.path.join(self.get_path(), exe_name)
+    return os.path.join(self.path, exe_name)
 
   def __str__(self):
     return pprint.pformat(self)
@@ -71,13 +60,13 @@ class VeribleConfigFile:
   name: str
   path: str
   extra_args: dict[str, list[str]]
-  
-  def initialise(self, root_cfg_path:str) -> VeribleConfig:
-    res = VeribleConfig(self.name, self.path, self.extra_args, root_cfg_path, False)
-    full_path = res.get_path()
-    if not os.path.exists(full_path):
-      log_event(logger, logging.DEBUG, "verible.path_missing", name=res.get_name(), path=full_path)
+
+  def initialise(self, root_cfg_path: str) -> VeribleConfig:
+    resolved = str(Path(root_cfg_path).parent / self.path)
+    res = VeribleConfig(self.name, resolved, self.extra_args, False)
+    if not os.path.exists(resolved):
+      log_event(logger, logging.DEBUG, "verible.path_missing", name=res.get_name(), path=resolved)
     else:
-     res.available = True
+      res.available = True
 
     return res

{rtl_buddy-3.2.2 → rtl_buddy-3.2.3}/src/rtl_buddy/logging_utils.py

@@ -295,10 +295,6 @@ def _human_message(event: str, fields: Mapping[str, Any]) -> str:
       return "verible binaries unavailable"
     case "verible.command_invalid":
       return f'verible: invalid command "{fields.get("command")}"'
-    case "wcp.resolve_failed":
-      return f'WCP: could not find source for "{fields.get("variable")}" (searched {fields.get("searched")} files)'
-    case "wcp.connection_lost":
-      return f'WCP: connection lost ({fields.get("reason")}); waiting for Surfer to reconnect'
     case "coverage.metric.failed":
       return (
         f'coverage metric "{fields.get("metric")}" failed'