rpi-hwid 0.0.post5__tar.gz

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+ name: CI
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+
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+ # The same gates as local development (ruff, mypy --strict, pytest with
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+ # coverage) on every push to main and every pull request. A green run is what
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+ # "mergeable" means -- and what "releasable" means: publish-pypi.yml is
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+ # triggered by this workflow COMPLETING on main and proceeds only when it
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+ # succeeded, so a red push to main is never published. Renaming this workflow
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+ # breaks that trigger.
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+ on:
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+ push:
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+ branches: [main]
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+ pull_request:
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+
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+ concurrency:
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+ group: ci-${{ github.ref }}
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+ cancel-in-progress: true
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+
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+ jobs:
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+ test:
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+ runs-on: ubuntu-latest
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+ timeout-minutes: 20
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+ strategy:
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+ fail-fast: false
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+ matrix:
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+ python-version: ["3.11", "3.12", "3.13"]
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+ steps:
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+ - uses: actions/checkout@v5
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+ with:
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+ fetch-depth: 0 # full history so hatch-vcs can derive the version
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+
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+ - name: Install poppler (pdftoppm, for the label QR check) and a monospace font
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+ run: |
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+ sudo apt-get update
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+ sudo apt-get install -y --no-install-recommends poppler-utils fonts-dejavu-core
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+
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+ - uses: astral-sh/setup-uv@v7
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+
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+ - name: Install the matrix Python
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+ run: uv python install ${{ matrix.python-version }}
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+
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+ - name: Sync all extras and the dev group
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+ run: uv sync --all-extras --dev --python ${{ matrix.python-version }}
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+
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+ - name: Lint (ruff)
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+ run: uv run ruff check
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+
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+ - name: Type-check (mypy --strict)
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+ run: uv run mypy
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+
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+ - name: Tests + coverage gate
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+ run: uv run pytest
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+
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+ # The two probe files must stay runnable by the oldest python3 a Pi in the
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+ # field carries (Raspbian stretch: 3.5). Byte-compile them with a real 3.5
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+ # from the python:3.5 image (uv has no 3.7 build for this runner, and 3.7
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+ # would not have been the right grammar anyway); the test suite separately
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+ # refuses f-strings, which 3.5 lacks.
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+ probe-old-python:
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+ runs-on: ubuntu-latest
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+ timeout-minutes: 10
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+ steps:
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+ - uses: actions/checkout@v5
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+ - name: Byte-compile the probes with python 3.5
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+ run: >-
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+ docker run --rm -v "$PWD:/src" -w /src python:3.5-slim
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+ python -W error -m py_compile src/rpi_hwid/probe.py src/rpi_hwid/fpga.py
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+ name: Publish to PyPI
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+
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+ # Every GREEN push to main is a release. The version is derived from git by
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+ # hatch-vcs (see pyproject.toml): vX.Y at a tag, vX.Y.postN N commits later, so
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+ # each commit produces a new, unique version -- no manual bump.
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+ #
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+ # This workflow is gated on CI: it runs when the "CI" workflow (ruff, mypy,
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+ # pytest + coverage, the old-python probe check) COMPLETES for a push to main,
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+ # and the build job only proceeds when that run SUCCEEDED, so a red push to
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+ # main is never published. The workflow_dispatch path stays for manual re-runs.
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+ #
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+ # Publishing uses PyPI Trusted Publishing (OIDC): there is no API token in the
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+ # repo; the `pypi` environment + trusted publisher are registered (see
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+ # RELEASING.md).
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+ on:
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+ workflow_run:
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+ workflows: [CI]
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+ types: [completed]
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+ branches: [main]
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+ workflow_dispatch:
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+
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+ jobs:
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+ build:
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+ # workflow_run fires on EVERY completion (failure and cancelled included);
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+ # only a successful CI run is a release. Dependent jobs inherit the skip.
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+ if: >-
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+ github.event_name == 'workflow_dispatch' ||
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+ github.event.workflow_run.conclusion == 'success'
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+ runs-on: ubuntu-latest
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+ steps:
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+ - uses: actions/checkout@v5
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+ with:
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+ # A workflow_run checkout defaults to the default branch HEAD, which
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+ # may already be PAST the commit CI just validated. Pin to the SHA
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+ # CI actually ran on, so the published version is exactly the one
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+ # that went green.
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+ ref: ${{ github.event.workflow_run.head_sha || github.sha }}
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+ fetch-depth: 0 # full history + tags for hatch-vcs version derivation
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+
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+ - uses: astral-sh/setup-uv@v7
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+
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+ - name: Build sdist + wheel
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+ run: uv build
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+
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+ - name: Show derived version
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+ run: ls -1 dist/
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+
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+ - uses: actions/upload-artifact@v7
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+ with:
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+ name: dist
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+ path: dist/
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+
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+ publish:
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+ needs: build
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+ runs-on: ubuntu-latest
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+ # Trusted Publishing requires an OIDC token and a named environment.
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+ environment: pypi
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+ permissions:
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+ id-token: write
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+ steps:
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+ - uses: actions/download-artifact@v8
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+ with:
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+ name: dist
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+ path: dist/
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+
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+ - name: Publish to PyPI (OIDC trusted publishing)
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+ uses: pypa/gh-action-pypi-publish@release/v1
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+ with:
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+ skip-existing: true
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+ # Python
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+ __pycache__/
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+ *.py[cod]
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+ *.egg-info/
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+ .eggs/
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+ build/
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+ dist/
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+ .venv/
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+ venv/
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+
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+ # Tooling caches
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+ .pytest_cache/
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+ .ruff_cache/
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+ .mypy_cache/
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+ .cache/
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+ .uvcache/
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+
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+ # Coverage artifacts (pytest-cov / coverage.py)
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+ .coverage
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+ .coverage.*
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+ htmlcov/
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+
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+ # hatch-vcs writes this at build/editable-install time; it is derived from git.
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+ /src/rpi_hwid/_version.py
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+
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+ # Sphinx build output (docs/Makefile's BUILDDIR). Read the Docs builds from a
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+ # clean checkout; a local `make -C docs html` writes here.
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+ /docs/_build/
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+
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+ # Debian build byproducts (dpkg-buildpackage writes to the parent dir; local
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+ # builds may drop these in-tree).
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+ /built-debs/
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+ *.deb
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+ *.buildinfo
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+ *.changes
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+ /debian/.debhelper/
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+ /debian/files
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+ /debian/python3-netgear-switch-library/
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+ /debian/debhelper-build-stamp
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+
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+ # Project-local scratch
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+ tmp/
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+
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+ # Claude Code local config and subagent-driven-development scratch
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+ /.claude/
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+ /.superpowers/
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+
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+ # Overlay-mount character-device dotfiles present in this repo's working tree —
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+ # never track these.
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+ /.bash_profile
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+ /.bashrc
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+ /.gitconfig
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+ /.gitmodules
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+ /.idea
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+ /.mcp.json
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+ /.profile
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+ /.ripgreprc
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+ /.vscode
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+ /.zprofile
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+ /.zshrc
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+
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+ # Playwright MCP scratch output
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+ .playwright-mcp/
@@ -0,0 +1,202 @@
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+ Metadata-Version: 2.5
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+ Name: rpi-hwid
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+ Version: 0.0.post5
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+ Summary: Raspberry Pi hardware identity: what a Pi wears, what powers it, which FPGA board it hosts, and print-ready labels for all of it.
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+ Project-URL: Homepage, https://github.com/mithro/rpi-hwid
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+ Project-URL: Issues, https://github.com/mithro/rpi-hwid/issues
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+ Author-email: Tim Ansell <me@mith.ro>
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+ License-Expression: Apache-2.0
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+ License-File: LICENSE
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+ Keywords: fpga,hat,inventory,labels,poe,raspberry-pi
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+ Classifier: Operating System :: POSIX :: Linux
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+ Classifier: Programming Language :: Python :: 3
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+ Classifier: Topic :: System :: Hardware
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+ Requires-Python: >=3.11
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+ Provides-Extra: check
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+ Requires-Dist: pillow>=10; extra == 'check'
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+ Requires-Dist: zxing-cpp>=2; extra == 'check'
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+ Provides-Extra: labels
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+ Requires-Dist: pillow>=10; extra == 'labels'
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+ Requires-Dist: reportlab>=4; extra == 'labels'
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+ Requires-Dist: segno>=1.6; extra == 'labels'
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+ Requires-Dist: svglib>=1.5; extra == 'labels'
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+ Description-Content-Type: text/markdown
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+
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+ # rpi-hwid — Raspberry Pi hardware identity
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+
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+ What is this Raspberry Pi wearing, what powers it, and what is soldered to
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+ it? `rpi-hwid` answers from the Pi itself, from evidence the firmware and
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+ kernel already expose but nothing collects: HAT ID EEPROMs (including the
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+ ones the firmware never reads), the Pi 5's own verdict on its USB-C supply,
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+ the PMIC's input and RTC-cell voltages, the fan header, the USB tree, and
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+ which network interfaces are soldered down. A separate module does the same
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+ for an FPGA board attached to the Pi. A collector runs it over ssh across a
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+ fleet, and a label generator turns the collected data into sticker labels
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+ that carry only what cannot change.
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+
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+ ```
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+ pip install rpi-hwid # or: uv tool install rpi-hwid[labels]
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+
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+ rpi-hwid probe # on a Pi
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+ rpi-hwid probe --json --fpga --jtag
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+ rpi-hwid collect --out data/ -J jump.example.org rpi5-netv2 pi@10.21.1.10
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+ rpi-hwid labels --data data/ --out labels.pdf
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+ rpi-hwid name --netv2 0x00742c4e63b9085c
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+ rpi-hwid revision c04170
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+ ```
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+
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+ The probe is one dependency-free file that runs on any Pi with python3 3.5
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+ or later, so it can also be sent over ssh with nothing installed there:
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+
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+ ```
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+ ssh pi@host 'python3 -' --json < src/rpi_hwid/probe.py
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+ ```
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+
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+ It needs passwordless `sudo` for `i2c-tools` and `vcgencmd`.
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+
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+ ## What the probe reads, and what each signal proves
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+
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+ | signal | tells |
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+ |---|---|
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+ | HAT ID EEPROM at `0x50` | what the firmware read: `/proc/device-tree/hat` (official PoE HATs, Digilent Pmod HAT Adaptor, Google VoiceBonnet…) |
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+ | HAT ID EEPROM at `0x51`–`0x57`, read off the ID bus | boards the firmware **never reads**: Waveshare's PoE M.2 HAT+ (B) puts a well-formed HAT+ EEPROM at `0x52` (product string, pid `0x6d87`, a DT atom naming `pciex1`) |
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+ | devices on I2C bus 1 | Waveshare PoE HAT (B): SSD1306 at `0x3c` and PCF8574 at `0x20` |
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+ | USB tree | Waveshare PoE-ETH-USB-HUB-HAT on a Zero: a Terminus `1a40:0101` hub on the root port with an RTL8152 on its port 4 |
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+ | Pi 5 `max_current` | the firmware's USB-C verdict: 5000 after a PD contract, **3000 both for a 3 A resistor source and for no USB-C source at all** (a HAT on the GPIO 5 V pins), 1500 or 900 for a resistor source advertising that much — so 900/1500 proves an external USB-C supply |
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+ | Pi 5 PMIC ADC | 5 V input (GPIO-fed HATs 5.1–5.4 V, splitters 4.8–5.0 V) and the RTC cell (about 3 V fitted, under 0.01 V not) |
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+ | Pi 5 `cooling_fan` node | a fan on the Pi's own header |
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+ | interface drivers | soldered-down (SoC Ethernet, SDIO radio, the 3B+'s LAN7800) versus removable USB adapters, which are listed with their descriptors |
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+ | throttle flags | under-voltage now or since boot: all a 3B+, Zero or Pi 4 can say about its supply |
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+
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+ The verdict names the power source where the evidence allows (`gpio-poe-hat`,
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+ `bonnet-poe`, `usbc-supply`, `usbc-pd-supply`) and says `ambiguous` or
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+ `undetermined` where it does not: an EEPROM-less GPIO PoE HAT on a Pi 5 and
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+ a 3 A USB-C splitter read identically, as do an EEPROM-less, I2C-less HAT on
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+ a 3B+ and any splitter. The switch-side 802.3af class narrows those (the
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+ bonnet is class 3, the M.2 HAT+ (B) class 4, an af-only HAT is never class 4)
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+ but that is read from the switch, not the Pi.
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+
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+ ## FPGA boards (`rpi_hwid.fpga`)
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+
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+ Kept apart from the Pi probe because few people have one. From what the Pi
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+ sees without touching the FPGA: a NeTV2 running LitePCIe is PCIe `10ee:7024`
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+ with one 1 MiB BAR; an SQRL Acorn CLE-215+ is `1e24:021f` (or `10ee:7011`
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+ under other gateware) with 128 KiB + 64 KiB BARs — BAR sizes come from sysfs
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+ and a BAR is never mapped, because that wedges a host; a Digilent Arty is its
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+ own FT2232 with a `210319…` serial. With `--jtag`, openFPGALoader reads the
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+ idcode and Device DNA over the Arty's FT2232 or the host's GPIO harness
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+ (libgpiod, pins 27:22:4:17). With `--flash`, an Arty's SPI flash is
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+ identified by JEDEC id, which reloads the FPGA with openFPGALoader's bridge;
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+ note the S25FL128S and S25FL127S both answer `0x012018`.
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+
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+ ## Names
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+
94
+ `rpi-hwid name` derives short, distinct names from the immutable identifier:
95
+ a NeTV2 from its Device DNA (`netv2-grove`), an Arty from its Digilent serial
96
+ (`arty-hawk`). Both hash first, because the raw identifiers come in
97
+ near-identical clusters. Arty names are a hash *chain* against a registry
98
+ (pass `--names registry.json`), so adding a board never renames an old one.
99
+
100
+ ## Labels
101
+
102
+ `rpi-hwid labels` lays out 63.5 × 38.1 mm labels, 21 to an A4 sheet (the
103
+ Avery L7160 grid), from a directory of collected documents: one per Pi
104
+ (model, memory and revision from the revision code, serial up the edge, HAT
105
+ band, a QR per soldered-down MAC), one per FPGA board (name, die, DNA or
106
+ serial with a QR, flash where read), one per removable USB network adapter
107
+ (descriptors, MAC with a QR). Print at 100 %. `--outline` draws the die-cut
108
+ edges for an alignment print on plain paper.
109
+
110
+ The package ships only artwork it may: the public-domain USB trident. A
111
+ `--artwork DIR` may add `raspberry-pi.svg`, `alphamax.png`, `digilent.png`
112
+ and `netv2.svg`, which are trademarks of their owners (the Raspberry Pi
113
+ logo is on the English Wikipedia file page; the Alphamax and Digilent marks
114
+ are their GitHub organisation avatars); without them a label uses the
115
+ maker's name in type.
116
+
117
+ ## Origin
118
+
119
+ Worked out on a fleet of Pi Zero W, 3B+, 4 and 5 hosts carrying NeTV2, Acorn
120
+ and Arty boards, powered by a mix of Waveshare PoE HATs and external PoE
121
+ splitters, in September 2026. The rules above are what those boards showed;
122
+ a board that behaves differently is a bug report.
@@ -0,0 +1,98 @@
1
+ # rpi-hwid — Raspberry Pi hardware identity
2
+
3
+ What is this Raspberry Pi wearing, what powers it, and what is soldered to
4
+ it? `rpi-hwid` answers from the Pi itself, from evidence the firmware and
5
+ kernel already expose but nothing collects: HAT ID EEPROMs (including the
6
+ ones the firmware never reads), the Pi 5's own verdict on its USB-C supply,
7
+ the PMIC's input and RTC-cell voltages, the fan header, the USB tree, and
8
+ which network interfaces are soldered down. A separate module does the same
9
+ for an FPGA board attached to the Pi. A collector runs it over ssh across a
10
+ fleet, and a label generator turns the collected data into sticker labels
11
+ that carry only what cannot change.
12
+
13
+ ```
14
+ pip install rpi-hwid # or: uv tool install rpi-hwid[labels]
15
+
16
+ rpi-hwid probe # on a Pi
17
+ rpi-hwid probe --json --fpga --jtag
18
+ rpi-hwid collect --out data/ -J jump.example.org rpi5-netv2 pi@10.21.1.10
19
+ rpi-hwid labels --data data/ --out labels.pdf
20
+ rpi-hwid name --netv2 0x00742c4e63b9085c
21
+ rpi-hwid revision c04170
22
+ ```
23
+
24
+ The probe is one dependency-free file that runs on any Pi with python3 3.5
25
+ or later, so it can also be sent over ssh with nothing installed there:
26
+
27
+ ```
28
+ ssh pi@host 'python3 -' --json < src/rpi_hwid/probe.py
29
+ ```
30
+
31
+ It needs passwordless `sudo` for `i2c-tools` and `vcgencmd`.
32
+
33
+ ## What the probe reads, and what each signal proves
34
+
35
+ | signal | tells |
36
+ |---|---|
37
+ | HAT ID EEPROM at `0x50` | what the firmware read: `/proc/device-tree/hat` (official PoE HATs, Digilent Pmod HAT Adaptor, Google VoiceBonnet…) |
38
+ | HAT ID EEPROM at `0x51`–`0x57`, read off the ID bus | boards the firmware **never reads**: Waveshare's PoE M.2 HAT+ (B) puts a well-formed HAT+ EEPROM at `0x52` (product string, pid `0x6d87`, a DT atom naming `pciex1`) |
39
+ | devices on I2C bus 1 | Waveshare PoE HAT (B): SSD1306 at `0x3c` and PCF8574 at `0x20` |
40
+ | USB tree | Waveshare PoE-ETH-USB-HUB-HAT on a Zero: a Terminus `1a40:0101` hub on the root port with an RTL8152 on its port 4 |
41
+ | Pi 5 `max_current` | the firmware's USB-C verdict: 5000 after a PD contract, **3000 both for a 3 A resistor source and for no USB-C source at all** (a HAT on the GPIO 5 V pins), 1500 or 900 for a resistor source advertising that much — so 900/1500 proves an external USB-C supply |
42
+ | Pi 5 PMIC ADC | 5 V input (GPIO-fed HATs 5.1–5.4 V, splitters 4.8–5.0 V) and the RTC cell (about 3 V fitted, under 0.01 V not) |
43
+ | Pi 5 `cooling_fan` node | a fan on the Pi's own header |
44
+ | interface drivers | soldered-down (SoC Ethernet, SDIO radio, the 3B+'s LAN7800) versus removable USB adapters, which are listed with their descriptors |
45
+ | throttle flags | under-voltage now or since boot: all a 3B+, Zero or Pi 4 can say about its supply |
46
+
47
+ The verdict names the power source where the evidence allows (`gpio-poe-hat`,
48
+ `bonnet-poe`, `usbc-supply`, `usbc-pd-supply`) and says `ambiguous` or
49
+ `undetermined` where it does not: an EEPROM-less GPIO PoE HAT on a Pi 5 and
50
+ a 3 A USB-C splitter read identically, as do an EEPROM-less, I2C-less HAT on
51
+ a 3B+ and any splitter. The switch-side 802.3af class narrows those (the
52
+ bonnet is class 3, the M.2 HAT+ (B) class 4, an af-only HAT is never class 4)
53
+ but that is read from the switch, not the Pi.
54
+
55
+ ## FPGA boards (`rpi_hwid.fpga`)
56
+
57
+ Kept apart from the Pi probe because few people have one. From what the Pi
58
+ sees without touching the FPGA: a NeTV2 running LitePCIe is PCIe `10ee:7024`
59
+ with one 1 MiB BAR; an SQRL Acorn CLE-215+ is `1e24:021f` (or `10ee:7011`
60
+ under other gateware) with 128 KiB + 64 KiB BARs — BAR sizes come from sysfs
61
+ and a BAR is never mapped, because that wedges a host; a Digilent Arty is its
62
+ own FT2232 with a `210319…` serial. With `--jtag`, openFPGALoader reads the
63
+ idcode and Device DNA over the Arty's FT2232 or the host's GPIO harness
64
+ (libgpiod, pins 27:22:4:17). With `--flash`, an Arty's SPI flash is
65
+ identified by JEDEC id, which reloads the FPGA with openFPGALoader's bridge;
66
+ note the S25FL128S and S25FL127S both answer `0x012018`.
67
+
68
+ ## Names
69
+
70
+ `rpi-hwid name` derives short, distinct names from the immutable identifier:
71
+ a NeTV2 from its Device DNA (`netv2-grove`), an Arty from its Digilent serial
72
+ (`arty-hawk`). Both hash first, because the raw identifiers come in
73
+ near-identical clusters. Arty names are a hash *chain* against a registry
74
+ (pass `--names registry.json`), so adding a board never renames an old one.
75
+
76
+ ## Labels
77
+
78
+ `rpi-hwid labels` lays out 63.5 × 38.1 mm labels, 21 to an A4 sheet (the
79
+ Avery L7160 grid), from a directory of collected documents: one per Pi
80
+ (model, memory and revision from the revision code, serial up the edge, HAT
81
+ band, a QR per soldered-down MAC), one per FPGA board (name, die, DNA or
82
+ serial with a QR, flash where read), one per removable USB network adapter
83
+ (descriptors, MAC with a QR). Print at 100 %. `--outline` draws the die-cut
84
+ edges for an alignment print on plain paper.
85
+
86
+ The package ships only artwork it may: the public-domain USB trident. A
87
+ `--artwork DIR` may add `raspberry-pi.svg`, `alphamax.png`, `digilent.png`
88
+ and `netv2.svg`, which are trademarks of their owners (the Raspberry Pi
89
+ logo is on the English Wikipedia file page; the Alphamax and Digilent marks
90
+ are their GitHub organisation avatars); without them a label uses the
91
+ maker's name in type.
92
+
93
+ ## Origin
94
+
95
+ Worked out on a fleet of Pi Zero W, 3B+, 4 and 5 hosts carrying NeTV2, Acorn
96
+ and Arty boards, powered by a mix of Waveshare PoE HATs and external PoE
97
+ splitters, in September 2026. The rules above are what those boards showed;
98
+ a board that behaves differently is a bug report.
@@ -0,0 +1,42 @@
1
+ # Releasing
2
+
3
+ This project is a **rolling release**. There are no manual version bumps: the
4
+ version is derived from `git describe` by `hatch-vcs` — `X.Y` at a `vX.Y`
5
+ tag, `X.Y.postN` N commits after it — and **every green push to `main`
6
+ publishes a new package** automatically:
7
+
8
+ - `.github/workflows/ci.yml` — runs the gates (ruff, mypy --strict, pytest with
9
+ coverage) on every push and PR. A green run is what "mergeable" means, and it
10
+ is what triggers the release workflow.
11
+ - `.github/workflows/publish-pypi.yml` — builds and uploads the wheel + sdist to
12
+ PyPI when CI **succeeds** on `main` (`workflow_run`; a failed or cancelled CI
13
+ run publishes nothing, and the checkout is pinned to the SHA CI validated).
14
+
15
+ Merges to `main` use `--no-ff` merge commits so history stays linear per PR.
16
+
17
+ ## Tags
18
+
19
+ Tags are the only human input to the version. `v0.0` sits on the root commit
20
+ (so `git describe` works from the start of history, per the repo-setup
21
+ guidance). To cut a new series, push an annotated `vX.Y` tag on `main` (a
22
+ GitHub tag ruleset only admits `vXX.ZZZ`-shaped tags) — the next green CI run
23
+ publishes `X.Y`, and every commit after it `X.Y.postN`. Never move or delete a
24
+ tag that has been published from.
25
+
26
+ ## One-time human setup
27
+
28
+ Done ONCE by a maintainer. **No secret or key is ever committed to the repo.**
29
+ Until this is done, the publish workflow runs but its upload step fails safely.
30
+
31
+ 1. Create the project `rpi-hwid` on https://pypi.org, or let the first
32
+ trusted-publisher upload create it via a *pending publisher*.
33
+ 2. On PyPI, add a **Trusted Publisher** to the project with:
34
+ - Owner: `mithro`
35
+ - Repository: `rpi-hwid`
36
+ - Workflow filename: `publish-pypi.yml`
37
+ - Environment name: `pypi`
38
+ 3. In the GitHub repo, the **Environment** named `pypi` exists (created at
39
+ repo setup). No secrets needed — OIDC handles auth.
40
+
41
+ After this, the next green push to `main` uploads to PyPI. `skip-existing:
42
+ true` makes re-runs idempotent.