pyxcp 0.22.31__tar.gz → 0.22.32__tar.gz

{pyxcp-0.22.31 → pyxcp-0.22.32}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.3
 Name: pyxcp
-Version: 0.22.31
+Version: 0.22.32
 Summary: Universal Calibration Protocol for Python
 License: LGPLv3
 Keywords: automotive,ecu,xcp,asam,autosar

{pyxcp-0.22.31 → pyxcp-0.22.32}/pyproject.toml

@@ -37,7 +37,7 @@ dynamic = ["license", "readme", "authors", "requires-python", "description", "cl
 [tool.poetry]
 authors = ["Christoph Schueler <cpu.gems@googlemail.com>"]
 name = "pyxcp"
-version = "0.22.31"
+version = "0.22.32"
 readme = "README.md"
 description = "Universal Calibration Protocol for Python"
 keywords = ["automotive", "ecu", "xcp", "asam", "autosar"]

{pyxcp-0.22.31 → pyxcp-0.22.32}/pyxcp/__init__.py

@@ -17,4 +17,4 @@ tb_install(show_locals=True, max_frames=3)  # Install custom exception handler.
 
 # if you update this manually, do not forget to update
 # .bumpversion.cfg and pyproject.toml.
-__version__ = "0.22.31"
+__version__ = "0.22.32"

{pyxcp-0.22.31 → pyxcp-0.22.32}/pyxcp/cpp_ext/extension_wrapper.cpp

@@ -40,6 +40,7 @@ PYBIND11_MODULE(cpp_ext, m) {
         .def_property_readonly("components", &McObject::get_components)
 
         .def("add_component", &McObject::add_component, "component"_a)
+        .def("__eq__", [](const McObject& self, const McObject& other) { return self == other; })
         .def("__repr__", [](const McObject& self) { return to_string(self); })
         .def("__hash__", [](const McObject& self) { return self.get_hash(); })
         ;

{pyxcp-0.22.31 → pyxcp-0.22.32}/pyxcp/daq_stim/__init__.py

@@ -218,8 +218,8 @@ class DaqToCsv(DaqOnlinePolicy):
             hdr = ",".join(["timestamp0", "timestamp1"] + [h[0] for h in daq_list.headers])
             out_file.write(f"{hdr}\n")
 
-    def on_daq_list(self, daq_list: int, ts0: int, ts1: int, payload: list):
-        self.files[daq_list].write(f"{ts0},{ts1},{', '.join([str(x) for x in payload])}\n")
+    def on_daq_list(self, daq_list: int, timestamp0: int, timestamp1: int, payload: list):
+        self.files[daq_list].write(f"{timestamp0},{timestamp1},{', '.join([str(x) for x in payload])}\n")
 
     def finalize(self):
         self.log.debug("DaqCsv::finalize()")

{pyxcp-0.22.31 → pyxcp-0.22.32}/pyxcp/master/master.py

@@ -1328,7 +1328,7 @@ class Master:
         if wait_for_optional_response:
             return self.transport.request_optional_response(types.Command.PROGRAM_RESET)
         else:
-            return self.transport.block_request(types.Command.PROGRAM_RESET)
+            return self.transport.request(types.Command.PROGRAM_RESET)
 
     @wrapped
     def getPgmProcessorInfo(self):

{pyxcp-0.22.31 → pyxcp-0.22.32}/pyxcp/recorder/converter/__init__.py

@@ -98,8 +98,8 @@ class Storage:
 class StorageContainer:
     name: str
     arr: List[Storage] = field(default_factory=[])
-    ts0: List[int] = field(default_factory=lambda: array("Q"))
-    ts1: List[int] = field(default_factory=lambda: array("Q"))
+    timestamp0: List[int] = field(default_factory=lambda: array("Q"))
+    timestamp1: List[int] = field(default_factory=lambda: array("Q"))
 
 
 class XcpLogFileDecoder(_XcpLogFileDecoder):
@@ -158,8 +158,8 @@ class CollectRows:
 
     def on_daq_list(self, daq_list_num: int, timestamp0: int, timestamp1: int, measurements: list) -> None:
         storage_container = self.tables[daq_list_num]
-        storage_container.ts0.append(timestamp0)
-        storage_container.ts1.append(timestamp1)
+        storage_container.timestamp0.append(timestamp0)
+        storage_container.timestamp1.append(timestamp1)
         for idx, elem in enumerate(measurements):
             storage = storage_container.arr[idx]
             storage.arr.append(elem)
@@ -198,8 +198,8 @@ class ArrowConverter(CollectRows, XcpLogFileDecoder):
     def on_finalize(self) -> None:
         result = []
         for arr in self.tables:
-            timestamp0 = arr.ts0
-            timestamp1 = arr.ts1
+            timestamp0 = arr.timestamp0
+            timestamp1 = arr.timestamp1
             names = ["timestamp0", "timestamp1"]
             data = [timestamp0, timestamp1]
             for sd in arr.arr:
@@ -229,7 +229,7 @@ class CsvConverter(XcpLogFileDecoder):
         fname = f"{sc.name}{self.out_file_suffix}"
         self.logger.info(f"Creating file {fname!r}.")
         writer = csv.writer(open(fname, "w", newline=""), dialect="excel")
-        headers = ["ts0", "ts1"] + [e.name for e in sc.arr]
+        headers = ["timestamp0", "timestamp1"] + [e.name for e in sc.arr]
         writer.writerow(headers)
         self.csv_writers.append(writer)
 
@@ -257,7 +257,7 @@ class ExcelConverter(XcpLogFileDecoder):
     def on_container(self, sc: StorageContainer) -> None:
         sheet = self.xls_workbook.add_worksheet(sc.name)
         self.xls_sheets.append(sheet)
-        headers = ["ts0", "ts1"] + [e.name for e in sc.arr]
+        headers = ["timestamp0", "timestamp1"] + [e.name for e in sc.arr]
         sheet.write_row(0, 0, headers)
         self.rows.append(1)
 
@@ -285,8 +285,8 @@ class HdfConverter(CollectRows, XcpLogFileDecoder):
 
     def on_finalize(self) -> None:
         for arr in self.tables:
-            timestamp0 = arr.ts0
-            timestamp1 = arr.ts1
+            timestamp0 = arr.timestamp0
+            timestamp1 = arr.timestamp1
             self.out_file[f"/{arr.name}/timestamp0"] = timestamp0
             self.out_file[f"/{arr.name}/timestamp1"] = timestamp1
             for sd in arr.arr:
@@ -322,7 +322,7 @@ class MdfConverter(CollectRows, XcpLogFileDecoder):
         mdf4.header = hdr
         for idx, arr in enumerate(self.tables):
             signals = []
-            timestamps = arr.ts0
+            timestamps = arr.timestamp0
             for sd in arr.arr:
                 signal = Signal(samples=sd.arr, name=sd.name, timestamps=timestamps)
                 signals.append(signal)
@@ -369,7 +369,7 @@ class SqliteConverter(XcpLogFileDecoder):
         self.create_table(sc)
         self.logger.info(f"Creating table {sc.name!r}.")
         self.insert_stmt[sc.name] = (
-            f"""INSERT INTO {sc.name}({', '.join(['ts0', 'ts1'] + [r.name for r in sc.arr])}) VALUES({', '.join(["?" for _ in range(len(sc.arr) + 2)])})"""
+            f"""INSERT INTO {sc.name}({', '.join(['timestamp0', 'timestamp1'] + [r.name for r in sc.arr])}) VALUES({', '.join(["?" for _ in range(len(sc.arr) + 2)])})"""
         )
 
     def on_finalize(self) -> None:
@@ -403,7 +403,7 @@ class SqliteConverter(XcpLogFileDecoder):
         )
 
     def create_table(self, sc: StorageContainer) -> None:
-        columns = ["ts0 INTEGER", "ts1 INTEGER"]
+        columns = ["timestamp0 INTEGER", "timestamp1 INTEGER"]
         for elem in sc.arr:
             columns.append(f"{elem.name} {elem.target_type}")
         ddl = f"CREATE TABLE {sc.name}({', '.join(columns)})"

pyxcp-0.22.32/pyxcp/tests/test_daq_opt.py

@@ -0,0 +1,426 @@
+#!/usr/bin/env python
+
+import pytest
+
+from pyxcp.cpp_ext.cpp_ext import Bin, DaqList, McObject  # # noqa:  F401
+from pyxcp.daq_stim.optimize import make_continuous_blocks
+from pyxcp.daq_stim.optimize.binpacking import first_fit_decreasing
+
+
+DAQ_LISTS_1 = [
+    DaqList(
+        "test",
+        0,
+        False,
+        False,
+        [
+            ("voltage1", 0x0080051A - 4, 0, "F32"),  # 80053a
+            ("voltage2", 0x0080051E - 4, 0, "F32"),
+            ("voltage3", 0x00800522 - 4, 0, "F32"),
+            ("voltage4", 0x00800526 - 4, 0, "F32"),
+            ("sine_wave", 0x00800512, 0, "F32"),
+        ],
+    ),
+]
+
+DAQ_LISTS_2 = [
+    DaqList(
+        "test",
+        0,
+        False,
+        False,
+        [
+            ("voltage1", 0x0080051A, 0, "F32"),  # 80053a
+            ("voltage2", 0x0080051E, 0, "F32"),
+            ("voltage3", 0x00800522, 0, "F32"),
+            ("voltage4", 0x00800526, 0, "F32"),
+            ("sq0", 0x00800516, 0, "U8"),
+            ("sq1", 0x00800517, 0, "U8"),
+            ("sine_wave", 0x00800512, 0, "F32"),
+        ],
+    ),
+]
+
+max_payload_size = 64
+max_payload_size_first = 64
+
+EXPECTED_BLOCK_VAR_1_64 = [
+    McObject(
+        name="",
+        address=8389906,
+        ext=0,
+        data_type="",
+        length=20,
+        components=[
+            McObject(name="sine_wave", address=8389906, ext=0, data_type="F32", length=4, components=[]),
+            McObject(name="voltage1", address=8389910, ext=0, data_type="F32", length=4, components=[]),
+            McObject(name="voltage2", address=8389914, ext=0, data_type="F32", length=4, components=[]),
+            McObject(name="voltage3", address=8389918, ext=0, data_type="F32", length=4, components=[]),
+            McObject(name="voltage4", address=8389922, ext=0, data_type="F32", length=4, components=[]),
+        ],
+    )
+]
+
+EXPECTED_BLOCK_VAR_1_8 = [
+    McObject(
+        name="",
+        address=8389906,
+        ext=0,
+        data_type="",
+        length=4,
+        components=[McObject(name="sine_wave", address=8389906, ext=0, data_type="F32", length=4, components=[])],
+    ),
+    McObject(
+        name="",
+        address=8389910,
+        ext=0,
+        data_type="",
+        length=4,
+        components=[McObject(name="voltage1", address=8389910, ext=0, data_type="F32", length=4, components=[])],
+    ),
+    McObject(
+        name="",
+        address=8389914,
+        ext=0,
+        data_type="",
+        length=4,
+        components=[McObject(name="voltage2", address=8389914, ext=0, data_type="F32", length=4, components=[])],
+    ),
+    McObject(
+        name="",
+        address=8389918,
+        ext=0,
+        data_type="",
+        length=4,
+        components=[McObject(name="voltage3", address=8389918, ext=0, data_type="F32", length=4, components=[])],
+    ),
+    McObject(
+        name="",
+        address=8389922,
+        ext=0,
+        data_type="",
+        length=4,
+        components=[McObject(name="voltage4", address=8389922, ext=0, data_type="F32", length=4, components=[])],
+    ),
+]
+
+EXPECTED_BLOCK_VAR_2_64 = [
+    McObject(
+        name="",
+        address=8389906,
+        ext=0,
+        data_type="",
+        length=6,
+        components=[
+            McObject(name="sine_wave", address=8389906, ext=0, data_type="F32", length=4, components=[]),
+            McObject(name="sq0", address=8389910, ext=0, data_type="U8", length=1, components=[]),
+            McObject(name="sq1", address=8389911, ext=0, data_type="U8", length=1, components=[]),
+        ],
+    ),
+    McObject(
+        name="",
+        address=8389914,
+        ext=0,
+        data_type="",
+        length=16,
+        components=[
+            McObject(name="voltage1", address=8389914, ext=0, data_type="F32", length=4, components=[]),
+            McObject(name="voltage2", address=8389918, ext=0, data_type="F32", length=4, components=[]),
+            McObject(name="voltage3", address=8389922, ext=0, data_type="F32", length=4, components=[]),
+            McObject(name="voltage4", address=8389926, ext=0, data_type="F32", length=4, components=[]),
+        ],
+    ),
+]
+
+EXPECTED_BLOCK_VAR_2_8 = [
+    McObject(
+        name="",
+        address=8389906,
+        ext=0,
+        data_type="",
+        length=6,
+        components=[
+            McObject(name="sine_wave", address=8389906, ext=0, data_type="F32", length=4, components=[]),
+            McObject(name="sq0", address=8389910, ext=0, data_type="U8", length=1, components=[]),
+            McObject(name="sq1", address=8389911, ext=0, data_type="U8", length=1, components=[]),
+        ],
+    ),
+    McObject(
+        name="",
+        address=8389914,
+        ext=0,
+        data_type="",
+        length=4,
+        components=[
+            McObject(name="voltage1", address=8389914, ext=0, data_type="F32", length=4, components=[]),
+        ],
+    ),
+    McObject(
+        name="",
+        address=8389918,
+        ext=0,
+        data_type="",
+        length=4,
+        components=[
+            McObject(name="voltage2", address=8389918, ext=0, data_type="F32", length=4, components=[]),
+        ],
+    ),
+    McObject(
+        name="",
+        address=8389922,
+        ext=0,
+        data_type="",
+        length=4,
+        components=[
+            McObject(name="voltage3", address=8389922, ext=0, data_type="F32", length=4, components=[]),
+        ],
+    ),
+    McObject(
+        name="",
+        address=8389926,
+        ext=0,
+        data_type="",
+        length=4,
+        components=[
+            McObject(name="voltage4", address=8389926, ext=0, data_type="F32", length=4, components=[]),
+        ],
+    ),
+]
+
+BIN_PACKING_VAR1_8 = (
+    (
+        7,
+        3,
+        [
+            McObject(
+                name="",
+                address=8389906,
+                ext=0,
+                data_type="",
+                length=4,
+                components=[
+                    McObject(name="sine_wave", address=8389906, ext=0, data_type="F32", length=4, components=[]),
+                ],
+            )
+        ],
+    ),
+    (
+        7,
+        3,
+        [
+            McObject(
+                name="",
+                address=8389910,
+                ext=0,
+                data_type="",
+                length=4,
+                components=[
+                    McObject(name="voltage1", address=8389910, ext=0, data_type="F32", length=4, components=[]),
+                ],
+            )
+        ],
+    ),
+    (
+        7,
+        3,
+        [
+            McObject(
+                name="",
+                address=8389914,
+                ext=0,
+                data_type="",
+                length=4,
+                components=[
+                    McObject(name="voltage2", address=8389914, ext=0, data_type="F32", length=4, components=[]),
+                ],
+            )
+        ],
+    ),
+    (
+        7,
+        3,
+        [
+            McObject(
+                name="",
+                address=8389918,
+                ext=0,
+                data_type="",
+                length=4,
+                components=[
+                    McObject(name="voltage3", address=8389918, ext=0, data_type="F32", length=4, components=[]),
+                ],
+            )
+        ],
+    ),
+)
+
+BIN_PACKING_VAR2_8 = (
+    (
+        7,
+        1,
+        [
+            McObject(
+                name="",
+                address=8389906,
+                ext=0,
+                data_type="",
+                length=6,
+                components=[
+                    McObject(name="sine_wave", address=8389906, ext=0, data_type="F32", length=4, components=[]),
+                    McObject(name="sq0", address=8389910, ext=0, data_type="U8", length=1, components=[]),
+                    McObject(name="sq1", address=8389911, ext=0, data_type="U8", length=1, components=[]),
+                ],
+            )
+        ],
+    ),
+    (
+        7,
+        3,
+        [
+            McObject(
+                name="",
+                address=8389914,
+                ext=0,
+                data_type="",
+                length=4,
+                components=[
+                    McObject(name="voltage1", address=8389914, ext=0, data_type="F32", length=4, components=[]),
+                ],
+            )
+        ],
+    ),
+    (
+        7,
+        3,
+        [
+            McObject(
+                name="",
+                address=8389918,
+                ext=0,
+                data_type="",
+                length=4,
+                components=[
+                    McObject(name="voltage2", address=8389918, ext=0, data_type="F32", length=4, components=[]),
+                ],
+            )
+        ],
+    ),
+    (
+        7,
+        3,
+        [
+            McObject(
+                name="",
+                address=8389922,
+                ext=0,
+                data_type="",
+                length=4,
+                components=[
+                    McObject(name="voltage3", address=8389922, ext=0, data_type="F32", length=4, components=[]),
+                ],
+            )
+        ],
+    ),
+    (
+        7,
+        3,
+        [
+            McObject(
+                name="",
+                address=8389926,
+                ext=0,
+                data_type="",
+                length=4,
+                components=[
+                    McObject(name="voltage4", address=8389926, ext=0, data_type="F32", length=4, components=[]),
+                ],
+            )
+        ],
+    ),
+)
+
+BIN_PACKING_VAR1_64 = (
+    (
+        63,
+        43,
+        [
+            McObject(
+                name="",
+                address=8389906,
+                ext=0,
+                data_type="",
+                length=20,
+                components=[
+                    McObject(name="sine_wave", address=8389906, ext=0, data_type="F32", length=4, components=[]),
+                    McObject(name="voltage1", address=8389910, ext=0, data_type="F32", length=4, components=[]),
+                    McObject(name="voltage2", address=8389914, ext=0, data_type="F32", length=4, components=[]),
+                    McObject(name="voltage3", address=8389918, ext=0, data_type="F32", length=4, components=[]),
+                    McObject(name="voltage4", address=8389922, ext=0, data_type="F32", length=4, components=[]),
+                ],
+            )
+        ],
+    ),
+)
+
+BIN_PACKING_VAR2_64 = (
+    63,
+    41,
+    [
+        McObject(
+            name="",
+            address=8389914,
+            ext=0,
+            data_type="",
+            length=16,
+            components=[
+                McObject(name="voltage1", address=8389914, ext=0, data_type="F32", length=4, components=[]),
+                McObject(name="voltage2", address=8389918, ext=0, data_type="F32", length=4, components=[]),
+                McObject(name="voltage3", address=8389922, ext=0, data_type="F32", length=4, components=[]),
+                McObject(name="voltage4", address=8389926, ext=0, data_type="F32", length=4, components=[]),
+            ],
+        ),
+        McObject(
+            name="",
+            address=8389906,
+            ext=0,
+            data_type="",
+            length=6,
+            components=[
+                McObject(name="sine_wave", address=8389906, ext=0, data_type="F32", length=4, components=[]),
+                McObject(name="sq0", address=8389910, ext=0, data_type="U8", length=1, components=[]),
+                McObject(name="sq1", address=8389911, ext=0, data_type="U8", length=1, components=[]),
+            ],
+        ),
+    ],
+)
+
+
+@pytest.mark.parametrize(
+    "daq_lists, expected_blocks, payload_size",
+    [
+        (DAQ_LISTS_1, EXPECTED_BLOCK_VAR_1_64, 64),
+        (DAQ_LISTS_1, EXPECTED_BLOCK_VAR_1_8, 8),
+        (DAQ_LISTS_2, EXPECTED_BLOCK_VAR_2_64, 64),
+        (DAQ_LISTS_2, EXPECTED_BLOCK_VAR_2_8, 8),
+    ],
+)
+def test_make_continuous_blocks(daq_lists, expected_blocks, payload_size):
+    daq_list = daq_lists[0]
+    blocks = make_continuous_blocks(daq_list.measurements, payload_size - 1, payload_size - 1)
+    for block, expected_block in zip(blocks, expected_blocks):
+        assert block == expected_block
+
+
+@pytest.mark.parametrize(
+    "blocks, expected_blocks, payload_size",
+    [
+        (EXPECTED_BLOCK_VAR_1_8, BIN_PACKING_VAR1_8, 8),
+        (EXPECTED_BLOCK_VAR_2_8, BIN_PACKING_VAR2_8, 8),
+        (EXPECTED_BLOCK_VAR_1_64, BIN_PACKING_VAR1_64, 64),
+        (EXPECTED_BLOCK_VAR_2_64, BIN_PACKING_VAR2_64, 64),
+    ],
+)
+def test_first_fit_decreasing(blocks, expected_blocks, payload_size):
+    res = first_fit_decreasing(blocks, payload_size - 1, payload_size - 1)  # noqa:  F841
+    # for entry in res:
+    #    print(entry.size, entry.residual_capacity, entry.entries)

{pyxcp-0.22.31 → pyxcp-0.22.32}/pyxcp/tests/test_master.py

@@ -134,7 +134,7 @@ class TestMaster:
     def testDisconnect(self, eth):
         with Master("eth", config=create_config()) as xm:
             xm.transport = eth()
-            xm.transport.request.return_value = bytes([])
+            xm.transport.request_optional_response.return_value = bytes([])
             res = xm.disconnect()
         assert res == b""
 

{pyxcp-0.22.31 → pyxcp-0.22.32}/pyxcp/tests/test_transport.py

@@ -1,11 +1,28 @@
+from unittest import mock
+
 import pytest
 
 import pyxcp.transport.base as tr
 
 
+def create_config():
+    # Exception: XCPonEth - Failed to resolve address <MagicMock name='mock.transport.eth.host' id='2414047113872'>:<MagicMock name='mock.transport.eth.port' id='2414047478992'>
+    config = mock.MagicMock()
+    config.general.return_value = mock.MagicMock()
+    config.transport.return_value = mock.MagicMock()
+    config.transport.eth.return_value = mock.MagicMock()
+    config.transport.eth.host = "localhost"
+    config.transport.eth.port = 5555
+    config.transport.eth.bind_to_address = ""
+    config.transport.eth.bind_to_port = 0
+    config.transport.create_daq_timestamps = False
+    return config
+
+
 def test_factory_works():
-    assert isinstance(tr.create_transport("eth"), tr.BaseTransport)
-    assert isinstance(tr.create_transport("sxi"), tr.BaseTransport)
+    config = create_config()
+    assert isinstance(tr.create_transport("eth", config=config), tr.BaseTransport)
+    assert isinstance(tr.create_transport("sxi", config=config), tr.BaseTransport)
     assert isinstance(
         tr.create_transport(
             "can",

{pyxcp-0.22.31 → pyxcp-0.22.32}/pyxcp/transport/sxi.py

@@ -42,7 +42,7 @@ class SxI(BaseTransport):
         if self.has_user_supplied_interface and transport_layer_interface:
             self.comm_port = transport_layer_interface
         else:
-            self.logger.info(f"XCPonSxI - trying to open serial comm_port {self.port_name}.")
+            self.logger.info(f"XCPonSxI - trying to open serial comm_port {self.port_name!r}.")
             try:
                 self.comm_port = serial.Serial(
                     port=self.port_name,
@@ -88,7 +88,9 @@ class SxI(BaseTransport):
         self.unpacker = unpacker
 
     def connect(self) -> None:
-        self.logger.info(f"XCPonSxI - serial comm_port openend: {self.comm_port.portstr}@{self.baudrate} Bits/Sec.")
+        self.logger.info(
+            f"XCPonSxI - serial comm_port {self.comm_port.portstr!r} openend [{self.baudrate}/{self.bytesize}-{self.parity}-{self.stopbits}]"
+        )
         self.start_listener()
 
     def output(self, enable) -> None: