pyVHDLModelTreesitter 0.7.1__tar.gz → 0.9.0__tar.gz

{pyvhdlmodeltreesitter-0.7.1 → pyvhdlmodeltreesitter-0.9.0}/.gitignore

@@ -7,7 +7,8 @@
 /.venv
 /dist/
 
-__pycache__/
+.docker-login
 .mypy_cache/
 .pytest_cache/
 .ruff_cache/
+__pycache__/

{pyvhdlmodeltreesitter-0.7.1 → pyvhdlmodeltreesitter-0.9.0}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: pyVHDLModelTreesitter
-Version: 0.7.1
+Version: 0.9.0
 Summary: An implementation of pyVHDLModel using treesitter
 Project-URL: Repository, https://gitlab.com/dawalters/pyVHDLModelTreesitter
 Author: Dominic Adam Walters
@@ -16,26 +16,26 @@ Classifier: Programming Language :: Python :: 3.13
 Classifier: Programming Language :: Python :: 3.14
 Requires-Python: >=3.11
 Requires-Dist: pygments>=2.20.0
-Requires-Dist: pyvhdlmodel>=0.34.0
+Requires-Dist: pyvhdlmodel>=0.38.0
 Requires-Dist: rich>=11.0.0
 Requires-Dist: tree-sitter-vhdl>=1.2.5
 Requires-Dist: tree-sitter>=0.23.0
 Provides-Extra: dev
-Requires-Dist: coverage==7.15.0; extra == 'dev'
-Requires-Dist: cryptography==49.0.0; extra == 'dev'
-Requires-Dist: hatch==1.17.0; extra == 'dev'
-Requires-Dist: idna==3.18; extra == 'dev'
-Requires-Dist: jaraco-context==6.1.2; extra == 'dev'
-Requires-Dist: mypy==2.1.0; extra == 'dev'
-Requires-Dist: pre-commit==4.6.0; extra == 'dev'
-Requires-Dist: pytest-cov==7.1.0; extra == 'dev'
-Requires-Dist: pytest-order==1.5.0; extra == 'dev'
-Requires-Dist: pytest-sugar==1.1.1; extra == 'dev'
-Requires-Dist: pytest-xdist==3.8.0; extra == 'dev'
-Requires-Dist: pytest==9.1.1; extra == 'dev'
-Requires-Dist: ruff==0.15.20; extra == 'dev'
-Requires-Dist: ty==0.0.56; extra == 'dev'
-Requires-Dist: uv==0.11.26; extra == 'dev'
+Requires-Dist: coverage>=7.15.2; extra == 'dev'
+Requires-Dist: cryptography>=49.0.0; extra == 'dev'
+Requires-Dist: hatch>=1.17.1; extra == 'dev'
+Requires-Dist: idna>=3.18; extra == 'dev'
+Requires-Dist: jaraco-context>=6.1.2; extra == 'dev'
+Requires-Dist: mypy>=2.3.0; extra == 'dev'
+Requires-Dist: pre-commit>=4.6.1; extra == 'dev'
+Requires-Dist: pytest-cov>=7.1.0; extra == 'dev'
+Requires-Dist: pytest-order>=1.5.0; extra == 'dev'
+Requires-Dist: pytest-sugar>=1.1.1; extra == 'dev'
+Requires-Dist: pytest-xdist>=3.8.0; extra == 'dev'
+Requires-Dist: pytest>=9.1.1; extra == 'dev'
+Requires-Dist: ruff>=0.16.1; extra == 'dev'
+Requires-Dist: ty>=0.0.65; extra == 'dev'
+Requires-Dist: uv>=0.12.0; extra == 'dev'
 Description-Content-Type: text/markdown
 
 # pyVHDLModelTreesitter
@@ -47,7 +47,8 @@ Description-Content-Type: text/markdown
 [![Python Version][shield-python-version]][pyVHDLModelTreesitter-pypi]
 
 `pyVHDLModelTreesitter` is an implementation of the
-[`pyVHDLModel`][pyVHDLModel-github] API using `tree-sitter-vhdl`.
+[`pyVHDLModel`][pyVHDLModel-github] API using
+[`tree-sitter-vhdl`][tree-sitter-vhdl].
 
 > Disclaimer: This project is in early development and only implements a
               fraction of the features of [`pyVHDLModel`][pyVHDLModel-github].
@@ -69,9 +70,9 @@ You can download source releases from the
 
 ## Documentation
 
-In the simplest cases where you just want to parse a VHDL file:
+To parse a VHDL file:
 
-```python3
+```python
 import pyVHDLModelTreesitter
 
 document = pyVHDLModelTreesitter.Document.from_file("path/to/file.vhd")
@@ -80,7 +81,9 @@ document = pyVHDLModelTreesitter.Document.from_file("path/to/file.vhd")
 `pyVHDLModelTreesitter.Document` is a subclass of
 [`pyVHDLModel.Document`][pyVHDLModel-Document].
 
-Detailed documentation is currently unavailable.
+Detailed documentation is available for [`pyVHDLModel`][pyVHDLModel-documentation].
+
+A complete list of public API endpoints is in [DOCS.md](DOCS.md).
 
 ## Setup for Development
 
@@ -107,6 +110,7 @@ You can `make help` to see what actions are available.
 
 [precommit-github]: https://github.com/pre-commit/pre-commit
 [pyVHDLModel-Document]: https://vhdl.github.io/pyVHDLModel/pyVHDLModel/pyVHDLModel.html#pyVHDLModel.Document
+[pyVHDLModel-documentation]: https://vhdl.github.io/pyVHDLModel
 [pyVHDLModel-github]: https://github.com/VHDL/pyVHDLModel
 [pyVHDLModelTreesitter-codecov]: https://codecov.io/gitlab/dawalters/pyVHDLModelTreesitter
 [pyVHDLModelTreesitter-pipeline]: https://gitlab.com/dawalters/pyVHDLModelTreesitter/-/pipelines?page=1&scope=all&ref=develop
@@ -118,3 +122,4 @@ You can `make help` to see what actions are available.
 [shield-python-version]: https://img.shields.io/pypi/pyversions/pyVHDLModelTreesitter
 [shield-releases]: https://gitlab.com/dawalters/pyVHDLModelTreesitter/-/badges/release.svg
 [shield-version]: https://img.shields.io/pypi/v/pyVHDLModelTreesitter
+[tree-sitter-vhdl]: https://github.com/jpt13653903/tree-sitter-vhdl

{pyvhdlmodeltreesitter-0.7.1 → pyvhdlmodeltreesitter-0.9.0}/README.md

@@ -7,7 +7,8 @@
 [![Python Version][shield-python-version]][pyVHDLModelTreesitter-pypi]
 
 `pyVHDLModelTreesitter` is an implementation of the
-[`pyVHDLModel`][pyVHDLModel-github] API using `tree-sitter-vhdl`.
+[`pyVHDLModel`][pyVHDLModel-github] API using
+[`tree-sitter-vhdl`][tree-sitter-vhdl].
 
 > Disclaimer: This project is in early development and only implements a
               fraction of the features of [`pyVHDLModel`][pyVHDLModel-github].
@@ -29,9 +30,9 @@ You can download source releases from the
 
 ## Documentation
 
-In the simplest cases where you just want to parse a VHDL file:
+To parse a VHDL file:
 
-```python3
+```python
 import pyVHDLModelTreesitter
 
 document = pyVHDLModelTreesitter.Document.from_file("path/to/file.vhd")
@@ -40,7 +41,9 @@ document = pyVHDLModelTreesitter.Document.from_file("path/to/file.vhd")
 `pyVHDLModelTreesitter.Document` is a subclass of
 [`pyVHDLModel.Document`][pyVHDLModel-Document].
 
-Detailed documentation is currently unavailable.
+Detailed documentation is available for [`pyVHDLModel`][pyVHDLModel-documentation].
+
+A complete list of public API endpoints is in [DOCS.md](DOCS.md).
 
 ## Setup for Development
 
@@ -67,6 +70,7 @@ You can `make help` to see what actions are available.
 
 [precommit-github]: https://github.com/pre-commit/pre-commit
 [pyVHDLModel-Document]: https://vhdl.github.io/pyVHDLModel/pyVHDLModel/pyVHDLModel.html#pyVHDLModel.Document
+[pyVHDLModel-documentation]: https://vhdl.github.io/pyVHDLModel
 [pyVHDLModel-github]: https://github.com/VHDL/pyVHDLModel
 [pyVHDLModelTreesitter-codecov]: https://codecov.io/gitlab/dawalters/pyVHDLModelTreesitter
 [pyVHDLModelTreesitter-pipeline]: https://gitlab.com/dawalters/pyVHDLModelTreesitter/-/pipelines?page=1&scope=all&ref=develop
@@ -78,3 +82,4 @@ You can `make help` to see what actions are available.
 [shield-python-version]: https://img.shields.io/pypi/pyversions/pyVHDLModelTreesitter
 [shield-releases]: https://gitlab.com/dawalters/pyVHDLModelTreesitter/-/badges/release.svg
 [shield-version]: https://img.shields.io/pypi/v/pyVHDLModelTreesitter
+[tree-sitter-vhdl]: https://github.com/jpt13653903/tree-sitter-vhdl

{pyvhdlmodeltreesitter-0.7.1 → pyvhdlmodeltreesitter-0.9.0}/pyproject.toml

@@ -4,16 +4,16 @@ build-backend = "hatchling.build"
 
 [project]
 name = "pyVHDLModelTreesitter"
-version = "0.7.1"
+version = "0.9.0"
 description = "An implementation of pyVHDLModel using treesitter"
 readme = "README.md"
 requires-python = ">=3.11"
 dependencies = [
-    "pyVHDLModel >= 0.34.0",
+    "pyVHDLModel >= 0.38.0",
     "rich >= 11.0.0",
         "pygments >= 2.20.0",  # forced to avoid CVE
     "tree-sitter >= 0.23.0",
-    "tree-sitter-vhdl >= 1.2.5",
+    "tree-sitter-vhdl >= 1.2.5",  # TODO: move to 1.6.0 once released
 ]
 authors = [
     { name = "Dominic Adam Walters" },
@@ -32,26 +32,23 @@ classifiers = [
 
 [project.optional-dependencies]
 dev = [
-    "coverage == 7.15.0",
-    "hatch == 1.17.0",
-        "cryptography == 49.0.0",  # forced to avoid CVE
-        "idna == 3.18",  # forced to avoid CVE
-        "jaraco-context == 6.1.2",  # forced to avoid CVE
-    "mypy == 2.1.0",
-    "pre-commit == 4.6.0",
-    "pytest == 9.1.1",
-    "pytest-cov == 7.1.0",
-    "pytest-order == 1.5.0",
-    "pytest-sugar == 1.1.1",
-    "pytest-xdist == 3.8.0",
-    "ruff == 0.15.20",
-    "ty == 0.0.56",
-    "uv == 0.11.26",
+    "coverage >= 7.15.2",
+    "hatch >= 1.17.1",
+        "cryptography >= 49.0.0",  # forced to avoid CVE
+        "idna >= 3.18",  # forced to avoid CVE
+        "jaraco-context >= 6.1.2",  # forced to avoid CVE
+    "mypy >= 2.3.0",
+    "pre-commit >= 4.6.1",
+    "pytest >= 9.1.1",
+    "pytest-cov >= 7.1.0",
+    "pytest-order >= 1.5.0",
+    "pytest-sugar >= 1.1.1",
+    "pytest-xdist >= 3.8.0",
+    "ruff >= 0.16.1",
+    "ty >= 0.0.65",
+    "uv >= 0.12.0",
 ]
 
-[project.scripts]
-dump-treesitter-parse = "pyVHDLModelTreesitter.cli._dump_treesitter_parse:main"
-
 [project.urls]
 Repository = "https://gitlab.com/dawalters/pyVHDLModelTreesitter"
 
@@ -92,12 +89,14 @@ dependencies = [
 python = ["3.11", "3.12", "3.13", "3.14"]
 
 [tool.mypy]
+allow_redefinition = true
+implicit_reexport = true
+scripts_are_modules = true
 strict = true
 warn_unreachable = true
-implicit_reexport = true
 
 [tool.pytest.ini_options]
-addopts = "--capture=fd -n 0 --cov=pyVHDLModelTreesitter --cov-report html --cov-report xml --verbose --junitxml=.junit.xml -o junit_family=legacy"
+addopts = "--capture=fd -n auto --dist loadgroup --cov=pyVHDLModelTreesitter --cov-report html --cov-report xml --verbose --junitxml=.junit.xml -o junit_family=legacy"
 norecursedirs = "oss/*"
 testpaths = [
     "tests",

pyvhdlmodeltreesitter-0.9.0/src/pyVHDLModelTreesitter/Expression.py

@@ -0,0 +1,37 @@
+"""Submodule mirroring modified aspects of pyVHDLModel.Expression."""
+
+from __future__ import annotations
+
+__all__ = [
+    "FunctionCall",
+]
+
+from typing import TYPE_CHECKING
+
+import pyVHDLModel
+
+if TYPE_CHECKING:
+    from pyVHDLModel.Association import ParameterAssociationItem
+    from pyVHDLModel.Name import Name
+
+
+#####################################
+# Modified first order base classes #
+#####################################
+class FunctionCall(pyVHDLModel.Expression.FunctionCall):  # ruff: ignore[undocumented-public-class]
+    # TODO: Report on pyVHDLModel that function calls are currently undefined
+    _name: Name
+    _arguments: list[ParameterAssociationItem]
+
+    def __init__(  # ruff: ignore[undocumented-public-init]
+        self,
+        name: Name,
+        arguments: list[ParameterAssociationItem],
+        parent: pyVHDLModel.Base.ModelEntity | None = None,
+    ) -> None:
+        super().__init__(parent)
+        self._name = name
+        self._arguments = arguments
+
+    def __str__(self) -> str:  # ruff: ignore[undocumented-magic-method]
+        return f"{self._name}({', '.join(str(a) for a in self._arguments)})"

pyvhdlmodeltreesitter-0.9.0/src/pyVHDLModelTreesitter/_Association.py

@@ -0,0 +1,53 @@
+"""Submodule defining parsers for classes from pyVHDLModel.Association."""
+
+from __future__ import annotations
+
+__all__ = [
+    "parse_association_item",
+]
+
+from typing import TYPE_CHECKING, TypeVar
+
+from pyVHDLModel.Association import AssociationItem
+from pyVHDLModel.Name import OpenName
+from pyVHDLModel.Symbol import SignalSymbol
+
+from pyVHDLModelTreesitter._Name import parse_name
+from pyVHDLModelTreesitter.queries import AssociationElement
+from pyVHDLModelTreesitter.queries._protocol import inject_node
+from pyVHDLModelTreesitter.queries._utils import (
+    get_node,
+    get_node_text,
+)
+
+if TYPE_CHECKING:
+    import pyVHDLModel
+    import tree_sitter
+
+
+T = TypeVar("T", bound=AssociationItem)
+
+
+def parse_association_item(cls: type[T], node: tree_sitter.Node) -> T | None:
+    """Create an AssociationItem from a tree-sitter node."""
+    captures = AssociationElement.capture_first_root(node)
+    formal_node = get_node(node, captures, "formal", optional=True)
+    formal = None
+    if formal_node is not None:
+        formal = SignalSymbol(parse_name(get_node_text(formal_node)))
+    actual_node = get_node(node, captures, "actual")
+    actual: pyVHDLModel.Base.ExpressionUnion
+    if actual_node.type == "OPEN":
+        actual = OpenName()
+    else:
+        # ruff: ignore[import-outside-top-level]
+        from pyVHDLModelTreesitter._parse import parse_conditional_expression
+
+        actual = parse_conditional_expression(actual_node)
+        if actual is None:
+            return None
+    # TODO: `formal` is a `SignalSymbol`, is this correct?
+    # TODO: `OpenName` might need wrapping in a `Symbol`
+    # ty: ignore[invalid-argument-type]
+    ret = cls(formal, actual)  # type: ignore[arg-type]
+    return inject_node(ret, node)

pyvhdlmodeltreesitter-0.9.0/src/pyVHDLModelTreesitter/_Base.py

@@ -0,0 +1,154 @@
+"""Submodule defining parsers for classes from pyVHDLModel.Base."""
+
+from __future__ import annotations
+
+__all__ = [
+    "parse_direction",
+    "parse_mode",
+    "parse_simple_range",
+    "parse_waveform_element",
+]
+
+from typing import TYPE_CHECKING
+
+import pyVHDLModel
+from pyVHDLModel.Base import SimpleRange, WaveformElement
+
+if TYPE_CHECKING:
+    from tree_sitter import Node
+
+from pyVHDLModelTreesitter._parse import parse_simple_expression
+from pyVHDLModelTreesitter.error import (
+    NodeExtraChildError,
+    NodeMissingChildError,
+    NodeTextIsInvalidError,
+    NodeTextIsNoneError,
+    NotImplementedWarning,
+)
+from pyVHDLModelTreesitter.queries._protocol import inject_node
+
+
+def parse_direction(string: str) -> pyVHDLModel.Base.Direction | None:
+    """
+    Parse a string as a direction.
+
+    This will accept any mix of the following:
+        - Incorrect capitalisation
+            - "tO"
+            - "To"
+        - Split words with whitespace
+            - "down to"
+    """
+    # TODO: make a PR on pyVHDLModel to add this
+    string = "".join(string.split()).lower().capitalize()
+    if string == "Downto":
+        string = "DownTo"
+    try:
+        return pyVHDLModel.Base.Direction[string]
+    except IndexError:
+        return None
+
+
+def parse_mode(string: str) -> pyVHDLModel.Base.Mode | None:
+    """
+    Parse a string as a mode.
+
+    This will accept any mix of the following:
+        - Incorrect capitalisation
+            - "IN"
+            - "iN"
+            - "in"
+        - Split words with whitespace
+            - "in out"
+    """
+    # TODO: make a PR on pyVHDLModel to add this
+    string = "".join(string.split()).lower().capitalize()
+    if string == "Inout":
+        string = "InOut"
+    try:
+        return pyVHDLModel.Base.Mode[string]
+    except IndexError:
+        return None
+
+
+def parse_simple_range(node: Node) -> SimpleRange | None:  # ruff: ignore[complex-structure, too-many-branches]
+    """
+    Create a SimpleRange from a treesitter node.
+
+    Raises
+    ------
+    NodeExtraChildError:
+        If `node.children` does not have 2 elements.
+    NodeMissingChildError:
+        If `node.type` is not `simple_range`.
+    NodeTextIsInvalidError:
+        If the direction in `node` could not be parsed.
+    NodeTextIsNoneError:
+        If `node` or any relevant subnode doesn't define `text`.
+
+    """
+    if node.type != "simple_range":
+        raise NodeMissingChildError(node, "simple_range")
+    if node.text is None or len(node.text) == 0:
+        raise NodeTextIsNoneError(node)
+    if len(node.children) != 3:  # ruff: ignore[magic-value-comparison]
+        raise NodeExtraChildError(node, "all children", 3)
+    left = node.child(0)
+    if left is None:
+        raise NodeMissingChildError(node, "first-child")
+    if left.type != "simple_expression":
+        NotImplementedWarning.warn_child_type(left)
+        return None
+    if left.text is None or len(left.text) == 0:
+        raise NodeTextIsNoneError(left)
+    direction_node = node.child(1)
+    if direction_node is None:
+        raise NodeMissingChildError(node, "second-child")
+    if len(direction_node.type) == 0:
+        NotImplementedWarning.warn_child_type(direction_node)
+        return None
+    if direction_node.text is None or len(direction_node.text) == 0:
+        raise NodeTextIsNoneError(direction_node)
+    direction_str = direction_node.text.decode("utf-8")
+    right = node.child(2)
+    if right is None:
+        raise NodeMissingChildError(node, "third-child")
+    if right.type != "simple_expression":
+        NotImplementedWarning.warn_child_type(right)
+        return None
+    if right.text is None or len(right.text) == 0:
+        raise NodeTextIsNoneError(right)
+    left_expr = parse_simple_expression(left)
+    if left_expr is None:
+        return None
+    right_expr = parse_simple_expression(right)
+    if right_expr is None:
+        return None
+    direction = parse_direction(direction_str)
+    if direction is None:
+        raise NodeTextIsInvalidError(
+            node,
+            f"'{direction_str}' is not a valid VHDL direction",
+        )
+    return inject_node(SimpleRange(left_expr, right_expr, direction), node)
+
+
+def parse_waveform_element(node: Node) -> WaveformElement | None:
+    """Create a WaveformElement from a treesitter node."""
+    if node.type != "waveform_element":
+        return None
+    simple_expression_node = None
+    for child in node.children:
+        if child.type == "simple_expression":
+            simple_expression_node = child
+            break
+    if simple_expression_node is None:
+        NotImplementedWarning.warn(
+            "waveform_element expects a 'simple_expression' child",
+            node,
+        )
+        return None
+    expression = parse_simple_expression(simple_expression_node)
+    if expression is None:
+        return None
+    return inject_node(WaveformElement(expression), node)